Commit Graph

426492 Commits

Author SHA1 Message Date
wangpc 0f6f4295d1 Revert "[RISCV] Add vread_csr and vwrite_csr to riscv_vector.h"
This reverts commit aebe24a856.

`REQUIRES` for RISCV target is needed in tests.
2022-06-13 19:31:25 +08:00
Jan Svoboda a85670001b [clang][driver] Fix compilation database dump with multiple architectures
Command lines with multiple `-arch` arguments expand into multiple entries in the compilation database. However, the file writes are not appending, meaning subsequent writes end up overwriting the previous ones, resulting in garbled output.

This patch fixes that by always appending to the file.

rdar://90165004

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D121997
2022-06-13 13:30:57 +02:00
Jan Svoboda c12577c61d [clang][driver] Introduce new -fdriver-only flag
This patch introduces the new -fdriver-only flag which instructs Clang to only execute the driver logic without running individual jobs. In a way, this is very similar to -###, with the following differences:
 * it doesn't automatically print all jobs,
 * it doesn't avoid side effects (e.g. it will generate compilation database when -MJ is specified).

This flag will be useful in testing D121997.

Reviewed By: dexonsmith, egorzhdan

Differential Revision: https://reviews.llvm.org/D127408
2022-06-13 13:30:56 +02:00
Mats Petersson 84b9ae6624 [flang]Add support for do concurrent
[flang]Add support for do concurrent

Upstreaming from fir-dev on https://github.com/flang-compiler/f18-llvm-project

Support for concurrent execution in do-loops.

A selection of tests are also added.

Co-authored-by: V Donaldson <vdonaldson@nvidia.com>

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D127240
2022-06-13 12:28:49 +01:00
wangpc aebe24a856 [RISCV] Add vread_csr and vwrite_csr to riscv_vector.h
These two functions are described in RVV intrinsics doc
to read/write RVV CSRs. This matches what GCC does.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125875
2022-06-13 19:12:15 +08:00
Simon Pilgrim 7d8fd4f5db [DAG] visitINSERT_VECTOR_ELT - attempt to reconstruct BUILD_VECTOR before other fold interfere
Another issue unearthed by D127115

We take a long time to canonicalize an insert_vector_elt chain before being able to convert it into a build_vector - even if they are already in ascending insertion order, we fold the nodes one at a time into the build_vector 'seed', leaving plenty of time for other folds to alter it (in particular recognising when they come from extract_vector_elt resulting in a shuffle_vector that is much harder to fold with).

D127115 makes this particularly difficult as we're almost guaranteed to have the lost the sequence before all possible insertions have been folded.

This patch proposes to begin at the last insertion and attempt to collect all the (oneuse) insertions right away and create the build_vector before its too late.

Differential Revision: https://reviews.llvm.org/D127595
2022-06-13 11:48:18 +01:00
Simon Pilgrim f97e15ef45 [ARM] Fix "local variable is initialized but not referenced" MSVX warning. NFC 2022-06-13 11:48:06 +01:00
zhongyunde 3cefcdb8c6 [test] Add test for D126700 NFC 2022-06-13 18:37:29 +08:00
Nikita Popov 7e64a29e58 [InstSimplify][IR] Handle trapping constant aggregate (PR49839)
Unfortunately, it's not just constant expressions that can trap,
we might also have a trapping constant expression nested inside
a constant aggregate.

Perform the check during phi folding on Constant rather than
ConstantExpr, and extend the Constant::mayTrap() implementation
to also recursive into ConstantAggregates, not just ConstantExprs.

Fixes https://github.com/llvm/llvm-project/issues/49839.
2022-06-13 12:35:17 +02:00
LLVM GN Syncbot d59809de16 [gn build] Port 988682a389 2022-06-13 10:23:45 +00:00
Nikita Popov c232a15df4 [InstSimplify] Add additional test for PR49839 (NFC)
This is a variant involving an aggregate constant, which was not
covered by the previous patch.
2022-06-13 12:23:30 +02:00
David Truby b4f2f7bebd [clang][AArch64][SVE] Implicit conversions for vector-scalar operations
This patch allows the same implicit conversions for vector-scalar
operations in SVE that are allowed for NEON.

Depends on D126377

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D126380
2022-06-13 10:22:10 +00:00
Nikolas Klauser 988682a389 [libc++] Fix std::lower_bound with C++20-hostile iterators
Reviewed By: EricWF, #libc

Spies: sstefan1, libcxx-commits, mgorny

Differential Revision: https://reviews.llvm.org/D127577
2022-06-13 12:19:28 +02:00
Guillaume Chatelet f9bb8c24ac [NFC][Alignment] Convert MemCpyOptimizer.cpp 2022-06-13 10:07:09 +00:00
Lucas Prates 33b9ad647e Revert "[ARM][Thumb] Command-line option to ensure AAPCS compliant Frame Records"
Reverting change due to test failure.

This reverts commit 6119053dab.
2022-06-13 11:00:49 +01:00
David Sherwood 83251896d7 [NFC][InstCombine] Refactor InstCombinerImpl::foldSelectIntoOp
Introduce a lambda function so that we remove a lot of code
duplication.

Differential Revision: https://reviews.llvm.org/D127493
2022-06-13 10:37:07 +01:00
zhongyunde c42a225545 [MachineScheduler] Order more stores by ascending address
According D125377, we order STP Q's by ascending address. While on some
targets, paired 128 bit loads and stores are slow, so the STP will split
into STRQ and STUR, so I hope these stores will also be ordered.
Also add subtarget feature ascend-store-address to control the aggressive order.

Reviewed By: dmgreen, fhahn

Differential Revision: https://reviews.llvm.org/D126700
2022-06-13 17:33:50 +08:00
Lucas Prates 6119053dab [ARM][Thumb] Command-line option to ensure AAPCS compliant Frame Records
Currently the a AAPCS compliant frame record is not always created for
functions when it should. Although a consistent frame record might not
be required in some cases, there are still scenarios where applications
may want to make use of the call hierarchy made available trough it.

In order to enable the use of AAPCS compliant frame records whilst keep
backwards compatibility, this patch introduces a new command-line option
(`-mframe-chain=[none|aapcs|aapcs+leaf]`) for Aarch32 and Thumb backends.
The option allows users to explicitly select when to use it, and is also
useful to ensure the extra overhead introduced by the frame records is
only introduced when necessary, in particular for Thumb targets.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D125094
2022-06-13 10:21:06 +01:00
Lucas Prates 7775124b5c [NFC][Thumb1] Use FrameDestroy flag to identify epilog instructions
Simiarly to what's done on both ARM's and AArch64's frame lowering code,
this updates Thumb1FrameLowering to use the FrameDestroy Machine
Instruction flag to identify instructions inserted as part of the epilog
instead of relying on assumptions about specific machine instructions.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D126285
2022-06-13 10:19:10 +01:00
Adrian Kuegel 8ab925a2fd [mlir] Fix ClangTidyPerformance finding (NFC). 2022-06-13 10:49:25 +02:00
Nikita Popov 92a9b1c918 [InstCombine] Don't push operation across loop phi
When pushing an operation across a phi node, we should avoid doing
so across a loop backedge. This is generally non-profitable, because
it does not reduce the number of times the operation is executed,
and could lead to an infinite combine loop.

The code was already guarding against this, but using an
insufficiently strong condition, which did not cover the case where
the operation was originally outside the loop (in which case the
transform moves the operation from outside the loop into the loop,
which is particularly undesirable).

Differential Revision: https://reviews.llvm.org/D127499
2022-06-13 10:48:09 +02:00
Nikita Popov 2a3288776c [InstSimplify] Update GEP test to use opaque pointers (NFC)
With opaque pointers, we end up merging these GEPs and dropping
the inrange attribute (in the last two cases). This did not happen
previously, because typed pointers use less powerful GEP folding logic.

I'm a bit unsure whether this is something we need to be concerned
about or not. I believe that generally our stance is that we should
perform folds even if this requires losing poison-generating flags
like inrange.

We can either a) accept this as-is, b) try to inhibit folding if it
requires dropping inrange or c) try to fold to poison if we know
that inrange is going to be violated.

For now, we accept it as-is.

Differential Revision: https://reviews.llvm.org/D127503
2022-06-13 10:45:55 +02:00
David Green dbac0e83d1 [AArch64] Mark smull and umull as commutative. 2022-06-13 09:24:15 +01:00
Nuno Lopes 5a132499fb [NFC] Remove straight UB from SROA tests
Including 'br undef', store/load to undef pointers.
Plus some cosmetics: select undef, insertvalue undef -> poison.

Recommit c1b6103 with fix.
2022-06-13 08:59:07 +01:00
Guillaume Chatelet 6e930503f4 [NFC][polly] Removed dead code 2022-06-13 07:50:35 +00:00
Maksim Panchenko 8f6512fea0 [X86][Disassembler] Fix displacement operand size for symbolizer
On 64-bit X86, 0x66 operand-size override prefix will change the size of
the instruction operand, e.g. from 32 bits to 16 bits, but it will not
modify the size of the displacement operand used for memory addressing,
which will always be 32 bits.

Reviewed By: skan, rafauler

Differential Revision: https://reviews.llvm.org/D126726
2022-06-13 00:14:43 -07:00
owenca b1c300fe68 [clang-format] Handle deprecated options in dump_format_style.py
Also add two deprecated options as comments back to Format.h.
2022-06-12 23:35:48 -07:00
Fangrui Song 16ca490f45 [ELF] Change getRISCVPCRelHi20 error to conventional errorOrWarn 2022-06-12 21:15:06 -07:00
Craig Topper 052536b923 [RISCV] Use isShiftedInt to improve readability. NFC 2022-06-12 21:04:45 -07:00
Kazushi (Jam) Marukawa a43c55dcd7 Revert "[NFC] Remove 'br i1 undef' from SROA tests"
Transforms/SROA/vector-promotion-different-size.ll causes errors.

This reverts commit c1b610307d.
2022-06-13 12:32:25 +09:00
Kazu Hirata 1ad01f4f7c [AArch64] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
2022-06-12 18:52:02 -07:00
Kazu Hirata 6c39687567 [Support] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
2022-06-12 18:46:25 -07:00
Kazu Hirata df792bcb02 [Transforms] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
2022-06-12 18:39:05 -07:00
Kazu Hirata 92ab024f81 [X86] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
2022-06-12 18:30:46 -07:00
Petr Hosek 186a13f647 [CMake][libcxx] Use target_include_directories for libc++ headers
This is the idiomatic way to handle include directories in CMake.

Differential Revision: https://reviews.llvm.org/D122614
2022-06-12 22:17:50 +00:00
Jez Ng d378268ead [lld-macho] Make `--icf=safe` work with LTO
Just matter of enabling the config option.

(Also changed the platform of the input test file to macOS, since that's
the default that we specify in the `%lld` substitution. The conflict was
causing errors when linking with LTO.)

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D127600
2022-06-12 17:26:08 -04:00
Jez Ng d4bcb45db7 [MC][re-land] Omit DWARF unwind info if compact unwind is present where eligible
This reverts commit d941d59783.

Differential Revision: https://reviews.llvm.org/D122258
2022-06-12 17:24:19 -04:00
Hubert Tong 775a22e32a [NFC] Remove unused variable `MF`
https://reviews.llvm.org/D127583 removed the only use of this variable
and broke builds with warnings-as-errors.
2022-06-12 16:31:55 -04:00
Nikolas Klauser 0d108f7908 [libc++] Use unsigned char in basic_string::__short again
D125496 changed the string layout on windows. Change `__is_long_` and `__size_` back to using `unsigned char` to fix the issue.

Reviewed By: Mordante, #libc

Spies: jloser, libcxx-commits, ayzhao

Differential Revision: https://reviews.llvm.org/D127566
2022-06-12 21:06:46 +02:00
Nuno Lopes 571ae1abeb fix test expected output (fixes arm buildbot failure) [NFC] 2022-06-12 19:29:00 +01:00
Simon Pilgrim 1cf9b24da3 [DAG] Enable ISD::FSHL/R SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits
This patch allows SimplifyDemandedBits to call SimplifyMultipleUseDemandedBits in cases where the source operand has other uses, enabling us to peek through the shifted value if we don't demand all the bits/elts.

This helps with several of the regressions from D125836
2022-06-12 19:25:20 +01:00
Nuno Lopes 4dd1bffc9d [clang][CodeGen] Switch a few placeholders from UndefValue to PoisonValue
This change is cosmetic, as these are dummy values that are not observable, but it
gets us closer to removing undef.
NFC
2022-06-12 19:07:59 +01:00
Craig Topper d63b66840f [RISCV] Move some methods out of RISCVInstrInfo and into RISCV namespace.
These methods don't access any state from RISCVInstrInfo. Make them
free functions in the RISCV namespace.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D127583
2022-06-12 10:47:21 -07:00
Kazu Hirata 974dbb20bd [IR] Call DenseMap::erase directly (NFC)
We can erase an item in DenseMap without checking its membership first.
2022-06-12 10:47:06 -07:00
Kazu Hirata f13019f836 [clang] Use any_of and none_of (NFC) 2022-06-12 10:17:12 -07:00
Florian Hahn b8d728a098
[SimplifyCFG,EarlyCSE] Update 2 tests to not branch on undef (NFC). 2022-06-12 18:03:26 +01:00
Florian Hahn 467491202e
[LV] Update test to use GEP so it is not dead.
The test should use the GEP for the store, so it is not dead.
2022-06-12 16:57:47 +01:00
Mehdi Amini 5d8298a768 Revert "[X86][RFC] Enable `_Float16` type support on X86 following the psABI"
This reverts commit 2d2da259c8.

This breaks MLIR integration test (JIT crashing), reverting in the
meantime.
2022-06-12 15:14:37 +00:00
Jez Ng d941d59783 Revert "[MC] Omit DWARF unwind info if compact unwind is present where eligible"
This reverts commit ef501bf85d.
2022-06-12 10:47:08 -04:00
Simon Pilgrim b5d7beeb97 [X86] combineConcatVectorOps - add support for concatenation of VSELECT/BLENDV nodes (REAPPLIED)
If the LHS/RHS selection operands can be cheaply concatenated back together then replace 2 x 128-bit selection nodes with 1 x 256-bit node

Addresses the regression introduced in the bug fix from rGd5af6a38082b39ae520a328e44dc29ebcb036bb2

REAPPLIED with for bug identified in rGea8fb3b60196
2022-06-12 15:40:36 +01:00