Commit Graph

131482 Commits

Author SHA1 Message Date
Sanjoy Das 5056e19fce Clean up comment; NFC
llvm-svn: 268835
2016-05-07 02:08:22 +00:00
Sanjoy Das 6082c1a39c Delete trailing whitespace; NFC
llvm-svn: 268834
2016-05-07 02:08:15 +00:00
Vitaly Buka e81d96be6f Revert r268810 becase it brakes msan bot.
16802==WARNING: MemorySanitizer: use-of-uninitialized-value
    lib/Target/ARM/ARMFrameLowering.cpp:1632

llvm-svn: 268833
2016-05-07 01:54:00 +00:00
Mehdi Amini 6eef08138e Refactor stripDebugInfo(Function) to handle intrinsic
This moves the code that handles stripping debug info intrinsic from
 StripDebugInfo(Module) to StripDebugInfo(Function). The latter is
already walking every instructions so it makes sense to do it at the
same time.
This makes also stripDebugInfo(Function) as an API more useful: it
is really dropping every debug info in the Function.
Finally the existing code is trigerring an assertion when the Module
is not fully materialized.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268832
2016-05-07 01:42:36 +00:00
Ahmed Bougacha 04a8fc2e37 [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
This re-applies r268760, reverted in r268794.
Fixes http://llvm.org/PR27670

The original imp-defs assertion was way overzealous: forward all
implicit operands, except imp-defs of the new super-reg def (r268787
for GR64, but also possible for GR16->GR32), or imp-uses of the new
super-reg use.
While there, mark the source use as Undef, and add an imp-use of the
old source reg: that should cover any case of dead super-regs.

At the stage the pass runs, flags are unlikely to matter anyway;
still, let's be as correct as possible.

Also add MIR tests for the various interesting cases.

Original commit message:
Codesize is less (16) or equal (8), and we avoid partial
dependencies.

Differential Revision: http://reviews.llvm.org/D19999

llvm-svn: 268831
2016-05-07 01:11:17 +00:00
Ahmed Bougacha 068ac4af39 [X86] Register and initialize the FixupBW pass.
That lets us use it in MIR tests.

llvm-svn: 268830
2016-05-07 01:11:10 +00:00
Kostya Serebryany ceca476b23 [libFuzzer] modify the docs for startup/init
llvm-svn: 268824
2016-05-06 23:51:28 +00:00
Kostya Serebryany 1ed1aeaa94 [libFuzzer] tweak the documentation about rss_limit
llvm-svn: 268822
2016-05-06 23:41:11 +00:00
Kostya Serebryany 8b8f7a3cda [libFuzzer] enhance -rss_limit_mb and enable by default. Now it will print the OOM reproducer.
llvm-svn: 268821
2016-05-06 23:38:07 +00:00
Rong Xu 35723644c2 [PGO] Use rsplit to parse value-data line in text profile file.
The value-data line is <PGOFuncName>:<Count_Value>. PGOFuncName might contain
':' for the internal linkage functions. We therefore need to use rsplit,
rather split, to extract the data from the line. This fixes the error when
merging a text profile file to an indexed profile file.

llvm-svn: 268818
2016-05-06 23:20:58 +00:00
Adrian Prantl 85338cbdb6 Implement a safer bitcode upgrade for DISubprogram.
The bitcode upgrade I added for DISubprogram in r266446 was based on the
assumption that the CU node for the subprogram was already materialized by the
time the DISubprogram is visited. This assumption may not hold true as future
versions of LLVM may decide to write out bitcode in a different order. This
patch corrects this by introducing a versioning bit next to the distinct flag to
unambiguously differentiate the new from the old record layouts.

Note for people stabilizing LLVM out-of-tree: This patch introduces a bitcode
incompatibility with llvm trunk revisions from r266446 — this commit. (But
D19987 will ensure that it degrades gracefully).

http://reviews.llvm.org/D20004
rdar://problem/26074194

llvm-svn: 268816
2016-05-06 22:53:06 +00:00
Matthias Braun 22152acf7b DetectDeadLanes: Increase precision when detecting undef inputs
In case of COPY-like instruction we may be able to deduce that a certain
input is unused, based on the used lanes of the register defined by the
instruction.
This even works accross otherwise incompatible copies (no need to have
compatible lanemasks, completely unused operands are still completely
unused). It even makes sense to redo the analysis in this case since we
gained information for a case we previously stopped at because of the
incompatible masks.

llvm-svn: 268815
2016-05-06 22:43:50 +00:00
Matthias Braun 8f429ead58 DetectDeadLanes: Cleanup, assert on some impossible cases.
llvm-svn: 268814
2016-05-06 22:43:46 +00:00
Zachary Turner 5d105a977e Drop error when trying to fallback from PDB to DWARF.
llvm-svn: 268813
2016-05-06 22:29:34 +00:00
Justin Bogner 658c0a21f1 cmake: Avoid continue, apparently that's new
llvm-svn: 268812
2016-05-06 22:22:25 +00:00
Simon Pilgrim 45964c3742 [SLPVectorizer][X86] Regenerated SEXT/ZEXT cast vectorization tests
Added 256-bit vector test as well

llvm-svn: 268811
2016-05-06 22:22:18 +00:00
Weiming Zhao 74f12d31c1 [ARM] Fix Scavenger assert due to underestimated stack size
(this is resubmit of r268529 with minor refactoring. r268529 was reverted
 at r268536 due a memory sanitizer failure.  I have not been able to
 reproduce that failure and I checked all the variable used in my change
 but I could not spot an issue. I did some refactoring and see if it will
 give a clearer hint)

Summary:
Currently, when checking if a stack is "BigStack" or not, it doesn't count into spills and arguments. Therefore, LLVM won't reserve spill slot for this actually "BigStack". This may cause scavenger failure.

Reviewers: rengolin

Subscribers: vitalybuka, aemerson, rengolin, tberghammer, danalbert, srhines, llvm-commits

Differential Revision: http://reviews.llvm.org/D19896

llvm-svn: 268810
2016-05-06 22:20:13 +00:00
Philip Reames 6f4d0088c6 Reapply 267210 with fix for PR27490
Original Commit Message
Extend load/store type canonicalization to handle unordered operations

Extend the type canonicalization logic to work for unordered atomic loads and stores.  Note that while this change itself is fairly simple and low risk, there's a reasonable chance this will expose problems in the backends by suddenly generating IR they wouldn't have seen before.  Anything of this nature will be an existing bug in the backend (you could write an atomic float load), but this will definitely change the frequency with which such cases are encountered.  If you see problems, feel free to revert this change, but please make sure you collect a test case. 

Note that the concern about lowering is now much less likely.  PR27490 proved that we already *were* mucking with the types of ordered atomics and volatiles.  As a result, this change doesn't introduce as much new behavior as originally thought.

llvm-svn: 268809
2016-05-06 22:17:01 +00:00
Zachary Turner 5a1b5ef9eb Make llvm-pdbdump print CV type records
This reuses the CVTypeDumper from libcodeview to dump full
information about type records within a PDB file.

Differential Revision: http://reviews.llvm.org/D20022
Reviewed By: rnk

llvm-svn: 268808
2016-05-06 22:15:42 +00:00
Kostya Serebryany 52b394e981 [libFuzzer] add exeprimental -rss_limit_mb flag to fight against OOMs
llvm-svn: 268807
2016-05-06 21:58:35 +00:00
Justin Bogner e88946223c CMake: generate check targets for lit suites without their own lit.cfgs
Currently our cmake generates targets like check-llvm-unit and
check-llvm-transforms-loopunroll-x86, but not check-llvm-transforms or
check-llvm-transforms-adce. This is because the search for test suites
only lists the ones with a custom lit.cfg or lit.local.cfg.

Instead, we can do something a little smarter - any directory under
test that isn't called Inputs or inside a directory called Inputs is a
test suite.

llvm-svn: 268806
2016-05-06 21:57:30 +00:00
Matthias Braun 71474e8d22 LiveIntervalAnalysis: Fix handleMove() extending liverange for undef inputs
Fix handleMove() incorrectly extending liveranges when an undef input of
a vreg was moved past the (current) end of the liverange.

llvm-svn: 268805
2016-05-06 21:47:41 +00:00
Philip Reames 4a3c3b66d7 [GVN] PRE of unordered loads
Again, fairly simple.  Only change is ensuring that we actually copy the property of the load correctly.  The aliasing legality constraints were already handled by the FRE patches.  There's nothing special about unorder atomics from the perspective of the PRE algorithm itself.

llvm-svn: 268804
2016-05-06 21:43:51 +00:00
Simon Pilgrim 2def0a878a [SLPVectorizer][X86] Added BSWAP/BITREVERSE vectorization tests
llvm-svn: 268803
2016-05-06 21:41:55 +00:00
Simon Pilgrim a2220ea456 [SLPVectorizer][X86] Added CTPOP/CTLZ/CTTZ vectorization tests
llvm-svn: 268800
2016-05-06 21:33:01 +00:00
Quentin Colombet a09f050dc1 Revert "[X86] Add a new LOW32_ADDR_ACCESS_RBP register class."
This reverts commit r268796.
I believe it breaks test/CodeGen/X86/asm-mismatched-types.ll with:
Cannot emit physreg copy instruction

llvm-svn: 268799
2016-05-06 21:21:50 +00:00
Zachary Turner 4f84e3bfcf Fix failing test due to merge conflict.
llvm-svn: 268798
2016-05-06 21:19:29 +00:00
Quentin Colombet 2728074e3c [X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
ABIs like NaCl uses 32-bit addresses but have 64-bit frame.
The new register class reflects those constraints when choosing a
register class for a address access.

llvm-svn: 268796
2016-05-06 21:10:53 +00:00
Quentin Colombet 377fc2aa3d [X86] Rename the X32_ADDR_ACCESS register class into LOW32_ADDR_ACCESS.
This register class may be used by any ABIs that uses x86_64 ISA while
using 32-bit addresses, not just in X32 cases. Make sure the name
reflects that.

llvm-svn: 268795
2016-05-06 21:10:43 +00:00
Nico Weber 9b32b4fbee Revert r268760, it caused PR27670.
llvm-svn: 268794
2016-05-06 21:07:02 +00:00
Zachary Turner 2b37017c38 Add missing include.
llvm-svn: 268792
2016-05-06 20:59:35 +00:00
Zachary Turner 819e77d196 Port DebugInfoPDB over to using llvm::Error.
Differential Revision: http://reviews.llvm.org/D19940
Reviewed By: rnk

llvm-svn: 268791
2016-05-06 20:51:57 +00:00
Sanjoy Das 091fcfa3a7 [RS4GC] Fix typo in comment
llvm-svn: 268790
2016-05-06 20:39:33 +00:00
Kevin Enderby d4e075be63 Change GenericBinaryError to no longer include a FileName, which is then not
part of the error message.

As the caller is the one that needs to add the name of where the "object file"
comes from to the error message as the object file could be in an archive, or
coming from a slice of a Mach-O universal file or a buffer created by a JIT.

In the cases of a Mach-O universal file the architecture name may or may not
also need to be printed which is up to the tool code.  For example if the tool
code is only selecting the host architecture slice then that architecture name
is never printed.

This patch is the change to the libObject code and there will be follow on
commits for changes to the code for each tool.

llvm-svn: 268789
2016-05-06 20:16:28 +00:00
Kostya Serebryany 62023f24ed [libFuzzer] more trophies
llvm-svn: 268788
2016-05-06 20:14:48 +00:00
Ahmed Bougacha 505984b466 [X86] Accept imp-defs of GR64 super-registers in FixupBW MOVrr.
Testcase will follow shortly.

llvm-svn: 268787
2016-05-06 20:03:03 +00:00
Marcin Koscielnicki b088ad1e09 [MSan] [X86] Fix vararg helper for fixed arguments in overflow area.
This fixes http://llvm.org/PR27646 on x86_64.

Differential Revision: http://reviews.llvm.org/D19997

llvm-svn: 268783
2016-05-06 19:36:56 +00:00
Artem Tamazov f0b6b40fa4 [AMDGPU][llvm-mc] Some refactoring of .td files
Some custom Operands and AsmOperandClasses moved to proper place.
No functional changes.

Differential Revision: http://reviews.llvm.org/D20012

llvm-svn: 268780
2016-05-06 19:32:38 +00:00
Adrian Prantl 541a9c58d4 Refactor the Verifier so it can diagnose IR validation errors and debug
info metadata errors separately. (NFC)

This patch refactors the Verifier so it can diagnose IR validation errors
and debug info metadata errors separately.
The motivation behind this change is that broken (or outdated) debug info
can be "recovered" from by stripping the debug info.

The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info.
We want to be able to make the verifier stricter without having to worry
about breaking bitcode compatibility with existing producers. For example,
we don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.

http://reviews.llvm.org/D19986
rdar://problem/25818489

llvm-svn: 268778
2016-05-06 19:26:47 +00:00
Krzysztof Parzyszek adb7ff0283 [Hexagon] Be careful about anti-dependencies with a call in packetizer
In a case like
  J2_callr <ga:@foo>, %R0<imp-use>, ...
  R0<def> = ...
the anti-dependency on R0 cannot be ignored and the two instructions
cannot be packetized together, since if they were, the assignment to
R0 would take place before the call.

llvm-svn: 268776
2016-05-06 19:13:38 +00:00
Philip Reames 1fdce639d2 [GVN] Handle unordered atomics in cross block FRE
You'll note there are essentially no code changes here.  Cross block FRE heavily reuses code from the block local FRE.  All of the tricky parts were done as part of the previous patch and the refactoring that removed the original code duplication.  

llvm-svn: 268775
2016-05-06 18:46:45 +00:00
Justin Bogner c45c960006 SDAG: Don't leave dangling dead nodes after SelectCodeCommon
Relying on the caller to clean up after we've replaced all uses of a
node won't work when we've migrated to the `void Select(...)` API.

llvm-svn: 268774
2016-05-06 18:42:16 +00:00
Eric Christopher e3f7d3df3c The associated PR for this test was PR27135 not PR27132.
llvm-svn: 268772
2016-05-06 18:23:14 +00:00
Quentin Colombet a065ac45ee [X86] Get rid of X32_NOREX_ADDR_ACCESS register class.
According to H.J. Lu <hjl.tools@gmail.com>, this register class is never
used.

llvm-svn: 268771
2016-05-06 18:22:48 +00:00
Philip Reames ae8997f496 [GVN] Do local FRE for unordered atomic loads
This patch is the first in a small series teaching GVN to optimize unordered loads aggressively. This change just handles block local FRE because that's the simplest thing which lets me test MDA, and the AvailableValue pieces. Somewhat suprisingly, MDA appears fine and only a couple of small changes are needed in GVN.

Once this is in, I'll tackle non-local FRE and PRE. The former looks like a natural extension of this, the later will require a couple of minor changes.

Differential Revision: http://reviews.llvm.org/D19440

llvm-svn: 268770
2016-05-06 18:17:13 +00:00
Mehdi Amini 31407ba009 Tweak the ThinLTO pass pipeline
Summary:
The original ThinLTO pipeline was derived from some
work I did tuning FullLTO on the test suite and SPEC. This
patch reduces the amount of work done in the "linker phase" of
the build, and extend the function simplifications passes
performed during the "compile phase". This helps the build time
by reducing the IR as much as possible during the compile phase
and limiting the work to be performed during the "link phase",
while keeping the performance "on par" with the existing pipeline.

Reviewers: tejohnson

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D19773

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268769
2016-05-06 18:17:03 +00:00
Sanjay Patel 1cb6241a89 [SimplifyCFG] propagate branch metadata when creating select (retry r268550 / r268751 with possible fix)
Retrying r268550/r268751 which were reverted at r268577/r268765 due a memory sanitizer failure.
I have not been able to reproduce that failure, but I've taken another guess at fixing
the problem in this version of the patch and will watch for another failure.

Original commit message:
Unlike earlier similar fixes, we need to recalculate the branch weights
in this case.

Differential Revision: http://reviews.llvm.org/D19674

llvm-svn: 268767
2016-05-06 18:07:46 +00:00
Sanjay Patel 84a0bf64a8 revert r268751 - caused same failures on msan bot
llvm-svn: 268765
2016-05-06 17:51:37 +00:00
Simon Pilgrim b3f5cb7a65 [CostModel][X86] Tweak 'SSE2-only' test CPU as it was only disabling SSE41 not SSE3/SSSE3 etc.
llvm-svn: 268763
2016-05-06 17:50:07 +00:00
Artem Tamazov ebe71ce36a [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
Added support for sendmsg(MSG[, OP[, STREAM_ID]]) syntax
in s_sendmsg and s_sendmsghalt instructions.
The syntax matches the SP3 assembler/disassembler rules.
That is why implicit inputs (like M0 and EXEC) are not printed
to disassembly output anymore.

sendmsg(...) allows only known message types and attributes,
even if literals are used instead of symbolic names.
However, raw literal (without "sendmsg") still can be used,
and that allows for any 16-bit value.

Tests updated/added.

Differential Revision: http://reviews.llvm.org/D19596

llvm-svn: 268762
2016-05-06 17:48:48 +00:00
Simon Pilgrim 93d9b96bdb [CostModel][X86] Added ctlz/cttz undef-zero costmodel tests
llvm-svn: 268761
2016-05-06 17:48:35 +00:00
Ahmed Bougacha 258426ca7a [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
Codesize is less (16) or equal (8), and we avoid partial dependencies.

Differential Revision: http://reviews.llvm.org/D19999

llvm-svn: 268760
2016-05-06 17:42:57 +00:00
Ahmed Bougacha 04200a7c86 [X86] Remove \brief in FixupBW. NFC.
llvm-svn: 268754
2016-05-06 17:28:47 +00:00
Ahmed Bougacha cfd9e55e90 [X86] Simplify FixupBW sub_8bit_hi-related logic. NFC.
Instead of passing around sizes and asking for subregs, we can check
the subreg indices we care about: sub_8bit_hi and sub_8bit.

Differential Revision: http://reviews.llvm.org/D20006

llvm-svn: 268753
2016-05-06 17:28:42 +00:00
Geoff Berry f8862968db [AArch64] Fix test to specify triple and disable post-RA scheduling.
This should fix bot breakage caused by r268746:
[AArch64] Combine callee-save and local stack SP adjustment instructions.

llvm-svn: 268752
2016-05-06 17:12:38 +00:00
Sanjay Patel 6609510c32 [SimplifyCFG] propagate branch metadata when creating select (retry r268550 with possible fix)
Retrying r268550 which was reverted at r268577 due a memory sanitizer failure.
I have not been able to reproduce that failure, but I've taken a guess at fixing
the problem in this version of the patch and will watch for another failure.

Original commit message:
Unlike earlier similar fixes, we need to recalculate the branch weights
in this case.

Differential Revision: http://reviews.llvm.org/D19674

llvm-svn: 268751
2016-05-06 17:07:47 +00:00
Geoff Berry a5335647d5 [AArch64] Combine callee-save and local stack SP adjustment instructions.
Summary:
If a function needs to allocate both callee-save stack memory and local
stack memory, we currently decrement/increment the SP in two steps:
first for the callee-save area, and then for the local stack area.  This
changes the code to allocate them both at once at the very beginning/end
of the function.  This has two benefits:

1) there is one fewer sub/add micro-op in the prologue/epilogue

2) the stack adjustment instructions act as a scheduling barrier, so
moving them to the very beginning/end of the function increases post-RA
scheduler's ability to move instructions (that only depend on argument
registers) before any of the callee-save stores

This change can cause an increase in instructions if the original local
stack SP decrement could be folded into the first store to the stack.
This occurs when the first local stack store is to stack offset 0.  In
this case we are trading off one more sub instruction for one fewer sub
micro-op (along with benefits (2) and (3) above).

Reviewers: t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18619

llvm-svn: 268746
2016-05-06 16:34:59 +00:00
Jun Bum Lim 33be4997ed [AArch64] Decouple zero store promotion from narrow ld merge. NFC.
Summary: This change refactors to decouple the zero store promotion from the narrow ld merge and add a flag (enable-narrow-ld-merge=true) to control the narrow ld merge optimization.

Reviewers: jmolloy, t.p.northover, mcrosier

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19885

llvm-svn: 268744
2016-05-06 15:08:57 +00:00
Nikolay Haustov 6eb050ea4e Revert "AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2."
This reverts commit 47486d52454d60cdf6becc0b2efe533c73794380.

It broke calling OpenCL kernel from another kernel.

llvm-svn: 268739
2016-05-06 14:59:04 +00:00
Simon Pilgrim 5122c64fd8 [CostModel][X86] Added costmodel tests for vector ctpop/ctlz/cttz/bitreverse/bswap
llvm-svn: 268738
2016-05-06 14:38:14 +00:00
Daniel Sanders 8de3d3cad6 [mips] Fix inconsistent .cprestore behaviour between direct object emission and assembling.
Summary:
Direct object emission has an initialization order problem where an
InitMCObjectFile is called after MipsTargetELFStreamer determines whether
PIC is enabled by default or not. There doesn't seem to be point that
initializes all cases so split the responsibility between
MipsTargetELFStreamer and MipsAsmPrinter.

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D19728

llvm-svn: 268737
2016-05-06 14:37:24 +00:00
Chad Rosier 4ab37c0037 [SimplifyCFG] Prefer a simplification based on a dominating condition.
Rather than merge two branches with a common destination.
Differential Revision: http://reviews.llvm.org/D19743

llvm-svn: 268735
2016-05-06 14:25:14 +00:00
Daniel Sanders a463d31a64 [mips] Correct the ordering of HI/LO pairs in the relocation table.
Summary:
There seems to have been a misunderstanding as to the meaning of 'offset' in
the rules laid down by our ABI. The previous code believed that 'offset' meant
the offset within the section that the relocation is applied to. However, it
should have meant the offset from the symbol used in the relocation expression.

This patch adds two fields to ELFRelocationEntry and uses them to correct the
order of relocations for MIPS. These fields contain:
* The original symbol before shouldRelocateWithSymbol() is considered. This
  ensures that R_MIPS_GOT16 is able to correctly distinguish between local and
  external symbols, allowing us to tell whether %got() requires a matching
  %lo() or not (local symbols require one, external symbols don't). It also
  prevents confusing cases where the fuzzy matching rules cause things like
  %hi(foo)/%lo(foo+3) and %hi(bar)/%lo(bar+1) to swap their %lo()'s.
* The original offset before shouldRelocateWithSymbol() is considered. The
  existing Addend field is always zero when the object uses in place addends
  (because it's already moved it to the encoding) but MIPS needs to use the
  original offset to ensure that the linker correctly calculates the carry-in
  bit for %hi() and %got().

IAS ensures that unmatchable %hi()/%got() relocations are placed at the end of
the table to ensure that the linker rejects the table (we're unable to report
such errors directly). The alternatives to this risk accidental matching
against inappropriate relocations which may silently compute incorrect values
due to an incorrect carry bit between the %lo() and %hi()/%got().

Reviewers: sdardis

Subscribers: dsanders, sdardis, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D19718

llvm-svn: 268733
2016-05-06 13:49:25 +00:00
Daniel Sanders f9d8b8ccc5 [mips][mips16] Use isUnconditionalBranch() in AnalyzeBranch() and constant island pass.
Summary:
This stops it misidentifying unconditional branches as conditional branches
which fixes a -verify-machineinstrs error about exiting a function via fall through.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19864

llvm-svn: 268731
2016-05-06 13:23:51 +00:00
Daniel Sanders a6cda12179 [mips][fastisel] Conditional moves do not have implicit operands.
Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19862

llvm-svn: 268730
2016-05-06 12:57:26 +00:00
Sam Kolton 5f10a137d0 [TableGen] AsmMatcher: support for default values for optional operands
Summary:
This change allows to specify "DefaultMethod" for optional operand (IsOptional = 1) in AsmOperandClass that return default value for operand. This is used in convertToMCInst to set default values in MCInst.
Previously if you wanted to set default value for operand you had to create custom converter method. With this change it is possible to use standard converters even when optional operands presented.

Reviewers: tstellarAMD, ab, craig.topper

Subscribers: jyknight, dsanders, arsenm, nhaustov, llvm-commits

Differential Revision: http://reviews.llvm.org/D18242

llvm-svn: 268726
2016-05-06 11:31:17 +00:00
Ryan Govostes 6194ae69fe Fix whitespace and line wrapping. NFC.
llvm-svn: 268725
2016-05-06 11:22:11 +00:00
Ryan Govostes 3f37df0326 [asan] add option to set shadow mapping offset
Allowing overriding the default ASAN shadow mapping offset with the
-asan-shadow-offset option, and allow zero to be specified for both offset and
scale.

Patch by Aaron Carroll <aaronc@apple.com>.

llvm-svn: 268724
2016-05-06 10:25:22 +00:00
Dylan McKay 6d8078f993 [AVR] Add a majority of the backend code
Summary: This adds the majority of the AVR backend.

Reviewers: hfinkel, dsanders, vkalintiris, arsenm

Subscribers: dylanmckay

Differential Revision: http://reviews.llvm.org/D17906

llvm-svn: 268722
2016-05-06 10:12:31 +00:00
Silviu Baranga f578140ba6 Attempt to fix the modules builder by declaring SCEV in LoopUtils.h
llvm-svn: 268720
2016-05-06 09:37:14 +00:00
Nikolay Haustov dc1bb79b92 AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
Summary:
    Check calling convention in AMDGPUMachineFunction::isKernel

    This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.

    Also, in the future unused non-kernels may be optimized.

    Reviewers: tstellarAMD, arsenm

    Subscribers: arsenm, joker.eph, llvm-commits

    Differential Revision: http://reviews.llvm.org/D19917

llvm-svn: 268719
2016-05-06 09:23:13 +00:00
Nikolay Haustov 1f7732abfa AMDGPU/SI: Add amdgpu_kernel calling convention. Part 1.
Summary:
This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.

Also, in the future unused non-kernels may be optimized.

For now, also accept SPIR_KERNEL for HCC frontend.

Also, add bitcode compatibility tests for missing calling conventions
except AVR_BUILTIN which doesn't have parse code.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, joker.eph, llvm-commits
llvm-svn: 268717
2016-05-06 09:07:29 +00:00
Mehdi Amini 3b132e34b0 ThinLTO: fix assertion and refactor check for hidden use from inline ASM in a helper function
This test was crashing, and currently it breaks bootstrapping clang with debuginfo

Differential Revision: http://reviews.llvm.org/D20008

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268715
2016-05-06 08:25:33 +00:00
Zlatko Buljan 31c9ebe281 [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions
Differential Revision: http://reviews.llvm.org/D15744

llvm-svn: 268714
2016-05-06 08:24:14 +00:00
Craig Topper c6b3669884 [TableGen] Fix a memory leak when creating SwitchOpcodeMatchers.
llvm-svn: 268712
2016-05-06 06:56:14 +00:00
Craig Topper 332dd6614a [TableGen] Remove isSafeToReorderWithPatternPredicate from DAGISelMatchers as its not used anymore.
llvm-svn: 268711
2016-05-06 06:21:27 +00:00
Xinliang David Li 8aebf44c97 [PM] port IR based PGO prof-gen pass to new pass manager
llvm-svn: 268710
2016-05-06 05:49:19 +00:00
Peter Collingbourne 832e7fa579 BitcodeWriter: Simplify. NFC.
llvm-svn: 268707
2016-05-06 02:41:23 +00:00
Craig Topper 05e772b36b [TableGen] Remove getHash support from DAGISelMatcher. It hasn't been used for some time.
llvm-svn: 268706
2016-05-06 02:37:59 +00:00
Craig Topper b3fb529cc6 [TableGen] Remove SinkPatternPredicates from the DAG isel matcher optimizer.
Pattern predicates already appear to be emitted as far down as they can be. The optimization was making no changes on any in-tree target.

llvm-svn: 268705
2016-05-06 02:37:56 +00:00
Xinliang David Li 779dd2db95 [profile] Remove another unneeded field in raw profile reader
DataValueSize is now removed. The change is consolidated
with previous raw version bump.

llvm-svn: 268703
2016-05-06 02:13:00 +00:00
Xinliang David Li 93607e6bee document version change
llvm-svn: 268702
2016-05-06 01:41:24 +00:00
Philip Reames 32b55181fa [EarlyCSE] Rename a variable for clarity [NFC]
llvm-svn: 268701
2016-05-06 01:13:58 +00:00
Ahmed Bougacha 16547c4e31 [CodeGen] Round [SU]INT_TO_FP result when promoting from f16.
If we don't, values that aren't precisely representable in f16 could
be used as-is in a promoted f32 operation, which would produce
incorrect results.

AArch64 had the correct behavior; add a focused test.

Fixes http://llvm.org/PR26871

llvm-svn: 268700
2016-05-06 00:58:00 +00:00
Rui Ueyama 02d71ade06 Make StringTableBuilder to cache hash values.
This change seems to speed up LLD a bit if it has a lot of mergeable
sections. The number is below. It's not too bad for a small patch.

Time to link Clang (debug build):

w/o patch 6.3696 seconds
w/patch   6.2746 seconds (-1.5%)

Differential Revision: http://reviews.llvm.org/D19933

llvm-svn: 268698
2016-05-06 00:51:58 +00:00
Justin Bogner 2a42da996d Object: Fix two -Wpessimizing-move warnings after r268694
llvm-svn: 268697
2016-05-05 23:59:57 +00:00
Kevin Enderby 1e3abcbe76 Fix window bots failures due to r268694 - Cleanup and refactor of malformedError() in lib/Object/MachOObjectFile.cpp .
llvm-svn: 268696
2016-05-05 23:55:27 +00:00
Adam Nemet 724ab22378 [LAA] Fix confusing debug message
This message used to be correct, when all we cared about was whether the
dependence was safe (i.e. NoDep) or unsafe.  With the current more
precise characterization, this is a forward dep.

llvm-svn: 268695
2016-05-05 23:41:28 +00:00
Kevin Enderby 8913496b77 Cleanup and refactor of malformedError() in lib/Object/MachOObjectFile.cpp .
No functional change.

llvm-svn: 268694
2016-05-05 23:41:05 +00:00
Justin Bogner b012699741 SDAG: Rename Select->SelectImpl and repurpose Select as returning void
This is a step towards removing the rampant undefined behaviour in
SelectionDAG, which is a part of llvm.org/PR26808.

We rename SelectionDAGISel::Select to SelectImpl and update targets to
match, and then change Select to return void and consolidate the
sketchy behaviour we're trying to get away from there.

Next, we'll update backends to implement `void Select(...)` instead of
SelectImpl and eventually drop the base Select implementation.

llvm-svn: 268693
2016-05-05 23:19:08 +00:00
Justin Bogner 465886ece1 SDAG: Remove OPC_MarkGlueResults and associated logic. NFC
This opcode never happens in practice, and yet the logic we have in
place to handle it would be undefined behaviour if we ever executed
it. Remove it rather than trying to refactor code that's never
reached.

llvm-svn: 268692
2016-05-05 22:37:45 +00:00
Krzysztof Parzyszek 897574311f [scan-build] fix warnings emitted on LLVM Hexagon code base
Patch by Apelete Seketeli.

Differential Revision: http://reviews.llvm.org/D19968

llvm-svn: 268691
2016-05-05 22:00:44 +00:00
Krzysztof Parzyszek 6bd4268302 [Hexagon] Fix the offset ranges for vector memory instructions
llvm-svn: 268690
2016-05-05 21:58:02 +00:00
Eugene Zelenko 7b4e465ac6 Fix some Clang-tidy readability-simplify-boolean-expr and Include What You Use warnings.
Differential revision: reviews.llvm.org/D19946

llvm-svn: 268689
2016-05-05 21:35:47 +00:00
Xinliang David Li 28a932742c [PM] port Branch Frequency Analaysis pass to new PM
llvm-svn: 268687
2016-05-05 21:13:27 +00:00
Davide Italiano f54f2f0893 [PM] Port Interprocedural SCCP to the new pass manager.
llvm-svn: 268684
2016-05-05 21:05:36 +00:00
Reid Kleckner 745f3cbcfc [codeview] Improve some comments
This FIXME was already fixed, and these LF_* enum names were
inconsistent.

llvm-svn: 268683
2016-05-05 20:58:46 +00:00
Chad Rosier 777dc513a0 [AArch64] Remove unused MBP headers/dependency. NFC.
llvm-svn: 268682
2016-05-05 20:58:38 +00:00
Dehao Chen f50c67ce7c Revert http://reviews.llvm.org/D19926 as it breaks tests.
llvm-svn: 268681
2016-05-05 20:47:53 +00:00
Mehdi Amini 5eba657ff3 Revert "LTOCodeGenerator: handle correctly "unnamed" symbol"
This reverts commit r268658.

I incorrectly diagnose this as the source of an assertion during an
LTO bootstrap of clang.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268680
2016-05-05 20:44:21 +00:00
Dan Gohman 450a80754f [WebAssembly] Don't emit epilogue code in the middle of stackified code.
llvm-svn: 268679
2016-05-05 20:41:15 +00:00
Reid Kleckner 338034759a Fix CVTypeDumperImpl formatting after class rename
llvm-svn: 268678
2016-05-05 20:31:16 +00:00
Reid Kleckner 18399b0ddc Remove unnecessary anonymous namespace from a header
llvm-svn: 268677
2016-05-05 20:30:48 +00:00
Matt Arsenault 539ca882c6 AMDGPU: Simplify control flow / conditions
llvm-svn: 268676
2016-05-05 20:27:02 +00:00
Dehao Chen e48b4ee98c Simplify CFG before assigning discriminator.
Summary: We need to clean up CFG before assigning discriminator to minimize the impact of optimization on debug info.

Reviewers: davidxl, dblaikie, dnovillo

Subscribers: dnovillo, danielcdh, llvm-commits

Differential Revision: http://reviews.llvm.org/D19926

llvm-svn: 268675
2016-05-05 20:18:49 +00:00
Marcin Koscielnicki 60061c21cb [MSan] [MIPS64] Fix vararg helper for >1 fixed argument.
This fixes http://llvm.org/PR27646 on Mips64.

Differential Revision: http://reviews.llvm.org/D19989

llvm-svn: 268673
2016-05-05 20:13:17 +00:00
Matt Arsenault 6689abe632 AMDGPU: Run r600 tests last
llvm-svn: 268672
2016-05-05 20:07:37 +00:00
Mehdi Amini 8eb3397a73 Degrade assertions to a warning in LTOCodeGenerator for preserved linkonce
The assertions were assuming that the linker will not ask to preserve
a global that is internal or available_externally, as it does not
really make sense. In practice this break the bootstrap of clang,
I degrade to a warning for now.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268671
2016-05-05 20:05:33 +00:00
Chris Bieneman 62de33c2db Remove LLVM_ENABLE_TIMESTAMPS
Summary:
As per the discussion on LLVM-dev this patch proposes removing LLVM_ENABLE_TIMESTAMPS.

The only complicated bit of this patch is the Windows support. On windows we used to log an error if /INCREMENTAL was passed to the linker when timestamps were disabled.

With this change since timestamps in code are always disabled we will always compile on windows with /Brepro unless /INCREMENTAL is specified, and we will log a warning when /INCREMENTAL is specified to notify the user that the build will be non-deterministic.

See: http://lists.llvm.org/pipermail/llvm-dev/2016-May/098990.html

Reviewers: bogner, silvas, rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19892

llvm-svn: 268670
2016-05-05 19:57:03 +00:00
Sean Silva daa902a4b9 Add a note about the "entry count" used the profile summary
Thanks to David Li for the clarification.

llvm-svn: 268669
2016-05-05 19:54:13 +00:00
Xinliang David Li 188a7c5f9e [profile] Remove unneeded field in raw profile reader
Differential Revision: http://reviews.llvm.org/D19956

llvm-svn: 268667
2016-05-05 19:41:18 +00:00
NAKAMURA Takumi 2eec13680e Touch Hexagon/CMakeLists.txt to regenerate build files, since r268641 complains of missing HexagonAlias.td on ninja.
FIXME: TableGen.cmake globs *.td(s) with wildcards for deps. It is not good.
llvm-svn: 268666
2016-05-05 19:28:01 +00:00
Tim Northover df43264cf7 ARM: don't attempt to merge litpools referencing different PC-anchors.
Given something like:

    ldr r0, .LCPI0_0 (== pc-rel var)
    add r0, pc

    ldr r1, .LCPI0_1 (== pc-rel var)
    add r1, pc

we cannot combine the 2 ldr instructions and litpools because they get added to
a different pc to form the correct address. I think the original logic came
from a time when we fused the LDRpci/PICADD instructions into one
pseudo-instruction so the PC was always immediately at-hand. That's no longer
the case.

Should fix general-dynamic TLS access on Linux, and quite possibly other -fPIC
code that relies on litpools (e.g. v6m and -Oz compilations) though trivial
tweaks of the .ll test didn't provoke anything.

llvm-svn: 268662
2016-05-05 18:38:53 +00:00
Krzysztof Parzyszek f7a4bd4068 [Hexagon] Add aliases for vector loads/stores with no explicit offset
The mem(r0) instructions are treated as mem(r0+#0).

llvm-svn: 268661
2016-05-05 18:38:35 +00:00
Vitaly Buka 1df2338bb6 Revert "[ThinLTO] Emit individual index files for distributed backends"
MemorySanitizer: use-of-uninitialized-value in lib/Bitcode/Writer/BitcodeWriter.cpp:364:70
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/12544/steps/check-llvm%20msan/logs/stdio

This reverts commit 0c4a898ea550699d1b2f4fe3767251c8f9a48d52.

llvm-svn: 268660
2016-05-05 18:31:00 +00:00
Mehdi Amini 2ee1874aa8 LTOCodeGenerator: handle correctly "unnamed" symbol
This should fix the assertions in a clang LTO bootstrap we're seeing.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268658
2016-05-05 18:14:55 +00:00
Matthias Braun 0e881d61c1 MachineFunction: Add a const modifier to print() parameter
llvm-svn: 268657
2016-05-05 18:14:43 +00:00
Kostya Serebryany ec77af3a4b [libFuzzer] better docs for coverage
llvm-svn: 268656
2016-05-05 18:07:09 +00:00
Chad Rosier b438a327d7 Remove dead include. NFC.
llvm-svn: 268655
2016-05-05 17:55:51 +00:00
Chad Rosier 799e4c6fc3 Remove dead include. NFC.
llvm-svn: 268654
2016-05-05 17:53:43 +00:00
Kevin Enderby b34e3a1877 Clean up the specific error message for a malformed Mach-O files with bad segment
load commands.

The existing test case in test/Object/macho-invalid.test for
macho-invalid-too-small-segment-load-command has a cmdsize of 55, while
being too small also it is not a multiple of 4.  So when that check is added
this test case will produce a different error. So I constructed a new test case
that will trigger the intended error.

I also changed the error message to be consistent with the other malformed Mach-O
file error messages which prints the load command index.  I also removed both
object_error::macho_load_segment_too_small and
object_error::macho_load_segment_too_many_sections from Object/Error.h
as they are not needed and can just use object_error::parse_failed and let the
error message string distinguish the specific error.

llvm-svn: 268652
2016-05-05 17:43:35 +00:00
Chad Rosier 226a734f1a [ValueTracking] Early exit when further analysis won't be fruitful.
This should have NFC in the context of codegen, but may have positive
implications on compile-time.

llvm-svn: 268651
2016-05-05 17:41:19 +00:00
Nicolai Haehnle ffbd56a1c9 AMDGPU: Uniform branch conditions can originate with intrinsics
Summary:
Discovered by Dave Airlie, fixes an assertion in Khronos OpenGL CTS
GL43-CTS.shader_storage_buffer_object.advanced-matrix.

In this particular case, the buffer load intrinsic fed into a uniform
conditional branch, and led the brcond lowering down the wrong path.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19931

llvm-svn: 268650
2016-05-05 17:36:36 +00:00
Tom Stellard fcfaea4cff AMDGPU/SI: Add support for AMD code object version 2.
Summary:
Version 2 is now the default.  If you want to emit version 1, use
the amdgcn--amdhsa-amdcov1 triple.

Reviewers: arsenm, kzhuravl

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19283

llvm-svn: 268647
2016-05-05 17:03:33 +00:00
Hans Wennborg 501e739d8a X86CallFrameOptimization: make adjustCallSequence's return type void
It always returned the same value (true). No functionality change.

llvm-svn: 268645
2016-05-05 16:39:31 +00:00
Mehdi Amini 03abce901c llvm-lto: add a -thinlto-module-id that enables to force the Module identifier.
ThinLTO is using the Module Identifier to find the corresponding entry
in the index. However when reproducing part of the flow from temporary
files generated from the linker, you'd like to process a file and
force llvm-lto to use another module identifier than the current
filename. The alternative would be to tweak the index, which would be
more involved.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268643
2016-05-05 16:33:51 +00:00
Krzysztof Parzyszek 8da817d1ca [Hexagon] Merge HexagonAlias.td into HexagonInstrAlias.td, NFC
llvm-svn: 268641
2016-05-05 16:19:36 +00:00
Chad Rosier 25cfb7dbd6 [ValueTracking] Improve isImpliedCondition for matching LHS and Imm RHSs.
llvm-svn: 268636
2016-05-05 15:39:18 +00:00
Krzysztof Parzyszek e57662d5ec [Hexagon] Handle operand type differences for A2_tfrpi
The instruction A2_tfrpi has a 64-bit operand, while the corresponding
intrinsic takes a 32-bit value. The actual value has only 8 significant
bits, so the difference is only in the type used to represent it.
In order to map the intrinsic to the instruction, the operand needs to
be extended to the correct type.

llvm-svn: 268635
2016-05-05 15:29:47 +00:00
Silviu Baranga 28eb344140 Fix unused variable warning after r268632
llvm-svn: 268634
2016-05-05 15:27:57 +00:00
Silviu Baranga c05bab8a9c [LV] Identify more induction PHIs by coercing expressions to AddRecExprs
Summary:
Some PHIs can have expressions that are not AddRecExprs due to the presence
of sext/zext instructions. In order to prevent the Loop Vectorizer from
bailing out when encountering these PHIs, we now coerce the SCEV
expressions to AddRecExprs using SCEV predicates (when possible).

We only do this when the alternative would be to not vectorize.

Reviewers: mzolotukhin, anemet

Subscribers: mssimpso, sanjoy, mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D17153

llvm-svn: 268633
2016-05-05 15:20:39 +00:00
Silviu Baranga 7e0d4353f2 [LV] Refactor the validation of PHI inductions. NFC
This moves the validation of PHI inductions into a
separate method, making it easier to reuse this
logic.

llvm-svn: 268632
2016-05-05 15:14:01 +00:00
James Y Knight 0c145c0c3a Remove bit-rotten CppBackend.
This backend was supposed to generate C++ code which will re-construct
the LLVM IR passed as input. This seems to me to have very marginal
usefulness in the first place.

However, the code has never been updated to use IRBuilder, which makes
its current value negative -- people who look at the output may be
steered to use the *wrong* C++ APIs to construct IR.

Furthermore, it's generated code that doesn't compile since at least
2013.

Differential Revision: http://reviews.llvm.org/D19942

llvm-svn: 268631
2016-05-05 14:35:40 +00:00
Nirav Dave 996fc133b7 Fix Mips Parser error reporting
[mips] On error, ParseDirective should always return false to signify that the
directive was understood.

Reviewers: dsanders, vkalintiris, sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D19929

llvm-svn: 268630
2016-05-05 14:15:46 +00:00
Teresa Johnson f8cbd6591f Fix Windows bot failures from r268627
Remove "/" path separator from expected pattern which should fix a
couple of Windows bots that have failed:

http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/4816
http://bb.pgr.jp/builders/ninja-clang-i686-msc19-R/builds/2610

llvm-svn: 268629
2016-05-05 14:10:57 +00:00
Teresa Johnson 9254ebe3c0 [ThinLTO] Emit individual index files for distributed backends
Summary:
When launching ThinLTO backends in a distributed build (currently
supported in gold via the thinlto-index-only plugin option), emit
an individual index file for each backend process as described here:
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098272.html

The individual index file encodes the summary and module information
required for implementing the importing/exporting decisions made
for a given module in the thin link step.
This is in place of the current mechanism that uses the combined index
to make importing decisions in each back end independently. It is an
enabler for doing global summary based optimizations in the thin link
step (which will be recorded in the individual index files), and reduces
the size of the index that must be sent to each backend process, and
the amount of work to scan it in the backends.

Rather than create entirely new ModuleSummaryIndex structures (and all
the included unique_ptrs) for each backend index file, a map is created
to record all of the GUID and summary pointers needed for a particular
index file. The IndexBitcodeWriter walks this map instead of the full
index (hiding the details of managing the appropriate summary iteration
in a new iterator subclass). This is more efficient than walking the
entire combined index and filtering out just the needed summaries during
each backend bitcode index write.

Depends on D19481.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D19556

llvm-svn: 268627
2016-05-05 13:44:56 +00:00
Marcin Koscielnicki 0275fac2c9 [X86] Extend some Linux special cases to cover kFreeBSD.
Both Linux and kFreeBSD use glibc, so follow similiar code paths.
Add isTargetGlibc to check for this, and use it instead of isTargetLinux
in a few places.

Fixes PR22248 for kFreeBSD.

Differential Revision: http://reviews.llvm.org/D19104

llvm-svn: 268624
2016-05-05 11:35:51 +00:00
Igor Kudrin 27d8dd39cf [Coverage] Combine counts of expansion regions if there are no code regions for the same area.
Differential Revision: http://reviews.llvm.org/D18831

llvm-svn: 268620
2016-05-05 09:39:45 +00:00
Craig Topper 94753520c6 [TableGen] Make sure to recursively factor any ScopeMatchers created while forming a SwitchType node. Remove a couple hundred bytes from the X86 matcher table.
llvm-svn: 268611
2016-05-05 06:19:27 +00:00
Craig Topper d34bf350b2 [TableGen] Remove stale comment.
llvm-svn: 268610
2016-05-05 06:19:25 +00:00
David Majnemer 911d0e3c21 [X86] Use the right type when folding xor (truncate (shift)) -> setcc
The result type of setcc is dependent on whether or not AVX512 is
present.
We had an X86-specific DAG-combine which assumed that the result type
should be i8 when it could be i1.
This meant that we would generate illegal setccs which LowerSETCC did
not like.

Instead, use an appropriate type and zero extend to i8.

Also, there were some scenarios where the fold should have fired but
didn't because we were overly cautious about the types.  This meant that
we generated:

        shrl    $31, %edi
        andl    $1, %edi
        kmovw   %edi, %k0
        kxnorw  %k0, %k0, %k1
        kshiftrw        $15, %k1, %k1
        kxorw   %k1, %k0, %k0
        kmovw   %k0, %eax

instead of:

        testl   %edi, %edi
        setns   %al

This fixes PR27638.

llvm-svn: 268609
2016-05-05 06:00:56 +00:00
Mehdi Amini 022b5bcb7a LTOCodeGenerator: add linkonce(_odr) to "llvm.compiler.used" when present in "MustPreserve" set
If the linker requested to preserve a linkonce function, we should
honor this even if we drop all uses.
We explicitely avoid turning them into weak_odr (unlike the first
version of this patch in r267644), because the codegen can be
different on Darwin: because of `llvm::canBeOmittedFromSymbolTable()`
we may emit the symbol as weak_def_can_be_hidden instead of
weak_definition.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268607
2016-05-05 05:14:24 +00:00
Mehdi Amini 752ffe9c5f Revert "LTOCodeGenerator: turns linkonce(_odr) into weak_(odr) when present "MustPreserve" set"
This reverts commit r267644. Turning linkonce_odr into weak_odr is
a sementic change on Darwin: because of
`llvm::canBeOmittedFromSymbolTable()` we may emit the symbol as
weak_def_can_be_hidden instead of weak_definition.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268606
2016-05-05 05:14:20 +00:00
Mehdi Amini 4b300e0ac2 ThinLTOCodeGenerator: remove useless temporary file that was emitted.
This was a remaining of a previous scheme where some IPOs were taking
place before we enter this code. This is not relevant anymore.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268605
2016-05-05 05:14:16 +00:00
Xinliang David Li 78d61b11e3 [Profile] Raw profile header clean up
Remove dead ValueDataBegin field in raw header.

llvm-svn: 268602
2016-05-05 04:07:30 +00:00
Xinliang David Li 6e5dd41481 [PM] Port Branch Probability Analysis pass to the new pass manager.
Differential Revision: http://reviews.llvm.org/D19839

llvm-svn: 268601
2016-05-05 02:59:57 +00:00
Davide Italiano 344e838fea [PM] Port EliminateAvailableExternally pass to the new pass manager.
llvm-svn: 268599
2016-05-05 02:37:32 +00:00
Teresa Johnson 9e95da77f9 [ThinLTO] Remove missed piece of lazy summary reading support (NFC)
Missed in r267097.

llvm-svn: 268597
2016-05-05 02:30:48 +00:00
Justin Bogner 8752be775c ARM: Use a Handle to track SDNodes in case they're CSE'd. NFC
The code here is recursively Select-ing a new Node to avoid issues
where N is CSE'd during replaceDAGValue and stops being valid. We can
accomplish the same goal in a more principled way by using a
HandleSDNode.

This is essentially a less dodgy fix for PR25733 than the original
attempt back in r255120.

llvm-svn: 268590
2016-05-05 01:43:49 +00:00
Ryan Govostes 8c21be6b3e Revert "[asan] add option to set shadow mapping offset"
This reverts commit ba89768f97b1d4326acb5e33c14eb23a05c7bea7.

llvm-svn: 268588
2016-05-05 01:27:04 +00:00
Ryan Govostes 097c5b051c [asan] add option to set shadow mapping offset
Allowing overriding the default ASAN shadow mapping offset with the
-asan-shadow-offset option, and allow zero to be specified for both offset and
scale.

llvm-svn: 268586
2016-05-05 01:14:39 +00:00
Dehao Chen d55bc4c7ab clang-format some files in preparation of coming patch reviews.
llvm-svn: 268583
2016-05-05 00:54:54 +00:00
Davide Italiano 164b9bc6fe [PM] Port ConstantMerge to the new pass manager.
llvm-svn: 268582
2016-05-05 00:51:09 +00:00
Marcin Koscielnicki ad1482c6f1 [SystemZ] Implement backchain attribute (recommit with fix).
This introduces a SystemZ-specific "backchain" attribute on function, which
enables writing the frame backchain link as specified by the ABI.  This will
be used to implement -mbackchain option in clang.

Differential Revision: http://reviews.llvm.org/D19889

Fixed in this version: added RegState::Define and RegState::Kill on R1D
in prologue.

llvm-svn: 268581
2016-05-05 00:37:30 +00:00
Reid Kleckner 4a14bcac41 [codeview] Move dumper into lib/DebugInfo/CodeView
So that we can call it from llvm-pdbdump.

llvm-svn: 268580
2016-05-05 00:34:33 +00:00
Adam Nemet 3c5eabfcbc [LoopDataPrefetch] Add optimization remark
With -Rpass=loop-data-prefetch, show the memory access that got
prefetched.

llvm-svn: 268578
2016-05-05 00:08:15 +00:00
Vitaly Buka fdcea9d78a Revert "[SimplifyCFG] propagate branch metadata when creating select"
MemorySanitizer: use-of-uninitialized-value
0x4910e47 in count /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/include/llvm/Support/MathExtras.h:159:12
0x4910e47 in countLeadingZeros<unsigned long> /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/include/llvm/Support/MathExtras.h:183
0x4910e47 in FitWeights /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:855
0x4910e47 in SimplifyCondBranchToCondBranch /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:2895

This reverts commit 609f4dd4bf3bc735c8c047a4d4b0a8e9e4d202e2.

llvm-svn: 268577
2016-05-04 23:59:33 +00:00
Marcin Koscielnicki 12037b4e9d Revert "[SystemZ] Implement backchain attribute."
This reverts commit rL268571.

It caused failures in register scavenger.

llvm-svn: 268576
2016-05-04 23:54:53 +00:00
Marcin Koscielnicki 9de88d9bbe [SystemZ] Implement llvm.get.dynamic.area.offset
To be used for AddressSanitizer.

Differential Revision: http://reviews.llvm.org/D19817

llvm-svn: 268572
2016-05-04 23:31:26 +00:00
Marcin Koscielnicki 835d927938 [SystemZ] Implement backchain attribute.
This introduces a SystemZ-specific "backchain" attribute on function, which
enables writing the frame backchain link as specified by the ABI.  This will
be used to implement -mbackchain option in clang.

Differential Revision: http://reviews.llvm.org/D19889

llvm-svn: 268571
2016-05-04 23:31:20 +00:00
Davide Italiano a7f5e88932 Revert "[SCCP] Throw away dead code. NFC."
This reverts commit r268568, as it broke the bots.

llvm-svn: 268570
2016-05-04 23:27:13 +00:00
Davide Italiano fc1214fee2 [SCCP] Throw away dead code. NFC.
llvm-svn: 268568
2016-05-04 23:05:59 +00:00
Quentin Colombet 0c5bfd0514 [X86] Add a few register classes for x32 address accesses.
The new register classes allow to tell the machine verifier that it is
fine to use RIP for address accesses in x32 mode. Prior to that patch,
we would complain that we are using a GR64 in place of GR32, whereas it
is actually fine to use GR64 for x32 as long as the 32 high bits are 0s.
RIP has this property and is used for RIP-relative addressing.

This partially fixes http://llvm.org/PR27481.

llvm-svn: 268567
2016-05-04 22:45:31 +00:00
Sanjay Patel c91351c2b7 clean up; NFCI
llvm-svn: 268564
2016-05-04 22:39:36 +00:00
Simon Pilgrim 1f5ad702f8 [SelectionDAG] BITREVERSE vector legalization of bit operations (REAPPLIED)
Some vector bit operations are promoted instead of having custom lowering. This patch changes the isOperationLegalOrCustom tests for vector AND/OR operations to use a new TLI helper isOperationLegalOrCustomOrPromote instead, allowing the SSE implementations to stay on the simd unit.

Differential Revision: http://reviews.llvm.org/D19805

llvm-svn: 268561
2016-05-04 22:08:51 +00:00
Eric Christopher 75d661a280 Spelling and grammar corrections in comments.
llvm-svn: 268560
2016-05-04 21:45:36 +00:00
Balaram Makam 569eaec5f3 "Reapply r268521 "[InstCombine] Canonicalize icmp instructions based on dominating conditions.""
This reapplies commit r268521, that was reverted in r268530 due to a test failure in select-implied.ll
Modified the test case to reflect the new change.

llvm-svn: 268557
2016-05-04 21:32:14 +00:00
Zachary Turner e13787ef3f Fix build of DebugInfoPDBTests.
Missing a using statement.

llvm-svn: 268552
2016-05-04 21:06:12 +00:00
Sanjay Patel 7e8c285814 [SimplifyCFG] propagate branch metadata when creating select
Unlike earlier similar fixes, we need to recalculate the branch weights
in this case.

Differential Revision: http://reviews.llvm.org/D19674

llvm-svn: 268550
2016-05-04 20:48:24 +00:00
Evandro Menezes d23324aab1 [AArch64] Add cheap as move instructions for Exynos M1
llvm-svn: 268549
2016-05-04 20:47:25 +00:00
Kostya Serebryany baf7fd0b16 [libFuzzer] print stats after running individual inputs
llvm-svn: 268547
2016-05-04 20:44:50 +00:00
Zachary Turner ec28fc3499 Move pdb code into pdb namespace.
llvm-svn: 268544
2016-05-04 20:32:13 +00:00
Evandro Menezes bcb95cd0ed [AArch64] Use the reciprocal estimation machinery
This patch adds support for estimating the square root, its reciprocal and
division or reciprocal using the combiner generic reciprocal machinery.

llvm-svn: 268539
2016-05-04 20:18:27 +00:00
Tobias Grosser 3b3261693e cmake: Prefix Polly options with LLVM_ to avoid variable shadowing
Summary:
Before this change certain Polly variables have been used both as user-facing
CACHED cmake variables as well as uncached internal variables. Even though
this seems to have worked OK in practice, the behavior only worked due to
one variable shadowing the other. This behavior has been found confusing.
To make the use of cmake variables more clear we now prefix the cached, user
facing variables with LLVM_ as it is common habit for LLVM options and also
moved the _POLLY_ term to the beginning to ensure related options are sorted
after each other. The variables that control the behavior of LLVM/Polly are then
set by forwarding the values set in the user facing option variables.
As a result, Polly is now enabled with LLVM_POLLY_BUILD instead of BUILD_POLLY
and the linking behavior of Polly is controlled with LLVM_POLLY_LINK_INTO_TOOLS
instead of LINK_POLLY_INTO_TOOLS.

Reviewers: bogner, Meinersbur

Subscribers: pollydev, llvm-commits

Differential Revision: http://reviews.llvm.org/D19907

llvm-svn: 268537
2016-05-04 20:04:40 +00:00
Vitaly Buka 6b5c89262a Revert r268529 because it caused use-of-uninitialized-value
Summary: This reverts commit d88cc0862bf7da64850b89e9bb5ea9f95e7f1184.

#0 0xfed467 in llvm::ARMFrameLowering::determineCalleeSaves(llvm::MachineFunction&, llvm::BitVector&, llvm::RegScavenger*) const /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Target/ARM/ARMFrameLowering.cpp:1625:52
#1 0x330d4cc in (anonymous namespace)::PEI::runOnMachineFunction(llvm::MachineFunction&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/CodeGen/PrologEpilogInserter.cpp:186:3
#2 0x3193e12 in llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/CodeGen/MachineFunctionPass.cpp:60:13
#3 0x396237d in llvm::FPPassManager::runOnFunction(llvm::Function&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/LegacyPassManager.cpp:1526:23
#4 0x3962a23 in llvm::FPPassManager::runOnModule(llvm::Module&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/LegacyPassManager.cpp:1547:16
#5 0x3963d52 in runOnModule /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/LegacyPassManager.cpp:1603:23
#6 0x3963d52 in llvm::legacy::PassManagerImpl::run(llvm::Module&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/LegacyPassManager.cpp:1706
#7 0x6bb910 in compileModule(char**, llvm::LLVMContext&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/tools/llc/llc.cpp:412:5
#8 0x6b3c25 in main /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/tools/llc/llc.cpp:218:22
#9 0x7fd4a7d37ec4 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x21ec4)
#10 0x625c93 in _start (/mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm_build_msan/bin/llc+0x625c93)

Reviewers:

Subscribers:

llvm-svn: 268536
2016-05-04 19:44:11 +00:00
Reid Kleckner 7960de99db [codeview] Add a type visitor to help abstract away type stream handling
Summary:
Port the dumper in llvm-readobj over to it.

I'm planning to use this visitor to power type stream merging.

While we're at it, try to switch from StringRef to ArrayRef<uint8_t> in some
places.

Reviewers: zturner, amccarth

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19899

llvm-svn: 268535
2016-05-04 19:39:28 +00:00
Hal Finkel e2b89118bd [ConstantFold] Don't try to strip fp -> int bitcasts to simplify icmps
ConstantFold has logic to take icmp (bitcast x to y), null and strip the
bitcast. This makes sense in general, but not if x has floating-point type. In
this case, we'd need a fcmp, not an icmp, and the code will assert. We normally
don't see this situation because we constant fold fp -> int bitcasts, however,
we'll see it for bitcasts of ppc_fp128 -> i128. This is because that bitcast is
Endian-dependent, and as a result, we don't simplify it in ConstantFold (we
could, but no one has yet added the necessary logic). Regardless, ConstantFold
should not depend on that canonicalization for correctness.

llvm-svn: 268534
2016-05-04 19:37:08 +00:00
Sanjay Patel 13d57b94bb [x86] add tests to show current codegen for obscured fneg/fabs
llvm-svn: 268533
2016-05-04 19:06:03 +00:00
Marcin Koscielnicki cc9676a821 [MSan] [Mips64] Add tests for vararg handling.
Differential Revision: http://reviews.llvm.org/D19919

llvm-svn: 268531
2016-05-04 18:39:14 +00:00
Balaram Makam 31e7e13789 Revert "[InstCombine] Canonicalize icmp instructions based on dominating conditions."
This reverts commit 573a40f79b35cf3e71db331bb00f6a84f03b835d.

llvm-svn: 268530
2016-05-04 18:37:35 +00:00
Weiming Zhao 2373f769ce [ARM] Fix Scavenger assert due to underestimated stack size
Summary:
Currently, when checking if a stack is "BigStack" or not, it doesn't count into spills and arguments. Therefore, LLVM won't reserve spill slot for this actually "BigStack". This may cause scavenger failure.

Reviewers: rengolin

Subscribers: aemerson, rengolin, tberghammer, danalbert, srhines, llvm-commits

Differential Revision: http://reviews.llvm.org/D19896

llvm-svn: 268529
2016-05-04 18:19:33 +00:00
Simon Pilgrim dea877ca49 Fix spelling in comment. NFC.
llvm-svn: 268528
2016-05-04 18:16:17 +00:00
Simon Pilgrim 1a14f0d25c Revert r268504
llvm-svn: 268526
2016-05-04 17:49:14 +00:00
Marianne Mailhot-Sarrasin b192670279 Adding test cases showing the behavior of LoopUnrollPass according to optnone and optsize attributes
The unroll pass was disabled by clang in /Os. Those new test cases shows that the pass will behave correctly even if it is not fully disabled. This patch is related in some way to the clang commit (http://reviews.llvm.org/D19827), which re-enables the pass in /Os.

Differential Revision: http://reviews.llvm.org/D19870

llvm-svn: 268524
2016-05-04 17:45:40 +00:00
Jingyue Wu 9c36d8cde6 [NVPTX:doc] Update code examples to conform to the latest IR.
llvm-svn: 268522
2016-05-04 17:34:57 +00:00
Balaram Makam cf3bcb2625 [InstCombine] Canonicalize icmp instructions based on dominating conditions.
Summary:
    This patch canonicalizes conditions based on the constant range information
    of the dominating branch condition.
    For example:

      %cmp = icmp slt i64 %a, 0
      br i1 %cmp, label %land.lhs.true, label %lor.rhs
      lor.rhs:
        %cmp2 = icmp sgt i64 %a, 0

    Would now be canonicalized into:

      %cmp = icmp slt i64 %a, 0
      br i1 %cmp, label %land.lhs.true, label %lor.rhs
      lor.rhs:
        %cmp2 = icmp ne i64 %a, 0

Reviewers: mcrosier, gberry, t.p.northover, llvm-commits, reames, hfinkel, sanjoy, majnemer

Subscribers: MatzeB, majnemer, mcrosier

Differential Revision: http://reviews.llvm.org/D18841

llvm-svn: 268521
2016-05-04 17:34:20 +00:00
Leny Kholodov 1b73e66b5d [Support] Creation of minidump after compiler crash on Windows
In the current implementation compiler only prints stack trace
to console after crash. This patch adds saving of minidump
files which contain a useful subset of the information for
further debugging.

Differential Revision: http://reviews.llvm.org/D18216

llvm-svn: 268519
2016-05-04 16:56:51 +00:00
Reid Kleckner b034526853 Reland "Use ScopedPrinter in llvm-pdbdump"
This reverts r268508 and reinstates r268506 with an additional cast from
TypeLeafKind to unsigned to allow conversion to HexNumber.

llvm-svn: 268517
2016-05-04 16:09:04 +00:00
Nemanja Ivanovic 1a2b2f03e7 [PowerPC] Generate VSX version of splat word
This patch corresponds to review:
http://reviews.llvm.org/D18592

It allows the PPC back end to generate the xxspltw instruction where we
previously only emitted vspltw.

llvm-svn: 268516
2016-05-04 16:04:02 +00:00
Simon Pilgrim bc0e1d7492 [X86][SSE] Regenerate vector bswap tests
llvm-svn: 268514
2016-05-04 15:45:48 +00:00
Chad Rosier 89d9de5af7 Typo. NFC.
llvm-svn: 268513
2016-05-04 15:42:29 +00:00
Hans Wennborg 0c3518e84b [SimplifyCFG] isSafeToSpeculateStore now ignores debug info
This patch fixes PR27615.

@llvm.dbg.value instructions no longer count towards the maximum number of
instructions to look back at in the instruction list when searching for a
store instruction. This should make the output consistent between debug and
non-debug build.

Patch by Henric Karlsson <henric.karlsson@ericsson.com>!

Differential Revision: http://reviews.llvm.org/D19912

llvm-svn: 268512
2016-05-04 15:40:57 +00:00
Chad Rosier 20dbbf3542 Revert "Use ScopedPrinter in llvm-pdbdump"
This reverts commit r268506 due to build breakage.

llvm-svn: 268508
2016-05-04 15:25:06 +00:00
Chad Rosier 7ab9a7b203 Use a uniform name for the load combine pass. NFC.
llvm-svn: 268507
2016-05-04 15:19:02 +00:00
Zachary Turner cdd313ca19 Use ScopedPrinter in llvm-pdbdump
When printing raw PDB file fields, streams, and records, use the
ScopedPrinter class so we have consistency with llvm-readobj's output
format.

For the most part this is pretty mechanical, but I had to fix up the test
file to conform to the new YAMLesque output format. i added a few
additional helper functions to the ScopedPrinter such as one to print a
dotted version, etc.

Differential Revision: http://reviews.llvm.org/D19897
Reviewed By: rnk

llvm-svn: 268506
2016-05-04 15:05:12 +00:00
Simon Pilgrim b97c06210b [SelectionDAG] BITREVERSE vector legalization of bit operations
Vector bit operations are typically promoted instead of having custom lowering. This patch changes the isOperationLegalOrCustom tests for vector AND/OR operations to use isOperationLegalOrPromote instead, allowing the SSE implementations to stay on the simd unit.

Differential Revision: http://reviews.llvm.org/D19805

llvm-svn: 268504
2016-05-04 15:01:13 +00:00
Jan Vesely bbc2231983 AMDGPU/R600: Minor cleanup in InstrInfo
Use std::make_pair instead of constructor
Use C++11 loop
Reuse helper var

Reviewers: tstellardAMD

Subsribers: arsenm

Differential Revision: http://reviews.llvm.org/D19787

llvm-svn: 268503
2016-05-04 14:55:45 +00:00
Igor Laevsky fb1811d3a0 [RS4GC] Use SetVector/MapVector instead of DenseSet/DenseMap to guarantee stable ordering
Goal of this change is to guarantee stable ordering of the statepoint arguments and other 
newly inserted values such as gc.relocates. Previously we had explicit sorting in a couple
of places. However for unnamed values ordering was partial and overall we didn't have any 
strong invariant regarding it. This change switches all data structures to use SetVector's
and MapVector's which provide possibility for deterministic iteration over them.
Explicit sorting is now redundant and was removed.

Differential Revision: http://reviews.llvm.org/D19669

llvm-svn: 268502
2016-05-04 14:55:36 +00:00
Elena Demikhovsky 24aba1ca38 The test files are auto-generated by update_llc_test_checks.py utility.
No functional changes.

llvm-svn: 268498
2016-05-04 14:31:18 +00:00
Daniel Sanders c07f06aeee [mips][ias] Only round section sizes when explicitly requested.
As requested by Rafael Espindola in his post-commit comments on r268036. This
makes the previous behaviour the default while still allowing verification of
IAS.

llvm-svn: 268496
2016-05-04 13:21:06 +00:00