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5 Commits

Author SHA1 Message Date
Matt Arsenault 663ab8c119 AMDGPU: Use brev for materializing SGPR constants 
This is already done with VGPR immediates and saves 4 bytes.

llvm-svn: 285765
 2016-11-01 23:14:20 +00:00
Matt Arsenault 124384f08d AMDGPU: Fix immediate folding logic when shrinking instructions 
If the literal is being folded into src0, it doesn't matter
if it's an SGPR because it's being replaced with the literal.

Also fixes initially selecting 32-bit versions of some instructions
which also confused commuting.

llvm-svn: 281117
 2016-09-09 23:32:53 +00:00
Matt Arsenault bbb47da8a1 AMDGPU: Support commuting with immediate in src0 
llvm-svn: 280970
 2016-09-08 17:19:29 +00:00
Marek Olsak 74d084f466 AMDGPU/SI: use S_OR for fneg (fabs f32) 
llvm-svn: 251631
 2015-10-29 15:29:05 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00