Commit Graph

406926 Commits

Author SHA1 Message Date
Craig Topper 0ec5f1e64f [RISCV] Reduce duplicate FP test cases.
-Remove feq, fle, flt tests from *-arith.ll in favor of *-fcmp.ll which tests all predicates.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D113703
2021-12-09 08:33:38 -08:00
Bixia Zheng 64e171c2d0 Avoid unnecessary output buffer allocation and initialization.
The sparse tensor code generator allocates memory for the output tensor. As
such, we only need to allocate a MemRefDescriptor to receive the output tensor
and do not need to allocate and initialize the storage for the tensor.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D115292
2021-12-09 08:29:02 -08:00
Shraiysh Vaishay d4865393b5 [NFC][mlir][OpenMP] Added documentation for omp.atomic ops
This patch adds the documentation for the operations `omp.atomic.read`,
`omp.atomic.write` and `omp.atomic.update`.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D115445
2021-12-09 21:46:38 +05:30
David Sherwood 8b0448ce5d [AArch64][Analysis] Add on overhead costs for SVE gathers and scatters
This patch adds on an overhead cost for gathers and scatters, which
is a rough estimate based on performance investigations I have
performed on SVE hardware for various micro-benchmarks.

Differential Revision: https://reviews.llvm.org/D115143
2021-12-09 16:02:59 +00:00
Krzysztof Drewniak e1da62910e [MLIR][GPU] Define gpu.printf op and its lowerings
- Define a gpu.printf op, which can be lowered to any GPU printf() support (which is present in CUDA, HIP, and OpenCL). This op only supports constant format strings and scalar arguments
- Define the lowering of gpu.pirntf to a call to printf() (which is what is required for AMD GPUs when using OpenCL) as well as to the hostcall interface present in the AMD Open Compute device library, which is the interface present when kernels are running under HIP.
- Add a "runtime" enum that allows specifying which of the possible runtimes a ROCDL kernel will be executed under or that the runtime is unknown. This enum controls how gpu.printf is lowered

This change does not enable lowering for Nvidia GPUs, but such a lowering should be possible in principle.

And:
[MLIR][AMDGPU] Always set amdgpu-implicitarg-num-bytes=56 on kernels

This is something that Clang always sets on both OpenCL and HIP kernels, and failing to include it causes mysterious crashes with printf() support.

In addition, revert the max-flat-work-group-size to (1, 256) to avoid triggering bugs in the AMDGPU backend.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D110448
2021-12-09 15:54:31 +00:00
David Sherwood def8b952eb [LoopVectorize][AArch64] Add vectoriser cost model tests for gathers/scatters
I've added some tests that were previously missing for the gather-scatter costs
being calculated by the vectorizer for AArch64:

  Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll

The costs are sometimes different to the ones in

  Analysis/CostModel/AArch64/sve-gather.ll

because the vectorizer also adds on the address computation cost.
2021-12-09 15:44:12 +00:00
Brian Cain ab28cb1c5c Revert "[xray] add support for hexagon"
This reverts commit 543a9ad7c4.
2021-12-09 07:30:40 -08:00
Eugene Zhulenev 49ce40e9ab [mlir] AsyncParallelFor: align block size to be a multiple of inner loops iterations
Depends On D115263

By aligning block size to inner loop iterations parallel_compute_fn LLVM can later unroll and vectorize some of the inner loops with small number of trip counts. Up to 2x speedup in multiple benchmarks.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D115436
2021-12-09 06:50:50 -08:00
Eugene Zhulenev 9f151b784b [mlir] AsyncParallelFor: sink constants into the parallel compute function
With complex recursive structure of async dispatch function LLVM can't always propagate constants to the parallel_compute_fn and it often prevents optimizations like loop unrolling and vectorization. We help LLVM by pushing known constants into the parallel_compute_fn explicitly.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D115263
2021-12-09 06:48:23 -08:00
Amy Kwan 0ae1b1ce1a [test-release.sh] Respect the given width in LIT runs by adding `-j` in LLVM_LIT_ARGS.
This patch adds allows the LIT runs within test-release.sh to obey the width that
is passed into the script. This is accomplished by adding the width in the LLVM_LIT_ARGS
CMake configuration.

Differential Revision: https://reviews.llvm.org/D115350
2021-12-09 08:37:15 -06:00
Nikita Popov 3beafecedf [InlineAdvisor] Remove outdated comment (NFC)
This just returns None nowadays, so this comment doesn't apply
anymore.
2021-12-09 15:11:56 +01:00
Nikita Popov a3a478be40 [Inliner] Add debug message for history skip (NFC) 2021-12-09 15:11:56 +01:00
Jake Egan 143e424294 [AIX] Disable failing tests because of missing DWARF sections
The following tests are failing due to missing DWARF sections: `DwarfAccelNamesSection` and `DwarfAddrSection`. This patch sets these tests as `XFAIL` until the sections can be implemented for AIX.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D114681
2021-12-09 09:05:36 -05:00
Brian Cain 543a9ad7c4 [xray] add support for hexagon
Adds x-ray support for hexagon to llvm codegen, clang driver,
compiler-rt libs.

Differential Revision: https://reviews.llvm.org/D113638
2021-12-09 05:47:53 -08:00
Ties Stuij bfe07195bb [ARM][clang] Option b-key must not affect __ARM_FEATURE_PAC_DEFAULT
When using -mbranch-protection=pac-ret+b-key, macro __ARM_FEATURE_PAC_DEFAULT
should still have the value corresponding to a-key, because b-key is only valid
for AArch64.

This patch is part of a series that adds support for the PACBTI-M extension of
the Armv8.1-M architecture, as detailed here:

https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension

The PACBTI-M specification can be found in the Armv8-M Architecture Reference
Manual:

https://developer.arm.com/documentation/ddi0553/latest

The following people contributed to this patch:

- Victor Campos

Reviewed By: danielkiss

Differential Revision: https://reviews.llvm.org/D115140
2021-12-09 13:37:52 +00:00
Matthias Springer cc45a13422 [mlir][linalg][bufferize] LinalgOps can bufferize inplace with input args
LinalgOp results usually bufferize inplace with output args. With this change, they may buffer inplace with input args if the value of the output arg is not used in the computation.

Differential Revision: https://reviews.llvm.org/D115022
2021-12-09 21:54:54 +09:00
lh123 53219009aa [clang][clangd] Desugar array type.
Desugar array type.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D115107
2021-12-09 20:12:48 +08:00
Dmitry Makogon 0b533c1833 [MetaRenamer] Add command line options to disable renaming name with specified prefixes
This patch adds 4 options for specifying functions, aliases, globals and
structs name prefixes hat don't need to be renamed by MetaRenamer pass.
This is useful if one has some downstream logic that depends directly
on an entity name. MetaRenamer can break this logic, but with the patch
you can tell it not to rename certain names.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D115323
2021-12-09 18:45:06 +07:00
Lasse Folger b2e2eece9a [lldb][NFC] clang-format some files as preparation for https://reviews.llvm.org/D114627
Reviewed By: werat

Differential Revision: https://reviews.llvm.org/D115110
2021-12-09 12:38:00 +01:00
Groverkss 6f9afad6d3 [MLIR] Move Presburger Math from FlatAffineConstraints to Presburger/IntegerPolyhedron
This patch factors out math functionality that is a subset of Presburger arithmetic and moves it from FlatAffineConstraints to Presburger/IntegerPolyhedron. This patch only moves some parts of the functionality planned to be moved, with subsequent patches moving more functionality. There are three main reasons for this:

1. This split makes the Presburger Library easier and more flexible to use
    across MLIR, by not depending on IR.
2. This split allows the Presburger library to be developed independently from
    Affine Analysis, with Affine Analysis using this library.
3. With more functionality being upstreamed to the Presburger Library, the
    mlir/Analysis directory will be cluttered with Presburger library components
    since they depend on math functionality from FlatAffineConstraints. Moving this
    functionality to the Presburger directory allows keeping the new functionality
    in the Presburger directory.

This patch is part of an ongoing effort to make the Presburger Library easier to use. The motivation for this effort is the feedback received at the LLVM conference from Mehdi and others.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D114674
2021-12-09 16:42:06 +05:30
Martin Storsjö 62cff45d76 Revert "Reapply [runtimes] Fix building initial libunwind+libcxxabi+libcxx with compiler implied -lunwind"
This reverts commit 317dc31e53.

After that change, OpenMP doesn't find dependencies in the host
system (it fails do find e.g. /usr/lib/x86_64-linux-gnu/libelf.so
which it found before), which causes some OpenMP target offloading
plugins to not be found. This doesn't break the build, but just
causes the AMDGPU OpenMP target plugin to be omitted. See
https://reviews.llvm.org/D113253#3181934 for the report of this
issue.
2021-12-09 12:56:57 +02:00
Florian Hahn d74a8a78ad
[LV] Mark various functions as const (NFC).
Make sure various accessors do not modify any state, in preparation for
D115111.
2021-12-09 10:51:29 +00:00
Ties Stuij e32b818db1 [ARM][clang] Define feature test macro for the PACBTI-M extension
If the extension string "+pacbti" was given in -march=... or -mcpu=... options the compiler shall define the following preprocessor macros:

    __ARM_FEATURE_PAUTH with value 1.
    __ARM_FEATURE_BTI with value 1.

This patch is part of a series that adds support for the PACBTI-M extension of
the Armv8.1-M architecture, as detailed here:

https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension

The PACBTI-M specification can be found in the Armv8-M Architecture Reference
Manual:

https://developer.arm.com/documentation/ddi0553/latest

The following people contributed to this patch:

- Momchil Velikov
- Ties Stuij

Reviewed By: miyuki

Differential Revision: https://reviews.llvm.org/D112431
2021-12-09 10:39:06 +00:00
mydeveloperday 2a73a1ac57 [clang-format] PR48916 PointerAlignment not working when using C++20 init-statement in for loop
https://bugs.llvm.org/show_bug.cgi?id=48916

Left and Right Alignment inside a loop is misaligned.

Reviewed By: HazardyKnusperkeks, curdeius

Differential Revision: https://reviews.llvm.org/D115050
2021-12-09 10:37:02 +00:00
Jan Svoboda 13a351e862 [clang][deps] Use MemoryBuffer in minimizing FS
This patch avoids unnecessarily copying contents of `mmap`-ed files into `CachedFileSystemEntry` by storing `MemoryBuffer` instead. The change leads to ~50% reduction of peak memory footprint when scanning LLVM+Clang via `clang-scan-deps`.

Depends on D115331.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D115043
2021-12-09 11:32:13 +01:00
Jan Svoboda d0262c2394 [llvm] Add null-termination capability to SmallVectorMemoryBuffer
Most of `MemoryBuffer` interfaces expose a `RequiresNullTerminator` parameter that's being used to:
* determine how to open a file (`mmap` vs `open`),
* assert newly initialized buffer indeed has an implicit null terminator.

This patch adds the paramater to the `SmallVectorMemoryBuffer` constructors, meaning:
* null terminator can now be added to `SmallVector`s that didn't have one before,
* `SmallVectors` that had a null terminator before keep it even after the move.

In line with existing code, the new parameter is defaulted to `true`. This patch makes sure all calls to the `SmallVectorMemoryBuffer` constructor set it to `false` to preserve the current semantics.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D115331
2021-12-09 11:32:13 +01:00
Jan Svoboda e04fc2d88e [llvm][lldb] Remove unused SmallVectorMemoryBuffer.h includes 2021-12-09 11:32:13 +01:00
Michel Weber 45ea542dd8 [MLIR] Introduce coalesce for PresburgerSet
This patch provides functionality for simplifying `PresburgerSet`s by checking if any `FlatAffineConstraints` in the set is contained in another, and removing such redundant FACs.

This is part of a series of patches to provide functionality for [integer set coalescing](http://impact.gforge.inria.fr/impact2015/papers/impact2015-verdoolaege.pdf) in MLIR.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D110617
2021-12-09 15:46:31 +05:30
Shraiysh Vaishay d82c1f4e4b [MLIR][OpenMP] Added omp.atomic.update
This patch supports the atomic construct (update) following section 2.17.7 of OpenMP 5.0 standard. Also added tests and verifier for the same.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D112982
2021-12-09 15:21:24 +05:30
Martin Storsjö 120d44d1a0 [clang] Fix a misadjusted path style comparison in a unittest
This was changed incorrectly by accident in
9902362701.

Differential Revision: https://reviews.llvm.org/D113254
2021-12-09 11:47:43 +02:00
Jan Svoboda 58822837cd [clang][deps] Use lock_guard instead of unique_lock
This patch changes uses of `std::unique_lock` to `std::lock_guard`.

The `std::unique_lock` template provides some advanced capabilities (deferred locking, time-constrained locking attempts, etc.) we don't use in the caching filesystem. Plain `std::lock_guard` will do here.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D115332
2021-12-09 10:42:50 +01:00
Dmitry Makogon 267ddbb581 [Test] [GVN] Add test showing equivalent PHIs generation by GVN 2021-12-09 16:40:23 +07:00
Mikael Holmen d0f55a0d80 [ARM] Fix gcc warning about mix of enumeral and non-enumeral types
gcc warned with
../lib/Target/ARM/ARMFrameLowering.cpp:797:31: warning: enumeral and non-enumeral type in conditional expression [-Wextra]
  797 |               Reg == ARM::R12 ? ARM::RA_AUTH_CODE : Reg, true);
      |               ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
2021-12-09 10:31:56 +01:00
Mikael Holmen cb413f208a [PowerPC] Fix gcc warning about unused variable [NFC]
gcc warned about
../lib/Target/PowerPC/PPCTargetTransformInfo.cpp:1401:13: warning: unused variable 'VecTy' [-Wunused-variable]
 1401 |   if (auto *VecTy = dyn_cast<FixedVectorType>(DataType)) {
      |             ^~~~~
2021-12-09 10:31:56 +01:00
Dmitry Vyukov 5a33e41281 tsan: new runtime (v3)
This change switches tsan to the new runtime which features:
 - 2x smaller shadow memory (2x of app memory)
 - faster fully vectorized race detection
 - small fixed-size vector clocks (512b)
 - fast vectorized vector clock operations
 - unlimited number of alive threads/goroutimes

Depends on D112602.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D112603
2021-12-09 09:09:52 +01:00
Fraser Cormack eb87f668fe [NewPM] Port FlattenCFGPass to NPM
Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D115361
2021-12-09 07:55:02 +00:00
Nicolas Vasilache d69f5e197c [mlir][memref] Fix subview offset verification.
Offset-specific verification seems to have been lost in one of the recent refactorings.
Also add proper tests that would have caught this omission.

This addresses the immediate issues discussed in:
https://llvm.discourse.group/t/memref-subview-affine-map-and-symbols/4851

Differential Revision: https://reviews.llvm.org/D115427
2021-12-09 07:44:51 +00:00
Arthur Eubanks cd11312607 [NFC][Verifier] Remove checks for atomic loads/stores that alignment is non-zero
The alignment is never 0 since getAlign() returns 1 << bits.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D115388
2021-12-08 23:17:08 -08:00
Chuanqi Xu 320e4efe99 [C++20] [Coroutines] Mark coroutine done if unhandled_exception throws
According to [dcl.fct.def.coroutine]/p14:
> If the evaluation of the expression promise.unhandled_­exception()
> exits via an exception, the coroutine is considered suspended at the
> final suspend point.

But this is not implemented in clang before. This patch would implement
this feature by marking the coroutine as done at the place of
coro.end(frame, /*InUnwindPath=*/true ).

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D115219
2021-12-09 14:58:06 +08:00
Kito Cheng 39c861719b [RISCV] Fix vm operand constraint to fit GCC's behavior
- `vm` constraint is used for masking operand, which always v0.

- Update testcase, only masking operand should use `vm`, vector mask operations
  should just use `vr` for any vector register.

 - Revise the description of `vm` constraint.

- This patch also fix issue on RISCVRegisterInfo.td and RISCVISelLowering.cpp.

  RISCVRegisterInfo.td:
  - The first VT in the list must be the largest total size since the
    SelectionDAGBuilder uses the first register in the list as the canonical
    type for the register.

  RISCVISelLowering.cpp:
  - Fix RISCVTargetLowering::splitValueIntoRegisterParts and
    RISCVTargetLowering::joinRegisterPartsIntoValue for handling vectors
    with different total size, that will happened on fractional LMUL since
    fractional LMUL is always occupy one vector register.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D112599
2021-12-09 14:46:49 +08:00
Chuanqi Xu 352e36e10d [Coroutines] Remove unused coroutine builtin/intrinsics llvm.coro.param (NFC-ish)
I found that the coroutine intrinsic llvm.coro.param in documentation
(https://llvm.org/docs/Coroutines.html#id101) didn't get used actually
since there isn't lowering codes in LLVM. I also checked the
implementation of libstdc++ and libc++. Both of them didn't use
llvm.coro.param. So I am pretty sure that the llvm.coro.param intrinsic
is unused. I think it would be better t to remove it to avoid possible
misleading understandings.

Note: according to [class.copy.elision]/p1.3, this optimization is
allowed by the C++ language specification. Let's make it someday.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D115222
2021-12-09 14:40:25 +08:00
MaheshRavishankar 6d7c9c3d0e [mlir][Linalg] Bufferize the region of LinalgOps as well.
The region of `linalg.generic` might contain `tensor` operations. For
example, current lowering of `gather` uses a `tensor.extract` in the
body of the `LinalgOp`. Bufferize the ops within a `LinalgOp` region
as well to catch such cases.

Differential Revision: https://reviews.llvm.org/D115322
2021-12-08 22:36:01 -08:00
Dmitry Vyukov 8e93d4c996 tsan: fork runtime
Fork the current version of tsan runtime before commiting
rewrite of the runtime (D112603). The old runtime can be
enabled with TSAN_USE_OLD_RUNTIME option.
This is a temporal measure for emergencies and is required
for Chromium rollout (for context see http://crbug.com/1275581).
The old runtime is supposed to be deleted soon.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D115223
2021-12-09 07:28:26 +01:00
Chuanqi Xu 9791b58951 [C++20 Modules] Don't create global module fragment for extern linkage declaration in GMF already
Previously we would create global module fragment for extern linkage
declaration which is alreday in global module fragment. However, it is
clearly redundant to do so. This patch would check if the extern linkage
declaration are already in GMF before we create a GMF for it.
2021-12-09 13:55:15 +08:00
Mircea Trofin 4afae6f7c7 [NFC] Rename MachineFunction::cloneMachineInstrBundle (coding style) 2021-12-08 21:12:54 -08:00
Mircea Trofin b012742405 [NFC] Rename MachineFunction::deleteMachineInstr (coding style) 2021-12-08 20:36:13 -08:00
Kazu Hirata c23ebf1714 [llvm] Use range-based for loops (NFC) 2021-12-08 20:35:39 -08:00
LLVM GN Syncbot aebd932bc4 [gn build] Port 059e03476c 2021-12-09 04:11:22 +00:00
Mircea Trofin 059e03476c [NFC][mlgo] Generalize model runner interface
This prepares it for the regalloc work. Part of it is making model
evaluation accross 'development' and 'release' scenarios more reusable.
This patch:
- extends support to tensors of any shape (not just scalars, like we had
in the inliner -Oz case). While the tensor shape can be anything, we
assume row-major layout and expose the tensor as a buffer.
- exposes the NoInferenceModelRunner, which we use in the 'development'
mode to keep the evaluation code path consistent and simplify logging,
as we'll want to reuse it in the regalloc case.

Differential Revision: https://reviews.llvm.org/D115306
2021-12-08 20:10:58 -08:00
Zi Xuan Wu a556ec8861 [CSKY] Complete codegen of basic arithmetic and load/store operations
Complete basic arithmetic operations such as add/sub/mul/div, and it also includes converions
and some specific operations such as bswap.Add load/store patterns to generate different addressing mode instructions.

Also enable some infra such as copy physical register and eliminate frame index.
2021-12-09 11:40:20 +08:00