Commit Graph

14 Commits

Author SHA1 Message Date
Denis Khalikov 4460cb5bcd [mlir][spirv] Add lowering for composite std.constant.
Add lowering for constant operation with ranked tensor type to
spv.constant with spv.array type.

Differential Revision: https://reviews.llvm.org/D73022
2020-01-22 08:25:00 -05:00
Denis Khalikov 3023352a7d [mlir][spirv] Simplify scalar type size calculation.
Simplify scalar type size calculation and reject boolean memrefs.

Differential Revision: https://reviews.llvm.org/D72999
2020-01-21 12:15:37 -05:00
Denis Khalikov eac01f63a6 [mlir][spirv] Add lowering for std.fpext, std.fptrunc, std.sitofp.
Differential Revision: https://reviews.llvm.org/D72137
2020-01-07 22:13:07 -05:00
Lei Zhang dab2921f77 Revert "[mlir][spirv] Add lowering for std.fpext, std.fptrunc, std.sitofp."
This reverts commit 7e7f849a6d because
it recorded the wrong commit author.
2020-01-07 22:11:17 -05:00
Denis Khalikov dd495e8a87 [mlir][spirv] Add lowering for std cmp ops.
Differential Revision: https://reviews.llvm.org/D72296
2020-01-07 21:51:51 -05:00
Denis Khalikov 9883b14cd1 [mlir][spirv] Add lowering for standard bit ops
Differential Revision: https://reviews.llvm.org/D72205
2020-01-07 21:45:54 -05:00
Lei Zhang 7e7f849a6d [mlir][spirv] Add lowering for std.fpext, std.fptrunc, std.sitofp.
Differential Revision: https://reviews.llvm.org/D72137
2020-01-07 21:28:49 -05:00
MaheshRavishankar c3d3569d4c [mlir] Convert std.and/std.or ops to spv.LogicalAnd/spv.LogicalOr
The conversion from std.and/std.or to spv.LogicalAnd/spv.LogicalOr is
only valid for boolean (i1) types. Modify BinaryOpPattern in
StandardToSPIRV.td to allow limiting the type of the operands for
which the pattern is applied.

Differential Revision: https://reviews.llvm.org/D71881
2019-12-27 11:33:17 -08:00
Manuel Freiberger 22954a0e40 Add integer bit-shift operations to the standard dialect.
Rename the 'shlis' operation in the standard dialect to 'shift_left'. Add tests
for this operation (these have been missing so far) and add a lowering to the
'shl' operation in the LLVM dialect.

Add also 'shift_right_signed' (lowered to LLVM's 'ashr') and 'shift_right_unsigned'
(lowered to 'lshr').

The original plan was to name these operations 'shift.left', 'shift.right.signed'
and 'shift.right.unsigned'. This works if the operations are prefixed with 'std.'
in MLIR assembly. Unfortunately during import the short form is ambigous with
operations from a hypothetical 'shift' dialect. The best solution seems to omit
dots in standard operations for now.

Closes tensorflow/mlir#226

PiperOrigin-RevId: 286803388
2019-12-22 10:02:13 -08:00
Denis Khalikov d968f9696d [spirv] Add lowering for std.fdiv, std.frem, std.fsub
Closes tensorflow/mlir#313

COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/313 from denis0x0D:sandbox/lowering_std_farith 41715070a74d13bfa9401957478978c1bb8006c0
PiperOrigin-RevId: 285023586
2019-12-11 11:17:35 -08:00
Mahesh Ravishankar c5ba37b6ae Add a pass to legalize operations before lowering to SPIR-V.
Not all StandardOps can be lowered to SPIR-V. For example, subview op
implementation requires use of pointer bitcasts which is not valid
according to SPIR-V spec (or at least is ambiguous about it). Such ops
need to be removed/transformed before lowering to SPIR-V. The
SPIRVLegalizationPass is added a place where such legalizations can be
added. Current implementation folds the subview ops with load/stores
so that the lowering itself does not have to convert a subview op.

PiperOrigin-RevId: 283642981
2019-12-03 16:06:17 -08:00
Lei Zhang aaafeac89b [spirv] NFC: rename test files and sort tests inside
PiperOrigin-RevId: 282132339
2019-11-23 06:58:38 -08:00
Mahesh Ravishankar 2be53603e9 Add operations needed to support lowering of AffineExpr to SPIR-V.
Lowering of CmpIOp, DivISOp, RemISOp, SubIOp and SelectOp to SPIR-V
dialect enables the lowering of operations generated by AffineExpr ->
StandardOps conversion into the SPIR-V dialect.

PiperOrigin-RevId: 280039204
2019-11-12 13:20:06 -08:00
Mahesh Ravishankar 28d7f9c052 Add lowering of constant ops to SPIR-V.
The lowering is specified as a pattern and is done only if the result
is a SPIR-V scalar type or vector type.
Handling ConstantOp with index return type needs special handling
since SPIR-V dialect does not have index types. Based on the bitwidth
of the attribute value, either i32 or i64 is chosen.
Other constant lowerings are left as a TODO.

PiperOrigin-RevId: 274056805
2019-10-10 17:19:57 -07:00