Commit Graph

291723 Commits

Author SHA1 Message Date
Aaron Ballman 0d78a90a7d Add a new class to analyze whether an expression is mutated within a statement.
ExprMutationAnalyzer is a generally useful helper that can be used in different clang-tidy checks for checking whether a given expression is (potentially) mutated within a statement (typically the enclosing compound statement.) This is a more general and more powerful/accurate version of isOnlyUsedAsConst, which is used in ForRangeCopyCheck, UnnecessaryCopyInitialization.

Patch by Shuai Wang

llvm-svn: 334604
2018-06-13 14:41:42 +00:00
Cameron McInally f37bd01ddc [FPEnv] Expand constrained FP operations
Add a helper function to expand constrained FP operations as needed. 
Note that the Strict POWI operation is not handled in this patch since 
the format is slightly different from the others.

Differential Revision: https://reviews.llvm.org/D47491

llvm-svn: 334603
2018-06-13 14:32:12 +00:00
Hans Wennborg 12ba9ec929 Do not enforce absolute path argv0 in windows
Even if we support no-canonical-prefix on
clang-cl(https://reviews.llvm.org/D47480), argv0 becomes absolute path
in clang-cl and that embeds absolute path in /showIncludes.

This patch removes such full path normalization from InitLLVM on
windows, and that removes absolute path from clang-cl output
(obj/stdout/stderr) when debug flag is disabled.

Patch by Takuto Ikuta!

Differential Revision https://reviews.llvm.org/D47578

llvm-svn: 334602
2018-06-13 14:29:26 +00:00
Guillaume Chatelet b391f24303 [llvm-exegesis] Fix buildbot - power was using native target for X86.
Reviewers: courbet

Reviewed By: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48125

llvm-svn: 334601
2018-06-13 14:07:36 +00:00
Piotr Padlewski e368de364e Add -fforce-emit-vtables
Summary:
 In many cases we can't devirtualize
 because definition of vtable is not present. Most of the
 time it is caused by inline virtual function not beeing
 emitted. Forcing emitting of vtable adds a reference of these
 inline virtual functions.
 Note that GCC was always doing it.

Reviewers: rjmccall, rsmith, amharc, kuhar

Subscribers: llvm-commits, cfe-commits

Differential Revision: https://reviews.llvm.org/D47108

Co-authored-by: Krzysztof Pszeniczny <krzysztof.pszeniczny@gmail.com>
llvm-svn: 334600
2018-06-13 13:55:42 +00:00
Guillaume Chatelet 60e3d582f6 [llvm-exegesis] Fix failing assert when creating Snippet for LAHF.
Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48123

llvm-svn: 334599
2018-06-13 13:53:56 +00:00
Krzysztof Parzyszek 3e039f86cc Revert "Improve handling of COPY instructions with identical value numbers"
This reverts r334594, it breaks buildbots and fails with expensive checks.

llvm-svn: 334598
2018-06-13 13:49:06 +00:00
Erich Keane 1d73d1aaa1 Correct behavior of __builtin_*_overflow and constexpr.
Enable these builtins to be called across a lambda
boundary with captureless const/constexpr, as brought up by 
Eli here: https://reviews.llvm.org/D48040

Differential Revision: https://reviews.llvm.org/D48053

llvm-svn: 334597
2018-06-13 13:25:11 +00:00
Guillaume Chatelet c9f727bb85 [llvm-exegesis] Cleaner design without mutable data.
Summary: Previous design was relying on the 'mutate' keyword and was quite confusing. This version separate mutable from immutable data and makes it clearer what changes and what doesn't.

Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48020

llvm-svn: 334596
2018-06-13 13:24:41 +00:00
Zoran Jovanovic 3a7654c15d [mips][microMIPS] Extending size reduction pass with LWP and SWP
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
It introduces reduction of two instructions into one instruction:
Two SW instructions are transformed into one SWP instrucition.
Two LW instructions are transformed into one LWP instrucition.
Differential Revision: https://reviews.llvm.org/D39115

llvm-svn: 334595
2018-06-13 12:51:37 +00:00
Krzysztof Parzyszek 36b816f814 Improve handling of COPY instructions with identical value numbers
Differential Revision: https://reviews.llvm.org/D48102

llvm-svn: 334594
2018-06-13 12:47:17 +00:00
Ivan Donchevskii 3957e48a68 [libclang] Optionally add code completion results for arrow instead of dot
Follow up for D41537 - libclang part.

Differential Revision: https://reviews.llvm.org/D46862

llvm-svn: 334593
2018-06-13 12:37:08 +00:00
Sanjay Patel b983ac6fe1 [x86] eliminate even more sign-bit tests with vector select
This shortcoming was noted in D47330, and the test diffs show we already 
had other examples where we failed to fold to a SHRUNKBLEND:

/// Dynamic (non-constant condition) vector blend where only the sign bits
/// of the condition elements are used. This is used to enforce that the
/// condition mask is not valid for generic VSELECT optimizations.

This patch implements an idea from D48043 and would obsolete that patch 
because it catches more cases (notable the AVX1 case that was missed there). 
All we're doing is allowing the existing transform to fire more often by 
removing the post-legalize constraint. All of the relevant feature checks 
and other predicates are left as-is.

Differential Revision: https://reviews.llvm.org/D48078

llvm-svn: 334592
2018-06-13 12:28:32 +00:00
Alex Bradbury 96f492d7df [RISCV] Add codegen support for atomic load/stores with RV32A
Fences are inserted according to table A.6 in the current draft of version 2.3
of the RISC-V Instruction Set Manual, which incorporates the memory model
changes and definitions contributed by the RISC-V Memory Consistency Model
task group.

Instruction selection failures will now occur for 8/16/32-bit atomicrmw and 
cmpxchg operations when targeting RV32IA until lowering for these operations 
is added in a follow-on patch.

Differential Revision: https://reviews.llvm.org/D47589

llvm-svn: 334591
2018-06-13 12:04:51 +00:00
Alex Bradbury dc790dd5d0 [RISCV] Codegen support for atomic operations on RV32I
This patch adds lowering for atomic fences and relies on AtomicExpandPass to
lower atomic loads/stores, atomic rmw, and cmpxchg to __atomic_* libcalls.

test/CodeGen/RISCV/atomic-* are modelled on the exhaustive
test/CodeGen/PPC/atomics-regression.ll, and will prove more useful once RV32A
codegen support is introduced.

Fence mappings are taken from table A.6 in the current draft of version 2.3 of
the RISC-V Instruction Set Manual, which incorporates the memory model changes
and definitions contributed by the RISC-V Memory Consistency Model task group.

Differential Revision: https://reviews.llvm.org/D47587

llvm-svn: 334590
2018-06-13 11:58:46 +00:00
Sam McCall 0f8df3e35a Revert "[clangd] Log completion context type. NFC"
This reverts commit r334572, which has a potential use-after-free.

llvm-svn: 334589
2018-06-13 11:31:20 +00:00
Simon Pilgrim 2c9d2adff5 [SLPVectorizer] getSameOpcode - remove useless cast [NFC]
There's no need to cast the base Value to an Instruction

llvm-svn: 334588
2018-06-13 10:49:24 +00:00
Simon Pilgrim 1224260f83 [SLPVectorizer] getSameOpcode - remove unusued alternate code [NFC]
We early-out for the case where we don't use alternate opcodes, so no need to check for it later.

llvm-svn: 334587
2018-06-13 10:14:27 +00:00
Clement Courbet 5eeed77f87 [TableGen] Emit a fatal error on inconsistencies in resource units vs cycles.
Summary:
For targets I'm not familiar with, I've automatically made the "default to 1 for each resource" behaviour explicit in the td files.
For more obvious cases, I've ventured a fix.

Some notes:
 - Exynos is especially fishy.
 - AArch64SchedThunderX2T99.td had some truncated entries. If I understand correctly, the person who wrote that interpreted the ResourceCycle as a range. I made the decision to use the upper/lower bound for consistency with the 'Latency' value. I'm sure there is a better choice.
 - The change to X86ScheduleBtVer2.td is an NFC, it just makes values more explicit.

Also see PR37310.

Reviewers: RKSimon, craig.topper, javed.absar

Subscribers: kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D46356

llvm-svn: 334586
2018-06-13 09:41:49 +00:00
Ilya Biryukov b10ef47a68 [clangd] Move caching of compile args out of ClangdServer.
Summary:
Caching is now handled by ClangdLSPServer and hidden behind the
GlobalCompilationDatabase interface. This simplifies ClangdServer.
This change also removes the SkipCache flag from addDocument,
which is now obsolete.

No behavioral changes are intended, the clangd binary still caches the
compile commands on the first read.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: mgorny, ioeric, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D48068

llvm-svn: 334585
2018-06-13 09:20:41 +00:00
Hans Wennborg 005dd84644 GettingStarted.rst: Fix 'If you you' typo (PR37787)
llvm-svn: 334584
2018-06-13 09:11:10 +00:00
Hiroshi Inoue 0f7f59f073 [PowerPC] fix trivial typos in comment, NFC
llvm-svn: 334583
2018-06-13 08:54:13 +00:00
Hans Wennborg 32e611d1a9 Fix -DLLVM_ENABLE_THREADS=OFF build after r334537
llvm-svn: 334582
2018-06-13 08:43:03 +00:00
Aaron Smith 7e2ea97c9b [WebAssembly] Fix broken build due to missing attributes.inc
WebAssembly depends on attributes.h which includes attributes.inc. 
Unless cmake explicitly specifies this dependency, the .inc file 
is sometimes generated after the build tries to use it.

Patch by Stella Stamenova 

llvm-svn: 334581
2018-06-13 08:38:23 +00:00
Pavel Labath 4b896eb792 Fix "Optional" is ambiguous error on some bots
llvm-svn: 334580
2018-06-13 08:29:19 +00:00
Hiroshi Inoue 9bffc94cf0 [PowerPC] avoid verification failure due to PowerPC VSX Swap Removal pass
This patch fixes a failure in lnt tests with -verify-machineinstrs option.
When VSX Swap Removal pass swaps two register operands, it did not maintain kill flags associated with operands. This patch swaps flags as well as register number to avoid inconsistent kill flags information.

llvm-svn: 334579
2018-06-13 08:25:14 +00:00
Pavel Labath 4adc88ed25 [DWARF/AccelTable] Remove getDIESectionOffset for DWARF v5 entries
Summary:
This method was not correct for entries in DWO files as it assumed it
could just add up the CU and DIE offsets to get the absolute DIE offset.
This is not correct for the DWO files, as here the CU offset will
reference the skeleton unit, whereas the DIE offset will be the offset
in the full unit in the DWO file.

Unfortunately, this means that we are not able to determine the absolute
DIE offset using the information in the .debug_names section alone,
which means we have to offload some of this work to the users of this
class.

To demonstrate how this can be done, I've added/fixed the ability to
lookup entries using accelerator tables in DWO files in llvm-dwarfdump.
To make this happen, I've needed to make two extra changes in other
classes:
- made the DWARFContext method to lookup a CU based on the section
  offset public. I've needed this functionality to lookup a CU, and this
  seems like a useful thing in general.
- made DWARFUnit::getDWOId call extractDIEsIfNeeded. Before this, the
  DWOId was filled in only if the root DIE happened to be parsed
  before we called the accessor. Since the lazy parsing is supposed to
  happen under the hood, calling extractDIEsIfNeeded seems appropriate.

Reviewers: JDevlieghere, aprantl, dblaikie

Subscribers: mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D48009

llvm-svn: 334578
2018-06-13 08:14:27 +00:00
Craig Topper 2527c378c6 [X86] Remove masking from avx512vbmi2 concat and shift by immediate builtins. Use select builtins instead.
llvm-svn: 334577
2018-06-13 07:19:28 +00:00
Craig Topper 3829d258ee [X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
llvm-svn: 334576
2018-06-13 07:19:21 +00:00
Petr Hosek 7252e2a8bd [XRay] Set an explicit dependency on libc++ when needed
When XRay is being built as part of the just built compiler together
with libc++ as part of the runtimes build, we need an explicit
dependency from XRay to libc++ to make sure that the library is
available by the time we start building XRay.

Differential Revision: https://reviews.llvm.org/D48113

llvm-svn: 334575
2018-06-13 07:08:28 +00:00
Hans Wennborg 5c268f078d crash-report-modules.m: Shorten path length to make Windows bot happy
llvm-svn: 334574
2018-06-13 06:48:40 +00:00
Bill Wendling 744c48a146 Remove extraneous semicolon.
llvm-svn: 334573
2018-06-13 06:33:59 +00:00
Sam McCall 2b45492247 [clangd] Log completion context type. NFC
llvm-svn: 334572
2018-06-13 06:25:36 +00:00
Bill Wendling 206afca58e Set the code model when specified.
llvm-svn: 334571
2018-06-13 05:53:59 +00:00
Petr Hosek 22f8825dca Reland "Passthrough additional flags to custom libcxx CMake build"
This is needed when we're cross-compiling compiler-rt.

Differential Revision: https://reviews.llvm.org/D47834

llvm-svn: 334570
2018-06-13 05:32:22 +00:00
Akira Hatanaka 4ac16db5d2 [Sema] When the address of a member function is used as a template
argument, use the context in which it is used for checking its
accessibility.

This fixes PR32898.

rdar://problem/33737747

Differential Revision: https://reviews.llvm.org/D36918

llvm-svn: 334569
2018-06-13 05:26:23 +00:00
Tom Stellard 4ee4eb7c76 utils/release: Add merge-git.sh
Summary:
This script allows you to use git to backport a commit to a stable
branch while generating the exact same commit message (ignoring
whitespace) that you would get from using the merge.sh script with svn.

Reviewers: hansw

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47760

llvm-svn: 334568
2018-06-13 05:14:10 +00:00
Max Kazantsev 0ed79620c6 [SimplifyIndVars] Ignore dead users
IndVarSimplify sometimes makes transforms basing on users that are trivially dead. In particular,
if DCE wasn't run before it, there may be a dead `sext/zext` in loop that will trigger widening
transforms, however it makes no sense to do it.

This patch teaches IndVarsSimplify ignore the mist trivial cases of that.

Differential Revision: https://reviews.llvm.org/D47974
Reviewed By: sanjoy

llvm-svn: 334567
2018-06-13 02:25:32 +00:00
Ahmed Bougacha 8472ec9663 Revert "Fix how LLVMOPTIONALCOMPONENTS is passed to llvm-build"
This reverts commit r334543.

My understanding is, that commit is intended to make the llvm-build
invocation have a correct "--enable-optional-components" value, but:
- it already has a value: it's quoted in the command line a few lines
  below, and, if I hack llvm-build to print sys.argv, it does look correct:
    -- llvm-build output: ['.../utils/llvm-build/llvm-build',
      '--native-target', 'X86', '--enable-targets', 'X86;ARM;AArch64',
      '--enable-optional-components', '',
      '--write-library-table',
      '.../build/tools/llvm-config/LibraryDependencies.inc',
      '--write-cmake-fragment', '.../build/LLVMBuild.cmake']
- the " " string seems to evaluate to TRUE in CMake (*sigh*), so this
  basically force-enables LLVM_USE_INTEL_JITEVENTS, regardless of the
  value of the option.
  On Darwin, JITEvents is not supported, so this bypasses that OS check
  but is guaranteed to fail later.

llvm-svn: 334566
2018-06-13 02:16:01 +00:00
Richard Smith 8fa638ae6f Fix crash emitting transparent list initializer for a large aggregate.
llvm-svn: 334565
2018-06-13 02:06:28 +00:00
Rui Ueyama 92b931d519 Use shorter names for #lo, #hi, #ha, etc. NFC.
Since these functions are file-local, the new names shouldn't be ambiguous.

Differential Revision: https://reviews.llvm.org/D48093

llvm-svn: 334564
2018-06-13 00:50:17 +00:00
Craig Topper 55488731be [X86] Mark all instructions that have masked store semantics with NotMemoryFoldable. Remove dependency on SchedRW from memory table autogenerator.
Previously we were whitelisting in instructions based on their SchedRW value. With the masked store instructions explicitly removed via NotMemoryFoldable, we don't seem to need this check anymore.

llvm-svn: 334563
2018-06-13 00:04:08 +00:00
Craig Topper 4f9cac667b [X86] Remove VPCOMPRESSB/W from the autogenerated load folding table.
llvm-svn: 334562
2018-06-13 00:04:04 +00:00
Yaxun Liu aa24601f98 [CUDA][HIP] Allow CUDA __global__ functions to have amdgpu kernel attributes
There are HIP applications e.g. Tensorflow 1.3 using amdgpu kernel attributes, however
currently they are only allowed on OpenCL kernel functions.

This patch will allow amdgpu kernel attributes to be applied to CUDA/HIP __global__
functions.

Differential Revision: https://reviews.llvm.org/D47958

llvm-svn: 334561
2018-06-12 23:58:59 +00:00
George Karpenkov e6fdb6a28c [analyzer] Do not crash in the visitor when the function is given more arguments than it has parameters
rdar://40335545

Differential Revision: https://reviews.llvm.org/D48107

llvm-svn: 334560
2018-06-12 23:53:54 +00:00
Stanislav Mekhanoshin 8fd3c4e431 [AMDGPU] DAG combine to produce V_PERM_B32
Differential Revision: https://reviews.llvm.org/D48099

llvm-svn: 334559
2018-06-12 23:50:37 +00:00
Peter Wu fa60e6966c [ASAN] disable fgets_fputs test for android and darwin
aarch64/aosp_marlin-userdebug/OPR4.170623.016] builder unexpectedly
failed the fgets test (`assertion "fp" failed`). macOS unexpectedly
passes the fputs test without triggering ASAN.

llvm-svn: 334558
2018-06-12 23:05:03 +00:00
Raphael Isemann 5714504ab2 Disable warnings for the generated LLDB wrapper source
Summary:
This source files emits all kind of compiler warnings on different platforms. As the source code
in the file is generated and we therefore can't actually fix the warnings, we might as well disable
them.

Reviewers: aprantl, davide

Reviewed By: davide

Subscribers: davide, mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D48096

llvm-svn: 334557
2018-06-12 22:51:20 +00:00
Sanjay Patel 82bc842650 [AArch64] add tests for fadd with more than one use; NFC
llvm-svn: 334556
2018-06-12 22:50:37 +00:00
Raphael Isemann 7d1d180eaf Added missing include to AMDHSAKernelDescriptor.h
We use size_t in this header, so we also need to include
cstddef to make it compile. Fixes the module builds.

llvm-svn: 334555
2018-06-12 22:40:20 +00:00