Commit Graph

422365 Commits

Author SHA1 Message Date
Peter Klausler 787ee99d4f [flang] Allow for host association in ConvertTo(Object|Proc)Entity
Name resolution fails with a bogus "is not a variable" error message
when a host-associated object appears in a NAMELIST group.  The root
cause is that ConvertToObjectEntity() returns false for host-associated
objects.  Fix that, and also apply a similar fix to ConvertToProcEntity()
nearby.

Differential Revision: https://reviews.llvm.org/D124541
2022-04-27 12:30:03 -07:00
Blue Gaston 8b574a1e51 [Darwin][UBSan][Sanitizer] abort_on_error ubsan test fix for arm64
The current darwin abort_on_error test specifically tests for a division
by zero undefined behavior. However arm does not trap by default for this
behavior. x86 signals the abort, which is why the test passes on x86.
This patch updates the test to test for a case where the ubsan runtime
specifically calls Die() to trigger an abort by default.

rdar://92108564

Differential Revision: https://reviews.llvm.org/D124480
2022-04-27 12:23:03 -07:00
Petr Hosek 82aa5e2c6f Revert "[Driver] Support for compressed debug info on Fuchsia"
This reverts commit 2d0c897212 which
is still breaking on the sanitizer bots.
2022-04-27 11:41:41 -07:00
Matt Arsenault e617d1a1d7 llvm-reduce: Fix mangling types of generic registers 2022-04-27 14:27:36 -04:00
Petr Hosek 2d0c897212 [Driver] Support for compressed debug info on Fuchsia
Pass the --compress-debug-sections=zlib argument to the linker when
the use of compressed debug info is requested.

Differential Revision: https://reviews.llvm.org/D114115
2022-04-27 11:24:41 -07:00
Matt Arsenault 6d6288f2be llvm-reduce: Preserve subregisters and other fields for top block def 2022-04-27 14:21:43 -04:00
Nicolas Abram Lujan f8a574bf4d [InstCombine] C0 >> (X - C1) --> (C0 << C1) >> X
With the right pre-conditions, we can fold the offset
into the shifted constant:
https://alive2.llvm.org/ce/z/drMRBU
https://alive2.llvm.org/ce/z/cUQv-_

Fixes #55016

Differential Revision: https://reviews.llvm.org/D124369
2022-04-27 14:18:30 -04:00
Craig Topper c2614b31d9 [RISCV] Add isCommutable to scalar FMA instructions.
The default implementation of findCommutedOpIndices picks the
first two source operands. That's exactly what we want for the
scalar FMA instructions.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D124463
2022-04-27 11:07:18 -07:00
Martin Sebor efa0f12c0b [InstCombine] Fold strnlen calls in equality to zero.
Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D123818
2022-04-27 12:03:24 -06:00
Alexey Bataev 29a470e380 [COST]Improve cost model for shuffles in SLP.
Introduced masks where they are not added and improved target dependent
cost models to avoid returning of the incorrect cost results after
adding masks.

Differential Revision: https://reviews.llvm.org/D100486
2022-04-27 10:56:26 -07:00
Zequan Wu afd639071b [LLDB][NativePDB] Minor fix ParseInlinesite.
- Don't reset cur_line_offset to llvm::None when we don't have next_line_offset, because we may need to reuse it in new range after a code end.
- Don't use CombineConsecutiveEntriesWithEqualData for inline_site_sp->ranges, because that will combine consecutive entries with same data in the vector regardless of the entry's range. Originally, I thought that it only combine consecutive entries if adjacent entries' ranges are adjoining or intersecting with each other.
2022-04-27 10:56:03 -07:00
Andrew Savonichev 1041a9642b [lit] Support %if ... %else syntax for RUN lines
This syntax allows to modify RUN lines based on features
available. For example:

    RUN: ... | FileCheck %s --check-prefix=%if windows %{CHECK-W%} %else %{CHECK-NON-W%}
    CHECK-W: ...
    CHECK-NON-W: ...

The whole command can be put under %if ... %else:

    RUN: %if tool_available %{ %tool %} %else %{ true %}

or:

    RUN: %if tool_available %{ %tool %}

If tool_available feature is missing, we'll have an empty command in
this RUN line.  LIT used to emit an error for empty commands, but now
it treats such commands as nop in all cases.

Multi-line expressions are also supported:

    RUN: %if tool_available %{ \
    RUN:   %tool               \
    RUN: %} %else %{           \
    RUN:   true                \
    RUN: %}

Background and motivation:
D121727 [NVPTX] Integrate ptxas to LIT tests
https://reviews.llvm.org/D121727

Differential Revision: https://reviews.llvm.org/D122569
2022-04-27 20:29:08 +03:00
Wei Wang 26a0d53b15 [CHR] Skip region containing llvm.coro.id
When a block containing llvm.coro.id is cloned during CHR, it inserts an invalid
PHI node with token type to the beginning of the block containing llvm.coro.begin.
To avoid such case, we exclude regions with llvm.coro.id.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D124418
2022-04-27 10:27:25 -07:00
Aart Bik ccd047cba4 [mlir][sparse] optimize COO index handling
By using a shared index pool, we reduce the footprint of each "Element"
in the COO scheme and, in addition, reduce the overhead of allocating
indices (trading many allocations of vectors for allocations in a single
vector only). When the capacity is known, this means *all* allocation
can be done in advance.

This is a big win. For example, reading matrix SK-2005, with dimensions
50,636,154 x 50,636,154 and 1,949,412,601 nonzero elements improves
as follows (time in ms), or about 3.5x faster overall

```
SK-2005 before        after      speedup
  ---------------------------------------------
read     305,086.65    180,318.12    1.69
sort   2,836,096.23    510,492.87    5.56
pack     364,485.67    312,009.96    1.17
  ---------------------------------------------
TOTAL  3,505,668.56  1,002,820.95    3.50
```

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D124502
2022-04-27 10:20:47 -07:00
Vasileios Porpodas c7bb5ac5ca [NFC] Renamed /test/Analysis/CostModel/X86/splat-load.ll test and added more checks.
Renamed test/Analysis/CostModel/X86/splat-load.ll to shuffle-load.ll
to align it with AArch64's similar test.

Also added a complete list of checks for all vector combinations up to 512-bits.

Differential Revision: https://reviews.llvm.org/D124528
2022-04-27 09:47:43 -07:00
Min-Yih Hsu a75657d66a [mlir][LLVMIR] Do not cache llvm::Constant into instMap
Constants in MLIR are not globally unique, unlike that in LLVM IR.
Therefore, reusing previous-translated constants might cause the user
operations not being dominated by the constant (because the
previous-translated ones can be placed in arbitrary place)

This indeed misses some opportunities where we actually can reuse a
previous-translated constants, but verbosity is not our first priority
here.

Differential Revision: https://reviews.llvm.org/D124404
2022-04-27 09:43:49 -07:00
Min-Yih Hsu ea9bcb8b27 [mlir][LLVMIR] Do not cache Instruction generated on-the-fly
More specifically, the llvm::Instruction generated by
llvm::ConstantExpr::getAsInstruction. Such Instruction will be deleted
right away, but it's possible that when getAsInstruction is called
again, it will create a new Instruction that has the same address with
the one we just deleted. Thus, we shouldn't keep it in the `instMap` to
avoid a conflicting index that triggers an assertion in
processInstruction.

Differential Revision: https://reviews.llvm.org/D124402
2022-04-27 09:42:59 -07:00
Min-Yih Hsu 00fcf9e95a [mlir][LLVMIR] Add support for importing struct-type ConstantAggregate(Zero)
And move importer test files from `test/Target/LLVMIR` into
`test/Target/LLVMIR/Import`.

We simply translate struct-type ConstantAggregate(Zero) into a
serious of `llvm.insertvalue` operations against a `llvm.undef` root.
Note that this doesn't affect the original logics on translating
vector/array-type ConstantAggregate values.

Differential Revision: https://reviews.llvm.org/D124399
2022-04-27 09:42:26 -07:00
Mike Kashkarov d8b4ea486a [flang] Fix UBOUND() folding for constant arrays
Similarly to LBOUND in https://reviews.llvm.org/D123237, fix UBOUND() folding
for constant arrays (for both w/ and w/o DIM=): convert
GetConstantArrayLboundHelper into common helper class for both lower/upper
bounds.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D123520
2022-04-28 01:17:47 +09:00
Mathieu Fehr 88bc24a7e3 [mlir] Allow setting operation legality with an OperationName
This is necessary to handle conversions of operations defined at runtime in extensible dialects.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D124353
2022-04-27 08:54:51 -07:00
Chris Bieneman 05b765ff69 [DXIL] [NFC] Remove dead attribute code paths
DXIL doesn't support attributes added after LLVM 3.7. The DXILPrepare
pass removes those attributes so they should never be present by the
time we reach the DXIL bitcode writer.

In the event that we somehow try to write a newer attribute in the DXIL
writer, we should fail hard (crash), because the output would be
invalid. This case should only be possible if the DXIL writer were
called without DXILPrepare being run first, which shouldn't be possible.

This patch also adds a default case to the switch statement over the
attribute list which covers all the removed cases and any new attribute
kinds that may be added in the future. The default case is handled like
other unsupported cases by a call to llvm_unreachable.
2022-04-27 10:46:59 -05:00
Hans Wennborg aed44d2822 Remove the Visual Studio/MSBuild integration (llvm/tools/msbuild/)
This has been obsolete and abandoned since MS started including an
integration themselves in Visual Studio 2019.

See discussion at
https://discourse.llvm.org/t/building-the-llvm-with-msbuild/62053/

Differential revision: https://reviews.llvm.org/D124521
2022-04-27 17:28:43 +02:00
Jonas Devlieghere 0e9af88b70
Remove Python 2 checks from the test suite
We dropped downstream support for Python 2 in the previous release. Now
that we have branched for the next release the window where this kind of
change could introduce conflicts is closing too. Remove Python 2 checks
from the test suite.

Differential revision: https://reviews.llvm.org/D124429
2022-04-27 08:26:26 -07:00
Jonas Devlieghere 9053767330
Remove Python 2 support from the ScriptInterpreter plugin
We dropped downstream support for Python 2 in the previous release. Now
that we have branched for the next release the window where this kind of
change could introduce conflicts is closing too. Start by getting rid of
Python 2 support in the Script Interpreter plugin.

Differential revision: https://reviews.llvm.org/D124429
2022-04-27 08:26:25 -07:00
Dmitry Vyukov 16baf59c6d tsan: avoid false positives related to epoll
An application can use the mere fact of epoll_wait returning an fd
as synchronization with the write on the fd that triggered the notification.
This pattern come up in an internal networking server (b/229276331).

If an fd is added to epoll, setup a link from the fd to the epoll fd
and use it for synchronization as well.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D124518
2022-04-27 16:59:46 +02:00
Simon Pilgrim 03482bccad [X86] collectConcatOps - add ability to collect from vector 'widening' patterns
Recognise insert_subvector(undef, x, lo/hi) patterns where we double the width of a vector - creating an UNDEF subvector on the fly.
2022-04-27 15:38:58 +01:00
David Green 46cef9a82d [AArch64] Attempt to fix bots by ensuring legalized type is a vector 2022-04-27 15:36:15 +01:00
Andrew Savonichev 9933302660 [NVPTX] Fix NVPTX DebugInfo tests on Windows 2022-04-27 17:32:00 +03:00
Lei Zhang d137c05fc9 [mlir][spirv] Add conversion from vector.reduction
Only supports addition and multiplication for now; other cases
to be implemented.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D124380
2022-04-27 10:29:46 -04:00
Roman Lebedev ffafa71f64
[InstCombine] 'round up integer': if bias is just right, just reuse instructions
This is only useful if we can't create new instruction
because %x.aligned has other uses and already sticks around.
2022-04-27 17:27:02 +03:00
Roman Lebedev aac0afd1dd
[InstCombine] Fold 'round up integer' pattern (when alignment is a power of two)
But don't deal with non-splats.

The test coverage is sufficiently exhaustive,
and alive is happy about the changes there.

Example with constants: https://alive2.llvm.org/ce/z/EUaJ5- / https://alive2.llvm.org/ce/z/Bkng2X
General proof: https://alive2.llvm.org/ce/z/3RjJ5A
2022-04-27 17:26:55 +03:00
Roman Lebedev d4563bfeb9
[NFC][InstCombine] Add some tests for open-coded round-up of an integer w/ power-of-2 target alignment 2022-04-27 17:24:42 +03:00
Lei Zhang 38e802a09d [mlir][spirv] Allow converting from index type in unsigned ops
`index` type is converted to `i32` in SPIR-V. This is fine to
support for all signed/unsigned ops.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D124451
2022-04-27 10:13:50 -04:00
Shilei Tian a6b355dd31 [SLP] Fix a typo that causes redundant assertion and potential segment fault
Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D124497
2022-04-27 10:07:59 -04:00
Pavel Labath eeaa3b5478 [lldb] Remove sanity check from TestWithLimitDebugInfo
The trick with opening the .o file does not work on arm (unhandled
relocations), and I can't think of a quick fix for that.
2022-04-27 16:01:54 +02:00
Joseph Huber 0a4a43cf13 [OpenMP] Properly handle the `-f/-fno` veraints for the new driver
Summary:
We provide the `-f(no-)openmp-new-driver` option to allow users to use
the old or new driver. Previously this wasn't handled in the expected
way and only `-fno-openmp-new-driver` was checked. This patch fixes that
by using the `hasFlag` method as is standard.
2022-04-27 09:58:55 -04:00
Sanjay Patel fd9026131e [InstCombine] add tests for ashr/lshr of constant with shift amount offset; NFC
Baseline tests for D124369
2022-04-27 09:48:38 -04:00
LLVM GN Syncbot 74ddcc2b27 [gn build] Port 6ddf2a824d 2022-04-27 13:44:43 +00:00
Nikita Popov 4fcbd0eb4a [GVN] Add more tests for opaque pointer GEPs (NFC)
Some of these are equivalent when considering an offset encoding.
2022-04-27 15:41:55 +02:00
Ivan Kosarev 6ddf2a824d [AMDGPU] Adjust wave priority based on VMEM instructions to avoid duty-cycling.
As older waves execute long sequences of VALU instructions, this may
prevent younger waves from address calculation and then issuing their
VMEM loads, which in turn leads the VALU unit to idle. This patch tries
to prevent this by temporarily raising the wave's priority.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D124246
2022-04-27 14:37:18 +01:00
David Tenty 6e8dda047f [NFC] XFAIL tests which need visibility in XCOFF objectwriting
on AIX since this is currently unsupported and we added an error in D124392.
2022-04-27 09:31:36 -04:00
Anna Thomas c515b2f39e [IRCE] Avoid computing potentially unnecessary analyses. NFC
IRCE is a function pass that operates on loops. If there are no loops in
the function (as seen through LI), we should avoid computing the
remaining expensive analyses (such as BPI). Reordered the analyses
requests and early return if there are no loops. This is an NFC with
compile time improvement.

The same will be done in a follow-up patch for the loop vectorizer.

Reviewed-By: nikic
Differential Revision: https://reviews.llvm.org/D124478
2022-04-27 09:22:10 -04:00
Biplob Mishra 70dbb5abd3 InstCombine: Add tests to show or-and scenarios which can be possibly be combined generically 2022-04-27 14:18:12 +01:00
Pavel Labath 089a1d9deb [lldb] Fix TestWithLimitDebugInfo.py
The test was broken (in the sense that it was not testing what it was
supposed to test) in two ways:
- a Makefile refactor caused it to stop being built with
  -flimit-debug-info
- clang's constructor homing changed the "home" of the type

This patch fixes the Makefile, and modifies the source code to produce
the same result with both type homing strategies. Due to constructor
homing I had to use a different implicitly-defined function for the test
-- I chose the assignment operator.

I also added some sanity checks to the test to ensure that the test is
indeed operating on limited debug info.
2022-04-27 15:08:58 +02:00
Pavel Labath f513b5fc47 [lldb] Make test names unique 2022-04-27 15:08:58 +02:00
Florian Hahn 51be0925b4
[SimpleLoopUnswitch] Add trivial unswitching tests with selects.
Add tests with selects that match both logical AND and logical OR. Note
that some of the tests get miscompiled at the moment.

Also moves a related test to the newly added test file.
2022-04-27 14:06:36 +01:00
Denis Antrushin 4059770af5 [StatepointLowering] Only export STATEPOINT results if used in nonlocal blocks.
Cuurently we always export STATEPOINT results (GC pointers lowered via VRegs)
to virtual registers. When processing gc.relocate instructions we have to
generate CopyFromRegs node and then export it to VReg again if gc.relocate
is used in other basic blocks. This results in generation of extra COPY MIR
instruction if statepoint and its gc.relocate are in the same BB, but gc.relocate
result is used in other blocks.

This patch changes this behavior to export statepoint results only if used
in other basic blocks. For local uses StatepointLoweringState.(get|set)Location()
API is used to communicate appropriate statepoint result from `LowerStatepoint()`
to `visitGCRelocate()`

This is NFC and is purely compile time optimization. On big methids it can improve
codegen compile time up to 10%.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D124444
2022-04-27 15:53:24 +03:00
David Green 8e2a0e61f5 [AArch64] Break up larger shuffle-masks into legal sizes in getShuffleCost
Given a larger-than-legal shuffle mask, the final codegen will split
into multiple sub-vectors. This attempts to model that in
AArch64TTIImpl::getShuffleCost, splitting masks up according to the size
of the legalized vectors. If the sub-masks have at most 2 input sources
we can call getShuffleCost on them and sum the costs, to get a more
accurate final cost for the entire shuffle. The call to
improveShuffleKindFromMask helps to improve the shuffle kind for the
sub-mask cost call.

Differential Revision: https://reviews.llvm.org/D123414
2022-04-27 13:51:50 +01:00
David Green d42f222f9d [AArch64] Add some larger shuffle cost tests. NFC 2022-04-27 13:30:50 +01:00
Kiran Chandramohan acd75440c6 [Flang] Lower the FailImage Statement
Lowering of FailImage statement generates a runtime call and the
unreachable operation. The unreachable operation cannot terminate
a structured operation like the IF operation, hence  mark as
unstructured.

Note: This patch is part of upstreaming code from the fir-dev branch of
https://github.com/flang-compiler/f18-llvm-project.

Reviewed By: clementval

Differential Revision: https://reviews.llvm.org/D124520

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2022-04-27 12:20:25 +00:00