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Author SHA1 Message Date
Nadav Rotem 0d3393356b Add additional element-promotion tests. 
llvm-svn: 142442
 2011-10-18 23:05:33 +00:00
Jim Grosbach ad47cfcef9 ARM VTBL (one register) assembly parsing and encoding. 
llvm-svn: 142441
 2011-10-18 23:02:30 +00:00
Bill Wendling 4969dcdef9 Use the integer compare when the value is small enough. Use the "move into a 
register and then compare against that" method when it's too large. We have to
move the value into the register in the "movw, movt" pair of instructions.

llvm-svn: 142440
 2011-10-18 22:52:20 +00:00
Eric Christopher 9bede2dd92 Turn on the vzeroupper pass by default. 
I'll remove/rename the option in a few days.

llvm-svn: 142439
 2011-10-18 22:50:17 +00:00
Eric Christopher 2797d6e660 Whitespace. 
llvm-svn: 142438
 2011-10-18 22:50:13 +00:00
Bill Wendling 85833f71c6 Use the integer compare when the value is small enough. Use the "move into a 
register and then compare against that" method when it's too large. We have to
move the value into the register in the "movw, movt" pair of instructions.

llvm-svn: 142437
 2011-10-18 22:49:07 +00:00
Nick Lewycky ac4c1860a3 Missed a spot! 
llvm-svn: 142436
 2011-10-18 22:40:18 +00:00
Nick Lewycky 5ca33ac926 Fix some typo/formatting issues. No functionality change. 
llvm-svn: 142435
 2011-10-18 22:39:43 +00:00
Nadav Rotem 75c2229f41 Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Index starts with zero. 
llvm-svn: 142434
 2011-10-18 22:32:43 +00:00
Lang Hames 7d2f7b5a33 Teach fast isel about vector stores, and make DoSelectCall return false when it fails to emit a store. This fixes <rdar://problem/10215997>. 
llvm-svn: 142432
 2011-10-18 22:11:33 +00:00
Bill Wendling 973c817cde The value we're comparing against may be too large for the ARM CMP 
instruction. Move the value into a register and then use that for the CMP.
<rdar://problem/10305266>

llvm-svn: 142431
 2011-10-18 22:11:18 +00:00
Bill Wendling b2a703d352 The immediate may be too large for the CMP instruction. Move it into a register 
and use that in the CMP.
<rdar://problem/10305266>

llvm-svn: 142429
 2011-10-18 21:55:58 +00:00
Jim Grosbach 43f1d206b9 Tidy up formatting. 
llvm-svn: 142422
 2011-10-18 21:09:01 +00:00
Jim Grosbach 1f63e04b2c Tidy up formatting. 
llvm-svn: 142421
 2011-10-18 21:08:16 +00:00
Jim Grosbach 6918617e32 Yet more ARM NEON assembly parsing for the lane index operand. 
llvm-svn: 142416
 2011-10-18 20:21:17 +00:00
Jim Grosbach 4e5c764b65 Enable more encoded immediate tests. 
llvm-svn: 142415
 2011-10-18 20:20:51 +00:00
Jim Grosbach 89f9e1dca4 More vmov lane testcases. 
llvm-svn: 142414
 2011-10-18 20:19:48 +00:00
Jim Grosbach e9f204c197 ARM vmla/vmls assembly parsing for the lane index operand. 
llvm-svn: 142413
 2011-10-18 20:14:56 +00:00
Jim Grosbach 712f3670fd ARM vmov assembly parsing for the lane index operand. 
llvm-svn: 142412
 2011-10-18 20:10:47 +00:00
Jim Grosbach 05c562f094 The MCJITMemoryManager takes ownership of the JMM, so don't leak it. 
llvm-svn: 142410
 2011-10-18 19:57:38 +00:00
Michael J. Spencer 443410d722 Object/COFF: Remove useless test. 
llvm-svn: 142408
 2011-10-18 19:51:36 +00:00
Michael J. Spencer bfa067862c llvm-objdump: Add static symbol table dumping. 
llvm-svn: 142404
 2011-10-18 19:32:17 +00:00
Michael J. Spencer 097be9f63c Object/COFF: Change type from a struct to a uint16_t. The struct would be 
incorrect for bigendian systems.

llvm-svn: 142403
 2011-10-18 19:31:59 +00:00
Daniel Dunbar 96d812a68d build: Tidy up a bunch of tool Makefiles, and simplify where possible using the 
new all-targets pseudo-component.

llvm-svn: 142401
 2011-10-18 19:27:24 +00:00
Daniel Dunbar 627b2b06f6 llvm-ar: Remove local test target, this is no longer useful. 
llvm-svn: 142400
 2011-10-18 19:27:10 +00:00
Daniel Dunbar 5a96e6f9ed llvm-config: Add an all-targets pseudo-component. 
llvm-svn: 142399
 2011-10-18 19:27:08 +00:00
Daniel Dunbar a269763c66 build: Remove some unused code. 
llvm-svn: 142398
 2011-10-18 19:27:04 +00:00
Andrew Trick 88b2450adc Use ARM/t2PseudoInst class from ARM/Thumb2 special adds/subs patterns. 
Clean up the patterns, fix comments, and avoid confusing both tools
and coders. Note that the special adds/subs SelectionDAG nodes no
longer have the dummy cc_out operand.

llvm-svn: 142397
 2011-10-18 19:18:52 +00:00
Bob Wilson 93b0f7b319 Use isIntN and isUIntN to check for valid signed/unsigned numbers. 
llvm-svn: 142395
 2011-10-18 18:46:49 +00:00
Andrew Trick 3f07c429b5 whitespace 
llvm-svn: 142394
 2011-10-18 18:40:53 +00:00
Bill Wendling 617075fcf6 A landing pad could have more than one predecessor. In that case, we want that 
predecessor to remove the jump to it as well. Delay clearing the 'landing pad'
flag until after the jumps have been removed. (There is an implicit assumption
in several modules that an MBB which jumps to a landing pad has only two
successors.)
<rdar://problem/10304224>

llvm-svn: 142390
 2011-10-18 18:30:49 +00:00
Jim Grosbach 611450071c ARM vmla/vmls assembly parsing for the lane index operand. 
llvm-svn: 142389
 2011-10-18 18:27:07 +00:00
Owen Anderson 40ec1da2ab Another failing encoding. 
llvm-svn: 142388
 2011-10-18 18:23:03 +00:00
Jim Grosbach 32b83a4e16 Fix NEON mul encoding tests. Wrong file contents previously. 
llvm-svn: 142387
 2011-10-18 18:14:55 +00:00
Jim Grosbach c8eff0327a ARM vqdmulh assembly parsing for the lane index operand. 
llvm-svn: 142386
 2011-10-18 18:12:09 +00:00
Jim Grosbach d1bc6da657 Remove duplicate test. 
llvm-svn: 142383
 2011-10-18 18:05:50 +00:00
Jim Grosbach b3ecff77cd Tidy up formatting. 
llvm-svn: 142382
 2011-10-18 18:05:16 +00:00
Jim Grosbach e6fbca3a61 ARM vmul assembly parsing for the lane index operand. 
llvm-svn: 142381
 2011-10-18 18:01:52 +00:00
Jim Grosbach f416cb16c0 Tidy up. 
llvm-svn: 142380
 2011-10-18 18:01:09 +00:00
Owen Anderson c91064551a Add a few more testcases. 
llvm-svn: 142379
 2011-10-18 17:57:31 +00:00
Bruno Cardoso Lopes 2312a3aaa0 Final patch that completes old JIT support for Mips: 
-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

llvm-svn: 142378
 2011-10-18 17:50:36 +00:00
Owen Anderson 2a498c1107 Add several FIXME cases for ARM encodings. 
llvm-svn: 142377
 2011-10-18 17:50:22 +00:00
Bob Wilson 9258b76d8d Fix incorrect check for sign-extended constant BUILD_VECTOR. 
<rdar://problem/10298332>

llvm-svn: 142371
 2011-10-18 17:34:51 +00:00
Bob Wilson 681561901d Fix a DAG combiner assertion failure when constant folding BUILD_VECTORS. 
svn r139159 caused SelectionDAG::getConstant() to promote BUILD_VECTOR operands
with illegal types, even before type legalization.  For this testcase, that led
to one BUILD_VECTOR with i16 operands and another with promoted i32 operands,
which triggered the assertion.

llvm-svn: 142370
 2011-10-18 17:34:47 +00:00
Bill Wendling 06ac75c8e3 Don't exit just because some early commands fail. Use the -k flag when running the checks. 
llvm-svn: 142369
 2011-10-18 17:27:12 +00:00
Jim Grosbach 8206790ab0 Tests for 142365. 
llvm-svn: 142368
 2011-10-18 17:23:34 +00:00
Jim Grosbach 95135982cd Tidy up formatting. 
llvm-svn: 142367
 2011-10-18 17:22:53 +00:00
Jim Grosbach af26d7e280 ARM vqdmlal assembly parsing for the lane index operand. 
llvm-svn: 142365
 2011-10-18 17:16:30 +00:00
Jim Grosbach dfa7fb8fe6 Thumb2 parsing of 'mov.w' gets the cc_out operand wrong. Add an alias for it. 
llvm-svn: 142363
 2011-10-18 17:09:35 +00:00
Jim Grosbach e4454e0de2 ARM assembly parsing and encoding for VMOV.i64. 
llvm-svn: 142356
 2011-10-18 16:18:11 +00:00