Commit Graph

258210 Commits

Author SHA1 Message Date
Chandler Carruth 0d256c0f5d [IR] Make SwitchInst::CaseIt almost a normal iterator.
This moves it to the iterator facade utilities giving it full random
access semantics, etc. It can also now be used with standard algorithms
like std::all_of and std::any_of and range adaptors like llvm::reverse.

Also make the semantics of iterating match what every other iterator
uses and forbid decrementing past the begin iterator. This was used as
a hacky way to work around iterator invalidation. However, every
instance trying to do this failed to actually avoid touching invalid
iterators despite the clear documentation that the removed and all
subsequent iterators become invalid including the end iterator. So I've
added a return of the next iterator to removeCase and rewritten the
loops that were doing this to correctly follow the iterator pattern of
either incremneting or removing and assigning fresh values to the
iterator and the end.

In one case we were trying to go backwards to make this cleaner but it
doesn't actually work. I've made that code match the code we use
everywhere else to remove cases as we iterate. This changes the order of
cases in one test output and I moved that test to CHECK-DAG so it
wouldn't care -- the order isn't semantically meaningful anyways.

llvm-svn: 298791
2017-03-26 02:49:23 +00:00
Rui Ueyama beeab45770 Remove unused parameter.
llvm-svn: 298790
2017-03-26 02:28:09 +00:00
Rui Ueyama cb815ac549 Remove redundant local variables.
llvm-svn: 298789
2017-03-26 02:27:50 +00:00
Rui Ueyama b5cb328383 Remove a parameter from adjustExpr. NFC.
llvm-svn: 298788
2017-03-26 02:27:30 +00:00
Rui Ueyama dfd204fa1d Inline a small lambda.
llvm-svn: 298787
2017-03-26 02:27:11 +00:00
Rui Ueyama 2f274230f1 Rename C -> Sec and RI -> Rel.
C is short for Chunk, but we are no longer using that term.
RI is probably short for relocation iterator, but this is not an interator.

llvm-svn: 298786
2017-03-26 02:26:52 +00:00
Rui Ueyama 08aede362b Simplify relocation offset adjustment.
Previously, relocation offsets are recalculated for .eh_frame sections
inside the main loop, and that messed up the main loop. This patch
separates that logic into a dedicated class.

llvm-svn: 298785
2017-03-26 02:26:33 +00:00
Gor Nishanov 5eb585836a [coroutines] Add codegen for await and yield expressions
Details:

Emit suspend expression which roughly looks like:

auto && x = CommonExpr();
if (!x.await_ready()) {
   llvm_coro_save();
   x.await_suspend(...);     (*)
   llvm_coro_suspend(); (**)
}
x.await_resume();
where the result of the entire expression is the result of x.await_resume()

(*) If x.await_suspend return type is bool, it allows to veto a suspend:
if (x.await_suspend(...))
   llvm_coro_suspend();
(**) llvm_coro_suspend() encodes three possible continuations as a switch instruction:

%where-to = call i8 @llvm.coro.suspend(...)
switch i8 %where-to, label %coro.ret [ ; jump to epilogue to suspend
  i8 0, label %yield.ready   ; go here when resumed
  i8 1, label %yield.cleanup ; go here when destroyed
]

llvm-svn: 298784
2017-03-26 02:18:05 +00:00
Simon Pilgrim bec234c970 [X86] Pull out repeated ScalarValueSizeInBits code. NFCI.
llvm-svn: 298783
2017-03-25 21:22:12 +00:00
Simon Pilgrim c0720a4052 [X86][SSE] Combine (VSRLI (VSRAI X, Y), (NumSignBits-1)) -> (VSRLI X, (NumSignBits-1))
Part 3 of 3.

Differential Revision: https://reviews.llvm.org/D31347

llvm-svn: 298782
2017-03-25 20:43:01 +00:00
Eric Christopher 0935875c40 Change the default attributes for llvm.prefetch to inaccessiblemem_or_argmemonly
so that we can perform some optimizations across it.

Fixes PR32365

llvm-svn: 298781
2017-03-25 20:20:23 +00:00
Simon Pilgrim 6397963c81 [X86][SSE] Added ComputeNumSignBitsForTargetNode support for (V)PSRAI
Part 2 of 3.

Differential Revision: https://reviews.llvm.org/D31347

llvm-svn: 298780
2017-03-25 19:58:36 +00:00
Simon Pilgrim 5400a4d0af [X86][SSE] Generalised CMP+AND1 combine to ZERO/ALLBITS+MASK
Patch to generalize combinePCMPAnd1 (for handling SETCC + ZEXT cases) to work for any input that has zero/all bits set masked with an 'all low bits' mask.

Replaced the implicit assumption of shift availability with a call to SupportedVectorShiftWithImm.

Part 1 of 3.

Differential Revision: https://reviews.llvm.org/D31347

llvm-svn: 298779
2017-03-25 19:50:14 +00:00
Eric Christopher 1e6fedbb83 _CALL_LINUX is only defined on 64-bit ppc linux platforms, not 32-bit.
Adjust and add a test for the 32-bit side.

llvm-svn: 298778
2017-03-25 19:26:04 +00:00
Michal Gorny c4e42d2c66 PluginUnwindAssemblyX86: add missing linkage to MCDisasm
Add missing linkage of the lldbPluginUnwindAssemblyX86 to LLVMMCDisasm
library. This fixes the following build failure when linking against
shared libraries:

    lib64/liblldbPluginUnwindAssemblyX86.a(x86AssemblyInspectionEngine.cpp.o):x86AssemblyInspectionEngine.cpp:function lldb_private::x86AssemblyInspectionEngine::instruction_length(unsigned char*, int&): error: undefined reference to 'LLVMDisasmInstruction'
    lib64/liblldbPluginUnwindAssemblyX86.a(x86AssemblyInspectionEngine.cpp.o):x86AssemblyInspectionEngine.cpp:function lldb_private::x86AssemblyInspectionEngine::~x86AssemblyInspectionEngine(): error: undefined reference to 'LLVMDisasmDispose'
    lib64/liblldbPluginUnwindAssemblyX86.a(x86AssemblyInspectionEngine.cpp.o):x86AssemblyInspectionEngine.cpp:function lldb_private::x86AssemblyInspectionEngine::x86AssemblyInspectionEngine(lldb_private::ArchSpec const&): error: undefined reference to 'LLVMCreateDisasm'

Differential Revision: https://reviews.llvm.org/D31369

llvm-svn: 298777
2017-03-25 18:51:37 +00:00
Michal Gorny a32fc333d2 Expression: add missing linkage to RuntimeDyld component
Add missing linkage from lldbExpression library to LLVMRuntimeDyld.
Otherwise the build against shared LLVM libraries fails with:

    lib64/liblldbExpression.a(IRExecutionUnit.cpp.o):IRExecutionUnit.cpp:function llvm::RTDyldMemoryManager::deregisterEHFrames(unsigned char*, unsigned long, unsigned long): error: undefined reference to 'llvm::RTDyldMemoryManager::deregisterEHFramesInProcess(unsigned char*, unsigned long)'

Differential Revision: https://reviews.llvm.org/D31367

llvm-svn: 298776
2017-03-25 18:51:29 +00:00
Sanjay Patel 9ebb68843e [x86] use PMOVMSK to replace memcmp libcalls for 16-byte equality
This is the payoff for D31156 - if a target has efficient comparison instructions for vector-sized equality, 
we can replace memcmp calls with inline code that is both smaller and faster.

Differential Revision: https://reviews.llvm.org/D31290

llvm-svn: 298775
2017-03-25 16:05:33 +00:00
Simon Pilgrim c3e5c3c5bc [X86][SSE] Add extra computeNumSignBits test case for D31311.
llvm-svn: 298774
2017-03-25 15:43:36 +00:00
Yaxun Liu 354097b05d [AMDGPU] Make AMDGPUTargetInfo::AS private
llvm-svn: 298773
2017-03-25 11:34:41 +00:00
Craig Topper 47596dd4cc [InstCombine] Change the interface of SimplifyDemandedBits so that it takes the instruction and operand instead of the Use.
The first thing it did was get the User for the Use to get the instruction back. This requires looking through the Uses for the User using the waymarking walk. That's pretty fast, but its probably still better to just pass the Instruction we already had.

llvm-svn: 298772
2017-03-25 06:52:52 +00:00
Eric Christopher 19d8c1fed2 Update the comment on not yet generated preprocessor defines to remove __LONGDOUBLE128.
llvm-svn: 298771
2017-03-25 06:38:57 +00:00
Eric Christopher ee21410bdc Add the __LONGDOUBLE128 define for ppc targets that have 128 bit long doubles.
llvm-svn: 298770
2017-03-25 06:37:23 +00:00
Eric Christopher 0d36116394 Define __HAVE_BSWAP__ on ppc to match gcc since we support both builtins as well.
llvm-svn: 298769
2017-03-25 05:40:13 +00:00
Balaram Makam cf0e5e1c62 [AArch64] Refine Falkor Machine Model - Part1
llvm-svn: 298768
2017-03-25 04:02:39 +00:00
Yaxun Liu 3464f92e23 [AMDGPU] Switch address space mapping by triple environment amdgiz
For target environment amdgiz and amdgizcl (giz means Generic Is Zero), AMDGPU will use new address space mapping where generic address space is 0 and private address space is 5. The data layout is also changed correspondingly.

Differential Revision: https://reviews.llvm.org/D31210

llvm-svn: 298767
2017-03-25 03:46:25 +00:00
Shoaib Meenai f88923d9bf [libc++] Fix some comment typos
Remove a stray letter, add a missing letter. No functional change.

llvm-svn: 298766
2017-03-25 03:42:20 +00:00
Eric Christopher 2fd2eda0ac Add the _CALL_LINUX preprocessor define for ppc linux platforms.
This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but
our ppc suppport post-dates this and it should work on all linux platforms. It
is guaranteed to work on all elfv2 platforms.

llvm-svn: 298765
2017-03-25 03:33:59 +00:00
Shoaib Meenai b73d43521f [libc++] Fix word transposition in comment
"to due" -> "due to". No functional change.

llvm-svn: 298764
2017-03-25 03:29:51 +00:00
Shoaib Meenai 84904fb7ea [libc++] Fix capitalization in comment
Fix a stray capital letter in the middle of a sentence. No functional
change.

llvm-svn: 298763
2017-03-25 03:22:35 +00:00
Shoaib Meenai 301854203c [libc++] Update package version
Make it consistent with the rest of LLVM.

llvm-svn: 298762
2017-03-25 03:12:37 +00:00
Eric Christopher 153dad4ca9 __BIGGEST_ALIGNMENT__ has always been 16 on all power platforms rather
than the default of 8 in clang, fix and update tests accordingly.

llvm-svn: 298761
2017-03-25 02:55:21 +00:00
Davide Italiano e9781e7b2f [NewGVN] Adjust NDEBUG markers.
This avoids 'used but not defined' warnings in Release builds
with GCC.

llvm-svn: 298760
2017-03-25 02:40:02 +00:00
Eric Christopher b70819e6a2 Add preprocessor defines for a bare powerpc64le triple/cpu.
The le triple didn't exist until power8, so use that as a default (this
also matches what gcc does).

llvm-svn: 298759
2017-03-25 02:29:18 +00:00
Yaxun Liu 14834c3e3d [AMDGPU] Switch data layout by triple environment amdgiz
Switch data layout by target triple environment amdgiz and amdgizcl indicating using of an address space mapping in which generic address space is 0.

amdgiz is for non-OpenCL environment where generic address space is 0.

amdgizcl is for OpenCL environment where generic address space is 0.

Differential Revision: https://reviews.llvm.org/D31211

llvm-svn: 298758
2017-03-25 02:05:44 +00:00
Vitaly Buka 72b8acfb70 [libFuzzer] Fix test on Windows.
llvm-svn: 298757
2017-03-25 01:19:45 +00:00
Evgeniy Stepanov 71bb8f1ad0 [asan] Put ctor/dtor in comdat.
When possible, put ASan ctor/dtor in comdat.

The only reason not to is global registration, which can be
TU-specific. This is not the case when there are no instrumented
globals. This is also limited to ELF targets, because MachO does
not have comdat, and COFF linkers may GC comdat constructors.

The benefit of this is a lot less __asan_init() calls: one per DSO
instead of one per TU. It's also necessary for the upcoming
gc-sections-for-globals change on Linux, where multiple references to
section start symbols trigger quadratic behaviour in gold linker.

llvm-svn: 298756
2017-03-25 01:01:11 +00:00
Kostya Serebryany 86e630b857 [libFuzzer] read asan's dedup_token while minimizing a crash and stop minimization if another bug was found during minimization (https://github.com/google/oss-fuzz/issues/452)
llvm-svn: 298755
2017-03-25 00:56:08 +00:00
Richard Trieu 7583bec0c3 [ODRHash] Add support for array and decayed types.
llvm-svn: 298754
2017-03-25 00:48:52 +00:00
Evgeniy Stepanov 656bc5bb5c Fix sanitizer tests with LLVM_TOOL_LLD_BUILD=OFF.
Only depend on LLD if it is going to be built.

Re-land of r298174 which got reverted in r298287.

llvm-svn: 298753
2017-03-25 00:42:25 +00:00
Eli Friedman 95ddd18703 [ARM] Fix mixup between Lo and Hi in SMLALBB formation.
llvm-svn: 298752
2017-03-25 00:13:24 +00:00
Simon Pilgrim dbc94db3f3 Apply clang-format as commented in D31311. NFCI.
llvm-svn: 298751
2017-03-24 23:47:41 +00:00
Reid Kleckner 6b78e16368 [codeview] Don't assert when the user violates the ODR
If we have an array of a user-defined aggregates for which there was an
ODR violation, then the array size will not necessarily match the number
of elements times the size of the element.

Fixes PR32383

llvm-svn: 298750
2017-03-24 23:28:42 +00:00
Rui Ueyama 22f0d804f5 Use raw_fd_ostream::has_colors instead of StandardErrHasColors().
I just didn't know that raw_fd_ostream has has_colors() function.

llvm-svn: 298749
2017-03-24 23:21:34 +00:00
Rui Ueyama 561d72c328 Update comment.
llvm-svn: 298748
2017-03-24 23:21:14 +00:00
Jessica Paquette eac8633d6d [Outliner] Revert r298734.
When I tested r298734, I thought that red zones were enabled by default like in
X86. Since red zones are behind a flag on AArch64 the testing wasn't true.

llvm-svn: 298747
2017-03-24 23:00:21 +00:00
Kostya Serebryany c58982d6fa [libFuzzer] be more careful when calling strlen of strcmp parameters, PR32357
llvm-svn: 298746
2017-03-24 22:19:52 +00:00
Craig Topper 8fbb74b5b2 Revert r298711 "[InstCombine] Provide a way to calculate KnownZero/One for Add/Sub in SimplifyDemandedUseBits without recursing into ComputeKnownBits"
Tsan bot is failing.

llvm-svn: 298745
2017-03-24 22:12:10 +00:00
Sanjay Patel 650599d84d [x86] add 32-bit RUN for better memcmp coverage; NFC
llvm-svn: 298744
2017-03-24 22:09:48 +00:00
Alex Shlyapnikov f51fafde1e Fix flaky strtok.c test.
Asserting the result of strtok when we expect delimiter overflow is
flaky, the result depends on the random state of memory right after the
delimiters.

llvm-svn: 298743
2017-03-24 21:43:56 +00:00
Richard Trieu 73bac6a2f0 [ODRHash] Add error messages for mismatched parameters in methods.
llvm-svn: 298742
2017-03-24 21:17:48 +00:00