797cff0504
Consolidate some TableGen diagnostic helper functions.
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TableGen had diagnostic printers sprinkled about in a few places. Pull them
together into a single location in Error.cpp.
llvm-svn: 133568
2011-06-21 22:55:50 +00:00
0d7a5a7daa
since the VT is fixed for a ImmLeaf, there is no reason to expose it to the matching code.
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llvm-svn: 129677
2011-04-17 22:17:27 +00:00
2ff8c1a25f
now that predicates have a decent abstraction layer on them, introduce a new
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kind of predicate: one that is specific to imm nodes. The predicate function
specified here just checks an int64_t directly instead of messing around with
SDNode's. The virtue of this is that it means that fastisel and other things
can reason about these predicates.
llvm-svn: 129675
2011-04-17 22:05:17 +00:00
514e292b72
Rework our internal representation of node predicates to expose more
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structure and fix some fixmes. We now have a TreePredicateFn class
that handles all of the decoding of these things. This is an internal
cleanup that has no impact on the code generated by tblgen.
llvm-svn: 129670
2011-04-17 21:38:24 +00:00
880e299dcd
- Add "Bitcast" target instruction property for instructions which perform
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nothing more than a bitcast.
- Teach tablegen to automatically infer "Bitcast" property.
llvm-svn: 127667
2011-03-15 05:09:26 +00:00
094442d331
Silence uninitialized value warnings.
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llvm-svn: 124869
2011-02-04 17:01:53 +00:00
433c6180ab
[AVX] Implement EnforceSmallerThan for mixed int/fp type lists. This
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makes type checking for extract_subvector and insert_subvector more
robust and will allow stricter typechecking of more patterns in the
future.
This change handles int and fp as disjoint sets so that it will
enforce integer types to be smaller than the largest integer type and
fp types to be smaller than the largest fp type. There is no attempt
to check type sizes across the int/fp sets.
llvm-svn: 124672
2011-02-01 19:12:32 +00:00
127fd1d540
[AVX] Add type checking support for vector/subvector type constraints.
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This will be used to check patterns referencing a forthcoming
INSERT_SUBVECTOR SDNode. INSERT_SUBVECTOR in turn is very useful for
matching to VINSERTF128 instructions and complements the already
existing EXTRACT_SUBVECTOR SDNode.
llvm-svn: 124145
2011-01-24 20:53:18 +00:00
2a0a3b43d7
Flag -> Glue, the ongoing saga
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llvm-svn: 122513
2010-12-23 18:28:41 +00:00
65586fea71
Tidy up a bit. Trailing whitespace, hard tabs and 80-columns.
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llvm-svn: 122337
2010-12-21 16:16:00 +00:00
77d369c8eb
eliminate the Records global variable, patch by Garrison Venn!
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llvm-svn: 121659
2010-12-13 00:23:57 +00:00
fb116aed60
Add source Record* reference to PatternToMatch. Allows better diagnostics.
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llvm-svn: 121196
2010-12-07 23:05:49 +00:00
d8adec70f3
factor the operand list (and related fields/operations) out of
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CodeGenInstruction into its own helper class. No functionality change.
llvm-svn: 117893
2010-11-01 04:03:32 +00:00
b75d0ca38e
A few 80 column cleanups
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llvm-svn: 116069
2010-10-08 18:13:57 +00:00
ba66a81017
Fix -Asserts warning.
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llvm-svn: 116030
2010-10-08 02:07:22 +00:00
ddb2d65c50
Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem
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to IntrReadWriteArgMem, as it's for reading as well as writing.
llvm-svn: 110395
2010-08-05 23:36:21 +00:00
1c69646e99
Add the SubRegIndex TableGen class.
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This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.
llvm-svn: 104492
2010-05-24 14:48:12 +00:00
5debc33168
stop computing InstImpInputs, it is dead
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llvm-svn: 101881
2010-04-20 06:30:25 +00:00
9dc68d31fd
DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it.
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llvm-svn: 101880
2010-04-20 06:28:43 +00:00
05925fe1fe
print the complexity of the pattern being matched in the
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comment in the generated table.
llvm-svn: 99794
2010-03-29 01:40:38 +00:00
135091bd9d
improve type checking of SDNode operand count. This rejects all cases
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where an incorrect number of operands is provided to an sdnode instead
of just a few cases.
llvm-svn: 99761
2010-03-28 08:48:47 +00:00
6642118e83
finally remove the immAllOnesV_bc/immAllZerosV_bc patterns
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and those derived from them. These are obnoxious because
they were written as: PatLeaf<(bitconvert). Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)
llvm-svn: 99759
2010-03-28 08:43:23 +00:00
a787c9e23a
teach tblgen to allow patterns like (add (i32 (bitconvert (i32 GPR))), 4),
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transforming it into (add (i32 GPR), 4). This allows us to write type
generic multi patterns and have tblgen automatically drop the bitconvert
in the case when the types align. This allows us to fold an extra load
in the changed testcase.
llvm-svn: 99756
2010-03-28 08:38:32 +00:00
2e9eae1fa2
validate that input sdnodes don't exist in an output pattern.
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llvm-svn: 99747
2010-03-28 06:57:56 +00:00
adf7ecf9d3
eliminate a bunch of code duplication in ParseTreePattern
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by rotating it.
llvm-svn: 99746
2010-03-28 06:50:34 +00:00
ffdac7b76a
SDTCisVT<0, isVoid> is not valid, reject it.
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llvm-svn: 99744
2010-03-28 06:04:39 +00:00
4a5f7be077
fix CodeGenTarget::getRegisterVTs to not return the
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same vt multiple times for a register. For example,
ECX is in 5 different i32 reg classes, just return
1 i32 instead of 5.
llvm-svn: 99727
2010-03-27 20:32:26 +00:00
7bc5d9b576
hoist some funky logic into CodeGenInstruction
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from two places in CodeGenDAGPatterns.cpp, and
use it in DAGISelMatcherGen.cpp instead of using
an incorrect predicate that happened to get lucky
on our current targets.
llvm-svn: 99726
2010-03-27 20:09:24 +00:00
d44966f26d
continue pushing tblgen's support for nodes with multiple
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results forward. We can now handle an instruction that
produces one implicit def and one result instead of one or
the other when not at the root of the pattern.
llvm-svn: 99725
2010-03-27 19:15:02 +00:00
5c2182ef77
remove parallel support.
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llvm-svn: 99703
2010-03-27 02:53:27 +00:00
6c2d178957
add plumbing for handling multiple result nodes
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in some more places.
llvm-svn: 99366
2010-03-24 00:41:19 +00:00
38c99662ff
implement SDTCisVTSmallerThanOp with EnforceSmallerThan
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instead of reimplementing it wrong and poorly.
llvm-svn: 99357
2010-03-24 00:06:46 +00:00
57ebf63da7
bring sanity to EnforceVectorEltType
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llvm-svn: 99354
2010-03-24 00:01:16 +00:00
6070ee2a58
Cleanup getImplicitType
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llvm-svn: 99353
2010-03-23 23:50:31 +00:00
2109cb461c
Change intrinsic result type for void to store it as an empty list
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instead of as a single element list with VoidTy. Now with a fix
for the verifier.
llvm-svn: 99206
2010-03-22 20:56:36 +00:00
d177edf361
Fix suggested parentheses warning.
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llvm-svn: 99111
2010-03-21 01:38:21 +00:00
3e2bb702db
Revert r99009 temporarily it seems to be breaking the bots.
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llvm-svn: 99011
2010-03-19 23:04:23 +00:00
933b2cf9a8
Change intrinsic result type for void to store it as an empty list
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instead of as a single element list with VoidTy.
llvm-svn: 99009
2010-03-19 22:40:56 +00:00
2db7abaa44
make getOperandNum a static function (since it's just used by
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ApplyTypeConstraint) and make it handle multiple result nodes.
llvm-svn: 99003
2010-03-19 21:56:21 +00:00
f144725ebc
major surgery on tblgen: generalize TreePatternNode
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to maintain a list of types (one for each result of
the node) instead of a single type. There are liberal
hacks added to emulate the old behavior in various
situations, but they can start disolving now.
llvm-svn: 98999
2010-03-19 21:37:09 +00:00
6d765ebc0d
make FillWithPossibleTypes take a predicate to filter types so that
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we don't blow the smallvector as often. No functionality change.
llvm-svn: 98968
2010-03-19 17:41:26 +00:00
bb34b4e10f
resolve fixme: we now infer the instruction-level 'isvariadic' bit
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from the pattern if present, and we use it instead of the bit.
llvm-svn: 98938
2010-03-19 05:34:15 +00:00
83aeaab462
add a new SDNPVariadic SDNP node flag, and use it in
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dag isel gen instead of instruction properties. This
allows the oh-so-useful behavior of matching a variadic
non-root node.
llvm-svn: 98934
2010-03-19 05:07:09 +00:00
be6b17f927
rewrite EnforceSmallerThan to be less bone headed.
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llvm-svn: 98933
2010-03-19 04:54:36 +00:00
ec71ba25e5
Fix -Asserts warning.
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llvm-svn: 98927
2010-03-19 03:18:20 +00:00
da5b4ad03e
eliminate the last use of EEVT::isUnknown
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llvm-svn: 98918
2010-03-19 01:14:27 +00:00
918be520dc
change Target.getInstructionsByEnumValue to return a reference
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to a vector that CGT stores instead of synthesizing it on every
call.
llvm-svn: 98910
2010-03-19 00:34:35 +00:00
70eb897d7c
don't go through getInstructions().
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llvm-svn: 98906
2010-03-19 00:18:23 +00:00
9aec14b560
look up instructions by record, not by name.
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llvm-svn: 98904
2010-03-19 00:07:20 +00:00
63a627cd88
expand tblgen's support for instructions with implicit defs.
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llvm-svn: 98900
2010-03-18 23:57:40 +00:00
Jim Grosbach