Commit Graph

11 Commits

Author SHA1 Message Date
Ahmed Bougacha 40a34c2e2a [CodeGen] Widen non-power-of-2 vector HFA base types.
Currently, for the ppc64--gnu and aarch64 ABIs, we recognize:
  typedef __attribute__((__ext_vector_type__(3))) float v3f32;
  typedef __attribute__((__ext_vector_type__(16))) char v16i8;
  struct HFA {
    v3f32 a;
    v16i8 b;
  };

as an HFA. Since the first type encountered is used as the base type,
we pass the HFA as:
    [2 x <3 x float>]
Which leads to incorrect IR (relying on padding values) when the
second field is used.

Instead, explicitly widen the vector (after size rounding) in
isHomogeneousAggregate.

Differential Revision: http://reviews.llvm.org/D18998

llvm-svn: 266784
2016-04-19 17:54:29 +00:00
John McCall 7f416cc426 Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment.  Introduce APIs on CGBuilderTy to work with Address
values.  Change core APIs on CGF/CGM to traffic in Address where
appropriate.  Require alignments to be non-zero.  Update a ton
of code to compute and propagate alignment information.

As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.

The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned.  Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay.  I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.

Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.

We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment.  In particular,
field access now uses alignmentAtOffset instead of min.

Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs.  For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint.  That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.

ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments.  In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments.  That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.

I partially punted on applying this work to CGBuiltin.  Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.

llvm-svn: 246985
2015-09-08 08:05:57 +00:00
Ulrich Weigand 6e2cea6f0c Respect alignment when loading up a coerced function argument
Code in CGCall.cpp that loads up function arguments that need to be
coerced to a different type may in some cases ignore the fact that
the source of the argument is not naturally aligned. This may cause
incorrect code to be generated. In some places in CreateCoercedLoad,
we already have setAlignment calls to address this, but I ran into one
where it was missing, causing wrong code generation on SystemZ.

However, in that location, we do not actually know what alignment of
the source location we can rely on; the callers do not pass anything
to this routine. This is already an issue in other places in
CreateCoercedLoad; and the same problem exists for CreateCoercedStore.

To avoid pessimising code, and to fix the FIXMEs already in place,
this patch also adds an alignment argument to the CreateCoerced*
routines and uses it instead of forcing an alignment of 1. The
callers are changed to pass in the best information they have.

This actually requires changes in a number of existing test cases
since we now get better alignment in many places.

Differential Revision: http://reviews.llvm.org/D11033

llvm-svn: 241898
2015-07-10 11:31:43 +00:00
Pete Cooper 635b509dee Change AArch64 i128 returns to use [2 x i64] when possible.
Something like { void*, void * } would be passed to a function as a [2 x i64], but returned as an i128.  This patch unifies the 2 behaviours so that we also return it as a [2 x i64].

This is better for the quality of the IR, and the size of the final LLVM binary as we tend to want to insert/extract values from these types and do so with the insert/extract instructions is less IR than shifting, truncating, and or'ing values.

Reviewed by Tim Northover.

llvm-svn: 235231
2015-04-17 22:16:24 +00:00
David Blaikie d6c88ece21 [opaque pointer types] Explicit non-pointer type for call expressions
(migration for recent LLVM change to textual IR for calls)

llvm-svn: 235147
2015-04-16 23:25:00 +00:00
David Blaikie a953f2825b Update Clang tests to handle explicitly typed load changes in LLVM.
llvm-svn: 230795
2015-02-27 21:19:58 +00:00
David Blaikie 218b783192 Update Clang tests to handle explicitly typed gep changes in LLVM.
llvm-svn: 230783
2015-02-27 19:18:17 +00:00
Tim Northover b047bfae32 AArch64: simplify PCS mapping.
Now that LLVM can count the registers needed to implement AAPCS rules, we don't
need to duplicate that logic here. This means we can drop the explicit padding
and also use more natural types in many cases (e.g. "struct { float arr[3]; }"
used to end up as "[2 x double]" to avoid holes on the stack.

The one wrinkle is that AAPCS va_arg was also using the register counting
machinery. But the local replacement isn't too bad.

llvm-svn: 222904
2014-11-27 21:02:49 +00:00
Bob Wilson 373af73ad4 ARM64: Do not expand variadic HFA/HVA arguments with the Darwin ABI.
Unlike the standard AAPCS64 ABI, variadic arguments are always passed on the
stack with the Darwin ABI, and this was not being considered when deciding
whether to expand HFA/HVA arguments in a call. An HFA argument with a "float"
base type was being expanded into separate "float" arguments, each of which
was then extended to a double, resulting in a serious mismatch from what is
expected by the va_arg implementation. <rdar://problem/15777067>

llvm-svn: 206729
2014-04-21 01:23:39 +00:00
James Molloy 75f5f9e629 [ARM64] Allow the disabling of NEON and crypto instructions. Update tests to pass -target-feature +neon.
llvm-svn: 206394
2014-04-16 15:33:48 +00:00
Tim Northover a2ee433c8d ARM64: initial clang support commit.
This adds Clang support for the ARM64 backend. There are definitely
still some rough edges, so please bring up any issues you see with
this patch.

As with the LLVM commit though, we think it'll be more useful for
merging with AArch64 from within the tree.

llvm-svn: 205100
2014-03-29 15:09:45 +00:00