1b6f698e85
Fix PR6520. An earlyclobber physreg must not be allocated to anything else.
...
llvm-svn: 103133
2010-05-05 23:07:41 +00:00
92b21cad5d
Use getValue() for PHINodes when direct NodeMap access does not work.
...
llvm-svn: 103126
2010-05-05 22:29:00 +00:00
4b6abd8c2b
Move REG_SEQUENCE removal to 2addr pass.
...
llvm-svn: 103109
2010-05-05 18:45:40 +00:00
38d9a6f805
Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
...
80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0
llvm-svn: 103102
2010-05-05 18:27:40 +00:00
d1b38e317d
Combine the implementations of the core part of the SSAUpdater and
...
MachineSSAUpdater to avoid duplicating all the code.
llvm-svn: 103060
2010-05-04 23:18:19 +00:00
4c908f4181
Teach PHI elimination to remove REG_SEQUENCE instructions and update references of the source operands with references of the destination with subreg indices. e.g.
...
%reg1029<def>, %reg1030<def> = VLD1q16 %reg1024<kill>, ...
%reg1031<def> = REG_SEQUENCE %reg1029<kill>, 5, %reg1030<kill>, 6
=>
%reg1031:5<def>, %reg1031:6<def> = VLD1q16 %reg1024<kill>, ...
PHI elimination now does more than phi elimination. It is really a de-SSA pass.
llvm-svn: 103039
2010-05-04 20:26:52 +00:00
a5c0cc329e
Rename variables for consistency.
...
llvm-svn: 103013
2010-05-04 17:12:26 +00:00
075e9b5d66
Set DW_AT_APPLE_omit_frame_ptr in endFunction() where MachineFunction is available all the time.
...
llvm-svn: 103001
2010-05-04 06:15:30 +00:00
55869af998
Instruction selection optimizations may have moved the def of a function argument out of the entry block. rdar://7937489
...
llvm-svn: 102993
2010-05-04 00:58:39 +00:00
f869d9adf2
Teach scheduler about REG_SEQUENCE.
...
llvm-svn: 102984
2010-05-04 00:22:40 +00:00
0e79c864c3
Re-enable isel kill flags, now that the local allocator is ignoring them.
...
llvm-svn: 102981
2010-05-04 00:12:15 +00:00
b944b39887
Remove preexisting kill flags in RegAllocLocal, just like LiveVariables does.
...
This should make it possible to start producing kill flags in isel without
breaking stuff.
llvm-svn: 102976
2010-05-03 23:49:20 +00:00
626b5d8e0c
Factor out FastISel's code for materializing constants and other values
...
in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.
llvm-svn: 102975
2010-05-03 23:36:34 +00:00
f4e4e84115
Check that subregisters don't have independent values in RemoveCopyByCommutingDef().
...
This fixes PR6941.
llvm-svn: 102970
2010-05-03 22:40:32 +00:00
1e679cbfff
Reword a comment slightly.
...
llvm-svn: 102966
2010-05-03 22:18:49 +00:00
c936b56871
Print basic block numbers in live interval debug output. Since the rest of the
...
debug output is showing machine instructions, the IR-level basic block names
aren't very meaningful, and because multiple machine basic blocks may be
derived from one IR-level BB, they're also not unique.
llvm-svn: 102960
2010-05-03 21:38:11 +00:00
2ad68de4aa
Fix a bug which prevented tail merging of return instructions in
...
beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
test/CodeGen/ARM/ifcvt2.ll for details.
The fix is to change HashEndOfMBB to hash at most one instruction,
instead of trying to apply heuristics about when it will be profitable to
consider more than one instruction. The regular tail-merging heuristics
are already prepared to handle the same cases, and they're more precise.
Also, make test/CodeGen/ARM/ifcvt5.ll and
test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
continue to test what they're intended to test.
And, this eliminates the problem in
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
PR5204. Update it accordingly.
llvm-svn: 102907
2010-05-03 14:35:47 +00:00
1ebb395cee
Don't count debug info as instructions. This was
...
preventing the emission of the NOP on Darwin for a
function with no actual code. From timberwolfmc
with TEST=optllcdbg.
llvm-svn: 102843
2010-05-01 16:41:11 +00:00
737718d4f4
Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
...
when needed. This fixes PR7001
llvm-svn: 102838
2010-05-01 12:52:34 +00:00
ec74444d3e
Remove the code for special-casing byval for fast-isel. SelectionDAG
...
handles argument lowering anyway, so there's no need for special
casing here.
llvm-svn: 102828
2010-05-01 02:44:23 +00:00
4959cf19b2
Re-disable kill flags, as there is more trouble.
...
llvm-svn: 102826
2010-05-01 01:57:56 +00:00
77ef6f6a17
Re-enable kill flags from SelectionDAGISel, with a fix: don't
...
try to put a kill flag on a DBG_INFO instruction.
llvm-svn: 102820
2010-05-01 00:50:53 +00:00
3dca8f3da3
Fix a bug where debug info affected stack slot coloring.
...
Seen in SingleSrc/Benchmarks/Misc/flops with TEST=optllcdbg.
7929951.
llvm-svn: 102819
2010-05-01 00:41:15 +00:00
096619eb52
Fix whitespace.
...
llvm-svn: 102817
2010-05-01 00:33:28 +00:00
63f31115cd
Don't pass SDValues by non-const reference unless they may be
...
modified.
llvm-svn: 102816
2010-05-01 00:33:16 +00:00
5d059718c9
Reorgnaize more switch code lowering to clean up some tricky
...
code, and to eliminate the need for the SelectionDAGBuilder
state to be live during CodeGenAndEmitDAG calls.
Call SDB->clear() before CodeGenAndEmitDAG calls instead of
before it, and move the CurDAG->clear() out of SelectionDAGBuilder,
which doesn't own the DAG, and into CodeGenAndEmitDAG.
llvm-svn: 102814
2010-05-01 00:25:44 +00:00
f0514717cd
Delete the EdgeMapping variable itself.
...
llvm-svn: 102810
2010-05-01 00:02:20 +00:00
25c1653700
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
...
changes before doing phi lowering for switches.
llvm-svn: 102809
2010-05-01 00:01:06 +00:00
de4b225093
EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but the
...
indexes could be of a different value type. Or not even using the same SDNode
for the constant (weird, I know). Compare the actual values instead of the
pointers.
llvm-svn: 102791
2010-04-30 22:19:17 +00:00
09452cecd8
Remove this debug output. The MachineFunction will be printed once all of
...
instruction selection is done; it's confusing to see parts of it printed,
while other parts are omitted, along the way.
llvm-svn: 102771
2010-04-30 21:21:21 +00:00
9afed0f98b
The local register allocator has to spill dirty callee saved registers before a
...
call that might throw. The landing pad assumes that all registers are in stack
slots.
We used to spill those dirty CSRs after the call, and the stack slots would be
wrong when arriving at the landing pad.
llvm-svn: 102770
2010-04-30 21:19:29 +00:00
b4e3b9025c
Attach AT_APPLE_optimized attribute to optimized function's debug info.
...
llvm-svn: 102743
2010-04-30 19:38:23 +00:00
8acc8f7dfd
EmitDbgValue doesn't need its EdgeMapping argument.
...
llvm-svn: 102742
2010-04-30 19:35:33 +00:00
408459ffa6
Don't use floating point in SimpleRegisterCoalescing.
...
Rounding differences causes tests to fail on Linux.
llvm-svn: 102729
2010-04-30 18:28:11 +00:00
e82c25e878
Apply a patch from Jan Sjodin to fix a compiler abort on vector
...
comparisons sign-extended to a different bitwidth than the
comparison operands.
llvm-svn: 102721
2010-04-30 17:19:19 +00:00
587e0800e5
Temporarily disable SelectionDAG kill flags, which are causing trouble.
...
llvm-svn: 102680
2010-04-30 00:32:51 +00:00
ac55510c4e
Set register kill flags on the SelectionDAG path, at least in the
...
easy cases.
llvm-svn: 102678
2010-04-30 00:08:21 +00:00
8d4214578d
Reject really weird coalescer case when trying to merge identical subregisters
...
of different register classes. e.g.
%reg1048:3<def> = EXTRACT_SUBREG %RAX<kill>, 3
Where %reg1048 is a GR32 register. This is not impossible to handle, but it is
pretty hard and very rare.
This should unbreak the dragonegg builder.
llvm-svn: 102672
2010-04-29 23:47:46 +00:00
35cd68c888
Fix typos in assertion strings.
...
llvm-svn: 102666
2010-04-29 23:25:34 +00:00
e2550f4f93
Slightly verboser debug spew from coalescer
...
llvm-svn: 102663
2010-04-29 22:21:48 +00:00
0395553e35
Refactor.
...
llvm-svn: 102661
2010-04-29 20:40:36 +00:00
6feac8a39b
Make naked functions work on PPC.
...
llvm-svn: 102657
2010-04-29 19:32:19 +00:00
080e4fb2f0
Print variable scope name in DEBUG_VALUE comment. Useful in some cases. e.g.
...
##DEBUG_VALUE: runOnMachineFunction:this <- RDI+0
##DEBUG_VALUE: runOnMachineFunction:fn <- RSI+0
##DEBUG_VALUE: DeadDefs <- undef ## SimpleRegisterCoalescing.cpp:2706
##DEBUG_VALUE: getRegInfo:this <- [%rsp+$56]+$0
##DEBUG_VALUE: getTarget:this <- [%rsp+$56]+$0
llvm-svn: 102655
2010-04-29 18:52:10 +00:00
6e7ca24907
Remove DBG_VALUE which reference dead stack slots.
...
llvm-svn: 102654
2010-04-29 18:51:00 +00:00
a46953d281
DO not push DBG_VALUE machine instructions for inlined fuction arguments in entry block.
...
llvm-svn: 102653
2010-04-29 18:50:36 +00:00
5c864b42b2
Add comment.
...
llvm-svn: 102606
2010-04-29 06:58:53 +00:00
923679f929
Re-enable 102565 with fixes.
...
llvm-svn: 102602
2010-04-29 06:33:38 +00:00
d65a1e782b
Temporarily disable my changes to unbreak the build.
...
llvm-svn: 102590
2010-04-29 03:34:19 +00:00
5fb45a2b85
Do not generate duplicate dbg_value instructions for function arguments.
...
llvm-svn: 102585
2010-04-29 01:40:30 +00:00
d9e7322c9a
Fix missing #include.
...
llvm-svn: 102584
2010-04-29 01:39:13 +00:00
70a0145d7c
Avoid emitting a dbg_value machineinstr that's not going to be inserted into entry block.
...
llvm-svn: 102581
2010-04-29 01:23:55 +00:00
f4336ebb2a
Check Reg against zero.
...
llvm-svn: 102573
2010-04-29 00:59:34 +00:00
a5a8f76cea
- Really preserve dbg_value instructions when the register is spilled.
...
- Also, update dbg_value is the value is being re-matted from a frame slot, e.g. fixed slots for arguments.
llvm-svn: 102565
2010-04-28 23:52:26 +00:00
bb728e17d3
tidy up.
...
llvm-svn: 102558
2010-04-28 23:24:13 +00:00
6e822459ed
Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.
...
llvm-svn: 102554
2010-04-28 23:08:54 +00:00
d4d1a51895
Pretty print DBG_VALUE machine instructions.
...
Before:
DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707
Now:
DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707
llvm-svn: 102518
2010-04-28 20:03:13 +00:00
08e9e72fa9
Rework global alignment computation again. Now we do round up
...
alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).
llvm-svn: 102515
2010-04-28 19:58:07 +00:00
888c17073a
While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca matching llvm.dbg.declare intrinsic is missing.
...
llvm-svn: 102513
2010-04-28 19:27:33 +00:00
06e7242d32
Recompute kill flags from live intervals after coalescing instead of trying to
...
update them. Computing kill flags is notoriously difficult, and the coalescer
would get it wrong sometimes, and it would completely skip physical registers.
Now we simply remove kill flags based on the live intervals after coalescing.
This is a few percent slower, but now we get correct kill flags for physical
registers after coalescing.
llvm-svn: 102510
2010-04-28 18:28:39 +00:00
f100557c9a
Try operation promotion only if regular dag combine and target-specific ones failed to do anything.
...
llvm-svn: 102492
2010-04-28 07:10:39 +00:00
50c9431203
Emit debug info for byval parameters.
...
llvm-svn: 102486
2010-04-28 01:39:28 +00:00
a3facc5cb5
further simplify EmitAlignment by eliminating the
...
ForcedAlignBits argument, tweaking the single client of it.
llvm-svn: 102484
2010-04-28 01:08:40 +00:00
72bdee4c10
remove a dead argument to EmitAlignment.
...
llvm-svn: 102483
2010-04-28 01:06:02 +00:00
9e06e53fc6
remove some default arguments to EmitAlignment.
...
llvm-svn: 102482
2010-04-28 01:05:45 +00:00
173b2b9d05
Refactor.
...
llvm-svn: 102481
2010-04-28 01:03:09 +00:00
cfc76fdaf1
Use isReg(), isImm() and isFPImm().
...
llvm-svn: 102470
2010-04-27 22:04:41 +00:00
1f34c2727d
Check operand type first.
...
llvm-svn: 102468
2010-04-27 21:49:04 +00:00
1a0bbe25e3
Ignore DBG_VALUE instructions that points to undef values.
...
llvm-svn: 102463
2010-04-27 20:54:45 +00:00
e813690b7a
- When legal, promote a load to zextload rather than ext load.
...
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x)
llvm-svn: 102455
2010-04-27 19:48:13 +00:00
6c74a872a8
Identify when a lexical scope is split in to multiple instruction ranges. Emit such ranges using DW_AT_ranges.
...
This patch fixes bug (PR6894) introduced by previous version of this patch.
llvm-svn: 102454
2010-04-27 19:46:33 +00:00
eb828b6391
Do not count kill, implicit_def instructions as printed instructions.
...
llvm-svn: 102453
2010-04-27 19:38:45 +00:00
64d43d80be
round zero-byte .zerofill directives up to 1 byte. This
...
should fix some "g++.dg-struct-layout-1" failures,
rdar://7886017
llvm-svn: 102421
2010-04-27 07:41:44 +00:00
eb61a7d616
Revert a small part of 102372; this fixes at least one
...
of the dbg testsuite regressions. I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.
llvm-svn: 102410
2010-04-27 02:10:05 +00:00
3af635a296
add a comment in verbose-asm mode indicating why a noop is being generated.
...
llvm-svn: 102401
2010-04-26 23:41:43 +00:00
6a5e706e3c
on darwin empty functions need to codegen into something of non-zero length,
...
otherwise labels get incorrectly merged. We handled this by emitting a
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes. Handle this by emitting a noop. This
is more gross than it should be because arm/ppc are not fully mc'ized yet.
This fixes rdar://7908505
llvm-svn: 102400
2010-04-26 23:37:21 +00:00
a1e343095f
Avoid adding a null MD node operand, which crashes with "-debug" when trying
...
to print the operand.
llvm-svn: 102395
2010-04-26 22:56:56 +00:00
bd798ce8dd
Use DW_AT_entry_pc instead of DW_AT_low_pc/DW_AT_high_pc pair. This simplifies debug range entries.
...
llvm-svn: 102394
2010-04-26 22:54:28 +00:00
59a438560c
Remove crufty comments.
...
llvm-svn: 102380
2010-04-26 20:48:54 +00:00
e098352ed1
Add DBG_VALUE handling for byval parameters; this
...
produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
llvm-svn: 102372
2010-04-26 20:06:49 +00:00
0e6fc61f21
Insert dbg_value instructions for function entry block liveins (i.e. function arguments).
...
llvm-svn: 102368
2010-04-26 19:16:00 +00:00
f740a8ceeb
fix PR6921 a different way. Intead of increasing the
...
alignment of globals with a specified alignment, we fix
common variables to obey their alignment. Add a comment
explaining why this behavior is important.
llvm-svn: 102365
2010-04-26 18:46:46 +00:00
c72d8a7dad
Re-enable 102323 with fix: do not update dbg_value's with incorrect frame indices when the live interval are being re-materialized.
...
llvm-svn: 102361
2010-04-26 18:37:21 +00:00
e80442aa6d
Revert r102300/102301, which serious broke objc apps.
...
llvm-svn: 102359
2010-04-26 18:30:45 +00:00
d561daf520
Update MachineSSAUpdater with the same changes I made for the IR-level
...
SSAUpdater. I'm going to try to refactor this to share most of the code
between them.
llvm-svn: 102353
2010-04-26 17:40:49 +00:00
5ad3cc1d5e
Temporary disable spiller modifying dbg_value. It's breaking build.
...
llvm-svn: 102327
2010-04-26 08:24:07 +00:00
ed69b382ea
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
...
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
llvm-svn: 102323
2010-04-26 07:38:55 +00:00
582565e991
Stop abusing EmitInstrWithCustomInserter for target-dependent
...
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets. Add a new hook instead.
No functional change.
llvm-svn: 102320
2010-04-25 21:33:54 +00:00
1fc01985a3
Add comment re byval args. Doesn't actually work this way yet.
...
xs
llvm-svn: 102316
2010-04-25 21:03:54 +00:00
386a220f70
Fix PR6921: globals were not getting correctly rounded up to their
...
preferred alignment unless they were common or some other special
case.
llvm-svn: 102300
2010-04-25 05:30:43 +00:00
0abb54d631
When a load operand is promoted to an extload, replace other uses with uses of extload result truncated.
...
llvm-svn: 102236
2010-04-24 04:43:44 +00:00
5544b0c588
Apply a fix for a vector setcc dagcombine from Jan Sjodin. No
...
testcase yet, as the testcase now fails downstream.
llvm-svn: 102228
2010-04-24 01:17:30 +00:00
b9ff130d47
Code refactoring.
...
llvm-svn: 102202
2010-04-23 19:10:30 +00:00
6e9a8fcc28
Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISel
...
itself too.
llvm-svn: 102176
2010-04-23 15:29:50 +00:00
e9135cb3fb
Revert 102135, 102129, 102127, 102106, 102104, 102102, 102012, 102004,
...
because 102004 causes codegen to emit invalid assembly on at least
x86_64-unknown-gnu-linux.
llvm-svn: 102155
2010-04-23 01:18:53 +00:00
6adc5620ab
Add comment.
...
llvm-svn: 102129
2010-04-22 20:56:35 +00:00
5b43aa0ddd
Sink SelectionDAGBuilder's HandlePHINodesInSuccessorBlocks down
...
into SelectionDAGBuilder itself.
llvm-svn: 102128
2010-04-22 20:55:53 +00:00
ea2744f4dc
Adjust debug range offsets for isWeakForLinker() functions.
...
llvm-svn: 102127
2010-04-22 20:52:00 +00:00
c594eab10f
Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
...
and into SelectionDAGBuilder and FastISel.
llvm-svn: 102123
2010-04-22 20:46:50 +00:00
f1223bdec0
- It's not safe to promote rotates (at least not trivially).
...
- Some code refactoring.
llvm-svn: 102111
2010-04-22 20:19:46 +00:00
e149e9896c
Fix a comment.
...
llvm-svn: 102110
2010-04-22 20:06:42 +00:00
Jakob Stoklund Olesen