25c1653700
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
...
changes before doing phi lowering for switches.
llvm-svn: 102809
2010-05-01 00:01:06 +00:00
2e2cc87081
Make this code less confusing. Instead of reassigning BB, just operate
...
on the original variables, so it's easier to see what is being done
to which blocks.
llvm-svn: 102759
2010-04-30 20:14:26 +00:00
57bb73c80b
Remove the -disable-16bit command-line option, which is now obsolete.
...
llvm-svn: 102730
2010-04-30 18:30:26 +00:00
5117a555e0
Another sibcall bug. If caller and callee calling conventions differ, then it's only safe to do a tail call if the results are returned in the same way.
...
llvm-svn: 102683
2010-04-30 01:12:32 +00:00
050df1b8de
Enable i16 to i32 promotion by default.
...
llvm-svn: 102493
2010-04-28 08:30:49 +00:00
d21f564543
Unbreak the build. Only form shld / shrd after legalization.
...
llvm-svn: 102488
2010-04-28 02:25:18 +00:00
347e3b8f15
Rather than having a ton of patterns for double shift instructions, e.g. SHLD16rrCL, just perform custom dag combine to form x86 specific dag so they match to the same pattern. This also makes sure later dag combine do not cause isel to miss them (e.g. promoting i16 to i32).
...
llvm-svn: 102485
2010-04-28 01:18:01 +00:00
c0458f1a40
Tweak x86 INC/DEC generation to look for CopyToReg or SETCC. Radar 7866163.
...
llvm-svn: 102477
2010-04-28 00:35:10 +00:00
3b928af28f
SRA promotion is also not free.
...
llvm-svn: 102456
2010-04-27 19:48:31 +00:00
6e45f1d1ff
Promoting 16-bit cmp / test aren't free. Don't do it.
...
llvm-svn: 102366
2010-04-26 19:06:11 +00:00
ed69b382ea
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
...
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
llvm-svn: 102323
2010-04-26 07:38:55 +00:00
582565e991
Stop abusing EmitInstrWithCustomInserter for target-dependent
...
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets. Add a new hook instead.
No functional change.
llvm-svn: 102320
2010-04-25 21:33:54 +00:00
a02d0e7d6b
Avoid promoting a i16 node if it would eliminate a (store (op (load))) opportunity.
...
llvm-svn: 102237
2010-04-24 04:44:57 +00:00
0367559786
Fix X86ISD::CMP i16 to i32 promotion.
...
llvm-svn: 102192
2010-04-23 18:21:16 +00:00
c594eab10f
Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
...
and into SelectionDAGBuilder and FastISel.
llvm-svn: 102123
2010-04-22 20:46:50 +00:00
f1223bdec0
- It's not safe to promote rotates (at least not trivially).
...
- Some code refactoring.
llvm-svn: 102111
2010-04-22 20:19:46 +00:00
9c8cd8c061
isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.
...
llvm-svn: 101979
2010-04-21 01:47:12 +00:00
0522b90cdb
Because of the EMMS problem, right now we have to support
...
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own. This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)
llvm-svn: 101951
2010-04-20 22:34:09 +00:00
e19aa5cc52
More progress on promoting i16 operations to i32 for x86. Work in progress.
...
llvm-svn: 101808
2010-04-19 19:29:22 +00:00
21cea8ac2e
Use const qualifiers with TargetLowering. This eliminates several
...
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
2010-04-17 15:26:15 +00:00
31ae586c74
Move per-function state out of TargetLowering subclasses and into
...
MachineFunctionInfo subclasses.
llvm-svn: 101634
2010-04-17 14:41:14 +00:00
f1bd5fcdb4
More work to allow dag combiner to promote 16-bit ops to 32-bit.
...
llvm-svn: 101621
2010-04-17 06:13:15 +00:00
7258dcd77f
Revert 101465, it broke internal OpenGL testing.
...
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
llvm-svn: 101579
2010-04-16 23:37:20 +00:00
148c69a3f6
Eliminate an unnecessary SelectionDAG dependency in getOptimalMemOpType.
...
llvm-svn: 101531
2010-04-16 20:11:05 +00:00
f375520f7b
reapply r101434
...
with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101465
2010-04-16 15:33:14 +00:00
af56facacd
Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding.
...
x86 support is off by default. It can be enabled with -promote-16bit.
Work in progress.
llvm-svn: 101448
2010-04-16 06:14:10 +00:00
403e9694f9
back out r101423 and r101397, they break llvm-gcc self-host on darwin10
...
llvm-svn: 101434
2010-04-16 01:16:20 +00:00
33ae80bff7
reapply r101364, which has been backed out in r101368
...
with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101397
2010-04-15 20:51:13 +00:00
9fd00c7d25
back out r101364, as it trips the linux nightlybot on some clang C++ tests
...
llvm-svn: 101368
2010-04-15 12:46:56 +00:00
aafd209632
rotate CallInst operands, i.e. move callee to the back
...
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101364
2010-04-15 10:49:53 +00:00
bcaf681cde
Add const qualifiers to CodeGen's use of LLVM IR constructs.
...
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
eabc9623da
Allow lowering for palignr instructions for mmx sized vectors. Add
...
patterns to handle the lowering.
llvm-svn: 101331
2010-04-15 01:40:20 +00:00
7deb447781
Factor out EH landing pad code into a separate function, and constify
...
a bunch of stuff to support it.
llvm-svn: 101273
2010-04-14 19:53:31 +00:00
ebe47c872f
Avoid using f64 to lower memcpy from constant string. It's cheaper to use i32 store of immediates.
...
llvm-svn: 100751
2010-04-08 07:37:57 +00:00
2104b8d36e
rename llvm::llvm_report_error -> llvm::report_fatal_error
...
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
6ac5cc973c
Clean up some signedness oddities in this code noticed by clang.
...
llvm-svn: 100599
2010-04-07 01:49:15 +00:00
305f2efb63
unthread MMI from FastISel
...
llvm-svn: 100416
2010-04-05 06:05:26 +00:00
7cfa70e9b3
fastisel doesn't need DwarfWriter, remove some tendricles.
...
llvm-svn: 100381
2010-04-05 02:19:28 +00:00
c576ee9040
Reapply address space patch after fixing an issue in MemCopyOptimizer.
...
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100304
2010-04-04 03:10:48 +00:00
6f306d7d30
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
...
llvm-svn: 100214
2010-04-02 20:16:16 +00:00
61399375a2
Correctly lower memset / memcpy of undef. It should be a nop. PR6767.
...
llvm-svn: 100208
2010-04-02 19:36:14 +00:00
999c1b927b
Revert r100191 since it breaks objc in clang
...
llvm-svn: 100199
2010-04-02 18:43:02 +00:00
a972ab8564
Reapply address space patch after fixing an issue in MemCopyOptimizer.
...
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100191
2010-04-02 18:04:15 +00:00
06a1639b98
Remove FIXME - if there's a better way to do this it isn't here.
...
llvm-svn: 100176
2010-04-02 04:32:37 +00:00
8d6d0d4c58
Disambiguate conditional expression for newer GCCs.
...
llvm-svn: 100167
2010-04-02 01:31:24 +00:00
f997c31598
In 64-bit mode, use i64 to lower memcpy / memset instead of f64.
...
llvm-svn: 100137
2010-04-01 20:27:45 +00:00
d9929f03cf
Add comments about DstAlign and SrcAlign.
...
llvm-svn: 100132
2010-04-01 20:10:42 +00:00
4c014c892a
- Avoid using floating point stores to implement memset unless the value is zero.
...
- Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type.
llvm-svn: 100118
2010-04-01 18:19:11 +00:00
43cd9e3845
Fix sdisel memcpy, memset, memmove lowering:
...
1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
ops more effectively.
rdar://7774704
llvm-svn: 100090
2010-04-01 06:04:33 +00:00
6f7fd28824
Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.
...
llvm-svn: 99948
2010-03-30 22:27:04 +00:00
Dan Gohman