Commit Graph

265526 Commits

Author SHA1 Message Date
Craig Topper d1fbb38475 [IR] Use isIntOrIntVectorTy instead of writing it out the long way. NFC
llvm-svn: 306250
2017-06-25 17:33:48 +00:00
Craig Topper e3bd1a8598 [IR] Move repeated asserts in FCmpInst constructor to a helper method like we do for ICmpInst and other classes. NFC
llvm-svn: 306249
2017-06-25 17:33:46 +00:00
Simon Pilgrim c338ba48fc [X86][SSE] Remove unused memopfsf32_128/memopfsf64_128 scalar memops
The 'scalar' simd bitops were dropped a while ago

llvm-svn: 306248
2017-06-25 17:04:58 +00:00
Simon Pilgrim bed1fa1ac1 Strip trailing whitespace. NFCI.
llvm-svn: 306247
2017-06-25 16:57:46 +00:00
Simon Pilgrim 9956364a1f [X86] Add test case for PR15705
llvm-svn: 306246
2017-06-25 16:12:45 +00:00
Siddharth Bhat a12f807f33 [PPCGCodeGeneration] Enable GPU code generation with invariant loads.
The condition that disallowed code generation in PPCGCodeGeneration with
invariant loads is not required. I haven't been able to construct a
counterexample where this generates invalid code.

Differential Revision: https://reviews.llvm.org/D34604

llvm-svn: 306245
2017-06-25 14:48:24 +00:00
Tobias Grosser 812bc3c983 Test commit
llvm-svn: 306244
2017-06-25 14:22:32 +00:00
Sanjay Patel 2f3ead7adc [InstCombine] add (sext i1 X), 1 --> zext (not X)
http://rise4fun.com/Alive/i8Q

A narrow bitwise logic op is obviously better than math for value tracking, 
and zext is better than sext. Typically, the 'not' will be folded into an 
icmp predicate.

The IR difference would even survive through codegen for x86, so we would see 
worse code:

https://godbolt.org/g/C14HMF

one_or_zero(int, int):                      # @one_or_zero(int, int)
        xorl    %eax, %eax
        cmpl    %esi, %edi
        setle   %al
        retq

one_or_zero_alt(int, int):                  # @one_or_zero_alt(int, int)
        xorl    %ecx, %ecx
        cmpl    %esi, %edi
        setg    %cl
        movl    $1, %eax
        subl    %ecx, %eax
        retq

llvm-svn: 306243
2017-06-25 14:15:28 +00:00
Elena Demikhovsky 72f991cded AVX-512: Fixed a crash during legalization of <3 x i8> type
The compiler fails with assertion during legalization of SETCC for <3 x i8> operands.
The result is extended to <4 x i8> and then truncated <4 x i1>. It does not happen on AVX2, because the final result of SETCC is <4 x i32>.

Differential Revision: https://reviews.llvm.org/D34503

llvm-svn: 306242
2017-06-25 13:36:20 +00:00
Xin Tong 70f7512add [AST] Fix a bug in aliasesUnknownInst. Make sure we are comparing the unknown instructions in the alias set and the instruction interested in.
Summary:
Make sure we are comparing the unknown instructions in the alias set and the instruction interested in.
I believe this is clearly a bug (missed opportunity). I can also add some test cases if desired.

Reviewers: hfinkel, davide, dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34597

llvm-svn: 306241
2017-06-25 12:55:11 +00:00
Igor Breger f5035d6ee5 [GlobalISel][X86] Support vector type G_EXTRACT selection.
Summary:
Support vector type G_EXTRACT selection. For now G_EXTRACT marked as legal for any type, so nothing to do in legalizer.
Split from https://reviews.llvm.org/D33665

Reviewers: qcolombet, t.p.northover, zvi, guyblank

Reviewed By: guyblank

Subscribers: guyblank, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33957

llvm-svn: 306240
2017-06-25 11:42:17 +00:00
Ed Schouten 4dabea22d3 Add support for Ananas platform
Ananas is a home-brew operating system, mainly for amd64 machines. After
using GCC for quite some time, it has switched to clang and never looked
back - yet, having to manually patch things is annoying, so it'd be much
nicer if this was in the official tree.

More information:

https://github.com/zhmu/ananas/
https://rink.nu/projects/ananas.html

Submitted by:	Rink Springer
Differential Revision:	https://reviews.llvm.org/D32936

llvm-svn: 306239
2017-06-25 08:29:09 +00:00
Dorit Nuzman e0e0f1ddb0 [AVX2] [TTI CostModel] Add cost of interleaved loads/stores for AVX2
The cost of an interleaved access was only implemented for AVX512. For other
X86 targets an overly conservative Base cost was returned, resulting in
avoiding vectorization where it is actually profitable to vectorize.
This patch starts to add costs for AVX2 for most prominent cases of
interleaved accesses (stride 3,4 chars, for now).

Note1: Improvements of up to ~4x were observed in some of EEMBC's rgb
workloads; There is also a known issue of 15-30% degradations on some of these
workloads, associated with an interleaved access followed by type
promotion/widening; the resulting shuffle sequence is currently inefficient and
will be improved by a series of patches that extend the X86InterleavedAccess pass
(such as D34601 and more to follow).

Note 2: The costs in this patch do not reflect port pressure penalties which can
be very dominant in the case of interleaved accesses since most of the shuffle
operations are restricted to a single port. Further tuning, that may incorporate
these considerations, will be done on top of the upcoming improved shuffle
sequences (that is, along with the abovementioned work to extend
X86InterleavedAccess pass).


Differential Revision: https://reviews.llvm.org/D34023

llvm-svn: 306238
2017-06-25 08:26:25 +00:00
Ed Schouten 3370e19725 Add support for Ananas platform
Ananas is a home-brew operating system, mainly for amd64 machines. After
using GCC for quite some time, it has switched to clang and never looked
back - yet, having to manually patch things is annoying, so it'd be much
nicer if this was in the official tree.

More information:

https://github.com/zhmu/ananas/
https://rink.nu/projects/ananas.html

Submitted by:	Rink Springer
Differential Revision:	https://reviews.llvm.org/D32937

llvm-svn: 306237
2017-06-25 08:19:37 +00:00
Craig Topper f2b890e806 [PatternMatch] Just check if value is a Constant before calling isAllOnesValue for not_match. We don't really need to check for a specific subclass of Constant. NFC
llvm-svn: 306236
2017-06-25 06:56:34 +00:00
Tobias Grosser 1b9d1bcc6d [ScopInfo] Bound the number of array disjuncts in run-time bounds checks
This reduces the compilation time of one reduced test case from Android from
16 seconds to 100 mseconds (we bail out), without negatively impacting any
other test case we currently have.

We still saw occasionally compilation timeouts on the AOSP buildbot. Hopefully,
those will go away with this change.

llvm-svn: 306235
2017-06-25 06:32:00 +00:00
Roman Gareev c4a4d04717 [FIX] A small addition to r305675.
llvm-svn: 306234
2017-06-25 06:30:11 +00:00
Zachary Turner 1affd805fc [pdb] Fix reading of llvm-generated PDBs by cvdump.
If you dump a pdb to yaml, and then round-trip it back to a pdb,
and run cvdump -l <file> on the new pdb, cvdump will generate
output such as this.

*** LINES

** Module: "d:\src\llvm\test\DebugInfo\PDB\Inputs\empty.obj"

Error: Line number corrupted: invalid file id 0
  <Unknown> (MD5), 0001:00000010-0000001A, line/addr pairs = 3

        5 00000010      6 00000013      7 00000018

Note the error message about the corrupted line number.

It turns out that the problem is that cvdump cannot find the
/names stream (e.g. the global string table), and the reason it
can't find the /names stream is because it doesn't understand
the NameMap that we serialize which tells pdb consumers which
stream has the string table.

Some experimentation shows that if we add items to the hash
table in a specific order before serializing it, cvdump can read
it. This suggests that either we're using the wrong hash function,
or we're serializing something incorrectly, but it will take some
deeper investigation to figure out how / why.  For now, this at
least allows cvdump to read our line information (and incidentally,
produces an identical byte sequence to what Microsoft tools
produce when writing the named stream map).

Differential Revision: https://reviews.llvm.org/D34491

llvm-svn: 306233
2017-06-25 03:51:42 +00:00
Xinliang David Li 95ce779185 [PGO] Implementate profile counter regiser promotion (test case)
Differential Revision: http://reviews.llvm.org/D34085

llvm-svn: 306232
2017-06-25 00:27:09 +00:00
Xinliang David Li b67530e9b9 [PGO] Implementate profile counter regiser promotion
Differential Revision: http://reviews.llvm.org/D34085

llvm-svn: 306231
2017-06-25 00:26:43 +00:00
Zachary Turner 91c8daf300 [Support] Don't use std::iterator, it's deprecated in C++17.
In converting this over to iterator_facade_base, some member
operators and methods are no longer needed since iterator_facade
implements them in the base class using CRTP.

Differential Revision: https://reviews.llvm.org/D34223

llvm-svn: 306230
2017-06-25 00:00:08 +00:00
Craig Topper 010203964d [SCEV] Avoid copying ConstantRange just to get the min/max value
Summary:
This patch changes getRange to getRangeRef and returns a reference to the ConstantRange object stored inside the DenseMap caches. We then take advantage of that to add new helper methods that can return min/max value of a signed or unsigned ConstantRange using that reference without first copying the ConstantRange.

getRangeRef calls itself recursively and I believe the reference return is fine for those calls.

I've left getSignedRange and getUnsignedRange returning a ConstantRange object so they will make a copy now. This is to ensure safety since the reference will be invalidated if the DenseMap changes.

I'm sure there are still more places that can take advantage of the reference and I'll submit future patches as I find them.

Reviewers: sanjoy, davide

Reviewed By: sanjoy

Subscribers: zzheng, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D32978

llvm-svn: 306229
2017-06-24 23:34:50 +00:00
Craig Topper 914ad85c6a [PatternMatch] Use ConstantFP::isNan instead of getting the APFloat and calling isNaN on that. NFC
llvm-svn: 306227
2017-06-24 22:59:11 +00:00
Craig Topper bf7f7c26b5 [IR] Implement commutable matchers without using combineOr
Summary:
Turns out creating matchers with combineOr isn't very efficient as we have to build matcher objects for both sides of the OR. Those objects aren't free, the trees usually contain several objects that contain a reference to a Value *, ConstantInt *, APInt * or some such thing. The compiler isn't always willing to inline all the matcher code to get rid of these member variables. Thus we end up loads and stores of these variables.

Using combineOR ends up creating two complete copies of the tree and the associated stores. I believe we're also paying for the opcode check twice.

This patch adds a commutable mode to several of the matcher objects as a bool template parameter that can be used to enable  commutable support directly in the match functions of the corresponding objects. This avoids the duplicate object creation and the opcode checks.

This shows about an ~7-8k reduction in the opt binary size on my local build.

Reviewers: spatel, majnemer, davide

Reviewed By: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34592

llvm-svn: 306226
2017-06-24 22:59:10 +00:00
Anton Korobeynikov 5875b7d3d7 Test commit
llvm-svn: 306225
2017-06-24 21:16:41 +00:00
Anton Korobeynikov dfa26f0ac1 Another test commit
llvm-svn: 306224
2017-06-24 21:04:32 +00:00
Tanya Lattner d3ae628100 Remove test commit change.
llvm-svn: 306223
2017-06-24 20:13:32 +00:00
Tanya Lattner 8c88112a79 test commit
llvm-svn: 306222
2017-06-24 20:08:28 +00:00
Anton Korobeynikov c0d3f00903 Still debugging
llvm-svn: 306216
2017-06-24 18:07:05 +00:00
Anton Korobeynikov 0b42fccb99 Still test commit
llvm-svn: 306215
2017-06-24 18:05:08 +00:00
Anton Korobeynikov 1a95495022 Another test commit
llvm-svn: 306214
2017-06-24 18:01:33 +00:00
Anton Korobeynikov 25b627c032 Another test commit
llvm-svn: 306213
2017-06-24 17:47:19 +00:00
Anton Korobeynikov 4bb4fd0c10 Test commit
llvm-svn: 306212
2017-06-24 17:35:28 +00:00
Hiroshi Inoue a85d24b73d fix trivial typos in comment, NFC
llvm-svn: 306211
2017-06-24 16:00:26 +00:00
Hiroshi Inoue b300824ee7 fix trivial typos in comment, NFC
dereferencable -> dereferenceable

llvm-svn: 306210
2017-06-24 15:43:33 +00:00
Hiroshi Inoue 95f24dca98 [SelectionDAG] set dereferenceable flag when expanding memcpy/memmove
When SelectionDAG expands memcpy (or memmove) call into a sequence of load and store instructions, it disregards dereferenceable flag even the source pointer is known to be dereferenceable.
This results in an assertion failure if SelectionDAG commonizes a load instruction generated for memcpy with another load instruction for the source pointer.
This patch makes SelectionDAG to set the dereferenceable flag for the load instructions properly to avoid the assertion failure.

Differential Revision: https://reviews.llvm.org/D34467

llvm-svn: 306209
2017-06-24 15:17:38 +00:00
Tobias Grosser 4bba4ba5ba Ensure backends available in 'opt' are also available in 'bugpoint'
This patch links LLVM back-ends into bugpoint the same way they are already
available in 'opt' and 'clang'. This resolves an inconsistency that allowed the
use of LLVM backends in loadable modules that run in 'opt', but that would
prevent the debugging of these modules with bugpoint due to unavailable /
unresolved symbols.

For e.g. In D31859, Polly requires the NVPTX back-end.

Reviewers: hfinkel, bogner, chandlerc, grosser, Meinersbur

Subscribers: bollu, mgorny, grosser, Meinersbur

Tags: #polly

Contributed by: Singapuram Sanjay

Differential Revision: https://reviews.llvm.org/D32003

llvm-svn: 306208
2017-06-24 08:09:33 +00:00
Craig Topper 05333b4d40 [IR] Remove BinOp2_match and replace its usage with the more capable BinOpPred_match.
llvm-svn: 306207
2017-06-24 07:02:52 +00:00
Craig Topper 8bec6a4e1c [IR][AssumptionCache] Add m_Shift and m_BitwiseLogic matchers to replace a couple m_CombineOr
Summary:
m_CombineOr isn't very efficient. The code using it is also quite verbose.

This patch adds m_Shift and m_BitwiseLogic matchers to make the using code more concise and improve the match efficiency.

Reviewers: spatel, davide

Reviewed By: davide

Subscribers: davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D34593

llvm-svn: 306206
2017-06-24 06:27:14 +00:00
Craig Topper 7b66ffe875 [ValueTracking][InstCombine] Use m_Shr instead m_CombineOr(m_LShr, m_AShr). NFC
llvm-svn: 306205
2017-06-24 06:24:04 +00:00
Craig Topper 72ee6945af [Analysis][Transforms] Use commutable matchers instead of m_CombineOr in a few places. NFC
llvm-svn: 306204
2017-06-24 06:24:01 +00:00
Tobias Grosser c948178af8 Update to latest clang-format changes
llvm-svn: 306203
2017-06-24 05:23:10 +00:00
Rafael Espindola 6418856127 Simplify the processFixupValue interface. NFC.
llvm-svn: 306202
2017-06-24 05:22:28 +00:00
Xin Tong 25d51d66df Add comments for OrderedInstruction. NFC
llvm-svn: 306201
2017-06-24 05:16:12 +00:00
Rafael Espindola daaee7151b Remove a processFixupValue hack.
The intention of processFixupValue is not to redefine the semantics of
MCExpr. It is odd enough that a expression lowers to a PCRel MCExpr or
not depending on what it looks like. At least it is a local hack now.

I left a fix for anyone trying to figure out what producers should be
producing a different expression.

llvm-svn: 306200
2017-06-24 05:12:29 +00:00
Rafael Espindola b05f4a7b25 Add missing %s to RUN line.
llvm-svn: 306199
2017-06-24 04:41:39 +00:00
Rafael Espindola 2c166857b3 Test the object file creation too.
This should *really* be a llvm-mc test, but the parser is broken.
See PR33579 for the parser bug.

llvm-svn: 306198
2017-06-24 04:31:45 +00:00
Craig Topper 9122b2195f [CODE_OWNERS] Add my other email address since my commits are now using my work email.
llvm-svn: 306197
2017-06-24 03:26:01 +00:00
Anton Korobeynikov 263dc249f9 Test commit: update my email
llvm-svn: 306196
2017-06-24 03:12:53 +00:00
Vitaly Buka b768d5b863 [asan] Regression test for PR33372
Reviewers: eugenis

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D34315

llvm-svn: 306195
2017-06-24 01:40:41 +00:00