e39017cb97
Add AsmParser support for the ELF .previous directive. Patch by Roman Divacky.
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llvm-svn: 112849
2010-09-02 18:53:37 +00:00
d8e5dfccc1
COFF: Update tests to reflect changes in last commit.
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llvm-svn: 112704
2010-09-01 14:15:31 +00:00
112b6ee3f2
fixme accomplished
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llvm-svn: 112386
2010-08-28 20:40:28 +00:00
3d148ac089
X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / clang -O3.
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llvm-svn: 112089
2010-08-25 21:11:02 +00:00
ccd28d0665
Fix COFF x86-64 relocations. PR7960.
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Multiple symbol reloc handling part of the patch by Cameron Esfahani.
llvm-svn: 111963
2010-08-24 21:04:52 +00:00
1c8d777c93
MC/X86: Tweak imul recognition, previous hack only applies for the imul form
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taking immediates.
llvm-svn: 111950
2010-08-24 19:37:56 +00:00
09392785b4
MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends.
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llvm-svn: 111947
2010-08-24 19:24:18 +00:00
2476432639
MC/AsmParser: Change ParseExpression to use ParseIdentifier(), to support
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dollars in identifiers.
llvm-svn: 111946
2010-08-24 19:13:42 +00:00
94b84a19b9
MC/X86: Warn on scale factors > 1 without index register, instead of erroring,
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for 'as' compatibility.
llvm-svn: 111945
2010-08-24 19:13:38 +00:00
3b96ffdac1
MC/Parser: Accept leading dollar signs in identifiers.
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- Implemented by manually splicing the tokens. If this turns out to be
problematically platform specific, a more elegant solution would be to
implement some context dependent lexing support.
llvm-svn: 111934
2010-08-24 18:12:12 +00:00
02db8f6415
fix rdar://7997827 - Accept and ignore LL and ULL suffixes on integer literals.
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Also fix 0b010 syntax to actually work while we're at it :-)
llvm-svn: 111876
2010-08-24 00:43:25 +00:00
f547740d3f
fix PR7465, mishandling of lcall and ljmp: intersegment long
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call and jumps.
llvm-svn: 111496
2010-08-19 01:18:43 +00:00
8e92d9b68d
MC/ELF: Allow null values in virtual sections, ELF doesn't use special
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directives for putting contents in .bss, for example.
llvm-svn: 111376
2010-08-18 18:22:37 +00:00
942b10f511
Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid
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printing "lsl #0". This fixes the remaining parts of pr7792. Make
corresponding changes for encoding/decoding these instructions.
llvm-svn: 111251
2010-08-17 17:23:19 +00:00
4577f37d49
Add a Thumb2 t2RSBrr instruction for disassembly only.
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This fixes another part of PR7792.
llvm-svn: 111057
2010-08-13 23:24:25 +00:00
15b3c3d0ac
Move the Thumb2 SSAT and USAT optional shift operator out of the
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instruction opcode. This fixes part of PR7792.
llvm-svn: 111047
2010-08-13 21:48:10 +00:00
8e8f1c133a
Cleaned up the for-disassembly-only entries in the arm instruction table so that
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the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.
llvm-svn: 110951
2010-08-12 20:46:17 +00:00
74491bb52c
The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .td
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entry for ARM STRBT is actually a super-instruction for A8.6.199 STRBT A1 & A2.
Recover by looking for ARM:USAT encoding pattern before delegating to the auto-
gened decoder.
Added a "usat" test case to arm-tests.txt.
llvm-svn: 110894
2010-08-12 01:40:54 +00:00
7d7b4d1b0f
MC/X86/AsmParser: Give an explicit error message when we reject an instruction
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because it could have an ambiguous suffix.
llvm-svn: 110890
2010-08-12 00:55:42 +00:00
d59c73f998
Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.
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Added two test cases to arm-tests.txt.
llvm-svn: 110880
2010-08-11 23:35:12 +00:00
add513112a
Move the ARM SSAT and USAT optional shift amount operand out of the
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instruction opcode. This also fixes part of PR7792.
llvm-svn: 110875
2010-08-11 23:10:46 +00:00
188b47b214
MC/ARM: Add basic support for handling predication by parsing it out of the mnemonic into a separate operand form.
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llvm-svn: 110794
2010-08-11 06:37:20 +00:00
d215976208
MC/AsmParser: Fix a bug in macro argument parsing, which was dropping
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parentheses from argument lists.
llvm-svn: 110692
2010-08-10 17:38:52 +00:00
72de307116
Add an ARM RSCrr instruction for disassembly only.
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Partial fix for PR7792.
llvm-svn: 110361
2010-08-05 18:59:36 +00:00
adb93e56a3
Add an ARM RSBrr instruction for disassembly only.
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Partial fix for PR7792.
llvm-svn: 110358
2010-08-05 18:23:43 +00:00
57e3f71538
tests: Mark MC/AsmParser tests as requiring x86 for now -- almost all of them
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rely on using a specific x86 triple to test what they want to test.
llvm-svn: 110337
2010-08-05 15:44:15 +00:00
97886d59d1
ARM "rrx" shift operands do not have an immediate. PR7790.
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llvm-svn: 110292
2010-08-05 00:34:42 +00:00
54cfd42c33
MC: Fix symbol fragment offsets in COFF.
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Patch by Cameron Esfahani!
llvm-svn: 110104
2010-08-03 05:02:46 +00:00
cd5fc7bef1
Add support for disassembling VMVN (immediate) instructions. PR7747.
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llvm-svn: 109946
2010-07-31 05:57:44 +00:00
f8270bdb2d
Make MC use Windows COFF on Windows and add tests.
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llvm-svn: 109494
2010-07-27 06:46:15 +00:00
306a1f9721
Support x86 "eiz" and "riz" pseudo index registers in the assembler.
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llvm-svn: 109295
2010-07-24 00:06:39 +00:00
fbd7f65248
Consolidate the ELF section directive tests into a single file as
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suggested by Chris Lattner.
llvm-svn: 109290
2010-07-23 23:40:41 +00:00
6f38011196
Move AVX encoding tests to different files
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llvm-svn: 109269
2010-07-23 21:25:26 +00:00
ea0e05a3ce
Add AVX version of CLMUL instructions
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llvm-svn: 109248
2010-07-23 18:41:12 +00:00
acd9230b1b
Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual
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llvm-svn: 109204
2010-07-23 00:54:35 +00:00
0710c74f29
Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step
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llvm-svn: 109168
2010-07-22 21:18:49 +00:00
e3acfd4d58
Add more 256-bit forms for a bunch of regular AVX instructions
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Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)
llvm-svn: 109063
2010-07-21 23:53:50 +00:00
6238c1d102
Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it
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llvm-svn: 109039
2010-07-21 21:37:59 +00:00
cdbec62510
Add AVX only vzeroall and vzeroupper instructions
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llvm-svn: 109002
2010-07-21 08:56:24 +00:00
3499934da6
Add new AVX vpermilps, vpermilpd and vperm2f128 instructions
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llvm-svn: 108984
2010-07-21 03:07:42 +00:00
3ceaf7a0a2
Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it
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llvm-svn: 108983
2010-07-21 02:46:58 +00:00
e706501975
Add new AVX vextractf128 instructions
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llvm-svn: 108964
2010-07-20 23:19:02 +00:00
c3eb5e3d4b
Include some tests for the recently committed ELF section directive
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handlers.
llvm-svn: 108938
2010-07-20 21:37:30 +00:00
3b505848fd
Add new AVX instruction vinsertf128
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llvm-svn: 108892
2010-07-20 19:44:51 +00:00
6c8041ea34
x86_32 tests for vbroadcast
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llvm-svn: 108789
2010-07-20 00:11:50 +00:00
14c5fd437c
Add AVX vbroadcast new instruction
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llvm-svn: 108788
2010-07-20 00:11:13 +00:00
9de0ca73d4
Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
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llvm-svn: 108769
2010-07-19 23:32:44 +00:00
9db7d0addd
X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same
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instruction, we only want to allow the one for the current subtarget.
- This also fixes suffix matching for jmp instructions, because it eliminates
the ambiguity between 'jmpl' and 'jmpq'.
llvm-svn: 108746
2010-07-19 20:44:16 +00:00
9aefb8ee4c
X86-64: Mark WINCALL and more tail call instructions as code gen only.
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llvm-svn: 108685
2010-07-19 07:21:07 +00:00
b82cd9319b
MC/X86: We now match instructions like "incl %eax" correctly for the arch we are
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assembling; remove crufty custom cleanup code.
llvm-svn: 108681
2010-07-19 06:14:54 +00:00
Benjamin Kramer