Commit Graph

99062 Commits

Author SHA1 Message Date
Andrew Trick 32e1be7bd0 llvm.experimental.stackmap: fix encoding of large constants.
In the stackmap format we advertise the constant field as signed.
However, we were determining whether to promote to a 64-bit constant
pool based on an unsigned comparison.

This fix allows -1 to be encoded as a small constant.

llvm-svn: 198816
2014-01-09 00:22:31 +00:00
David Blaikie 66865d6d94 Simplify/collapse/denest a conditions/blocks.
llvm-svn: 198813
2014-01-09 00:13:35 +00:00
David Blaikie 622dce4194 llvm-dwarfdump: reorder dwo sections to immediately proceed their non-dwo equivalents
This makes it easier to write a test that's mostly shared between
fission and non-fission (using FileCheck's multiple prefix support).

llvm-svn: 198806
2014-01-08 23:29:59 +00:00
Rafael Espindola 3c426afdc6 Fix the C++03 build.
With c++11 we never instantiate the copy constructor.

llvm-svn: 198803
2014-01-08 22:27:04 +00:00
Rafael Espindola 1c704b4a2e Use getError and remove the error_code operator.
llvm-svn: 198799
2014-01-08 22:03:39 +00:00
Chandler Carruth 98f3de8880 Remove vestigal bits of MC from the mangler. It no longer uses this, and
having the include could cause weird layering problems between the IR
and MC libraries.

llvm-svn: 198796
2014-01-08 21:59:22 +00:00
Hal Finkel 2150e3a743 Conservatively handle multiple MMOs in MIsNeedChainEdge
MIsNeedChainEdge, which is used by -enable-aa-sched-mi (AA in misched), had an
llvm_unreachable when -enable-aa-sched-mi is enabled and we reach an
instruction with multiple MMOs. Instead, return a conservative answer. This
allows testing -enable-aa-sched-mi on x86.

Also, this moves the check above the isUnsafeMemoryObject checks.
isUnsafeMemoryObject is currently correct only for instructions with one MMO
(as noted in the comment in isUnsafeMemoryObject):

  // We purposefully do no check for hasOneMemOperand() here
  // in hope to trigger an assert downstream in order to
  // finish implementation.

The problem with this is that, had the candidate edge passed the
"!MIa->mayStore() && !MIb->mayStore()" check, the hoped-for assert would never
happen (which could, in theory, lead to incorrect behavior if one of these
secondary MMOs was volatile, for example).

llvm-svn: 198795
2014-01-08 21:52:02 +00:00
Matt Arsenault a64ee177a0 Move declaration of variables down to first use.
llvm-svn: 198794
2014-01-08 21:47:14 +00:00
Matt Arsenault d13105d793 Add missing definitions of key_type and value_type to DenseSet.
This matches std::set and allows using DenseSet with the functions
in SetOperations.h

llvm-svn: 198793
2014-01-08 21:38:04 +00:00
Rafael Espindola 5d16475b31 Add get and getError methods to ErrorOr.
ErrorOr is modeled after boost::optional which has a get method.

llvm-svn: 198792
2014-01-08 21:17:09 +00:00
Ana Pazos cfd2ca5826 [AArch64][NEON] Added UXTL and UXTL2 instruction aliases
llvm-svn: 198791
2014-01-08 21:02:13 +00:00
Roman Divacky fb4d390766 Force emit a relocation for @gnu_indirect_function symbols so that the indirect
resolution works.

llvm-svn: 198780
2014-01-08 18:50:32 +00:00
David Woodhouse df1e1960ac [x86] Remove OpSize16 flag from MOV32r0
It's not a real instruction any more and doesn't need encoding information.

llvm-svn: 198778
2014-01-08 18:38:26 +00:00
Andrea Di Biagio 23df4e4a2d Teach the DAGCombiner how to fold 'vselect' dag nodes according
to the following two rules:
  1) fold (vselect (build_vector AllOnes), A, B) -> A
  2) fold (vselect (build_vector AllZeros), A, B) -> B

llvm-svn: 198777
2014-01-08 18:33:04 +00:00
Rafael Espindola ac8c55222e Add missing rename from the previous commit.
No idea how this was compiling locally. Found by the bots.

llvm-svn: 198775
2014-01-08 17:56:46 +00:00
Rafael Espindola 3ccb3f201e Rename get to getStorage and getError to getErrorStorage.
These private functions return pointers to the internal storage.

llvm-svn: 198774
2014-01-08 17:43:26 +00:00
Lang Hames 7b6f99ff0d Add missing test case for r198737.
llvm-svn: 198772
2014-01-08 16:31:16 +00:00
Nico Rieck ea623c6f10 Remove mention of old deleted test scripts from testing guide
llvm-svn: 198771
2014-01-08 16:30:03 +00:00
Richard Sandiford 95c864d9bd [DAGCombiner] Factor duplicated rotate code into a separate function
No functional change intended.

llvm-svn: 198768
2014-01-08 15:40:47 +00:00
Alp Toker 9e628916f6 lit: Provide file location in cfg error messages
Python doesn't do a good job at diagnosing string exec() so use execfile()
where available.

This should be a timesaver when trying to get to the bottom of build bot
failures.

Before:

    File "llvm/utils/lit/lit/TestingConfig.py", line 93, in load_from_path
      exec("exec data in cfg_globals")
    File "<string>", line 1, in <module>
    File "<string>", line 194, in <module>
  NameError: name 'typo' is not defined

After:

    File "llvm/utils/lit/lit/TestingConfig.py", line 95, in load_from_path
    execfile(path, cfg_globals)
    File "clang/test/lit.cfg", line 194, in <module>
      typo
      ^~~~
  NameError: name 'typo' is not defined

llvm-svn: 198766
2014-01-08 14:20:59 +00:00
David Woodhouse adfc885997 [x86] Support R_386_PC8, R_386_PC16 and R_X86_64_PC8
llvm-svn: 198763
2014-01-08 12:58:40 +00:00
David Woodhouse 9785f512cb [x86] Add JMP_2 and other 16-bit PC-relative branch instructions
Mark them as requiring 16-bit mode for now, since we don't yet have
relaxation support for FK_Data_2.

llvm-svn: 198762
2014-01-08 12:58:36 +00:00
David Woodhouse 8bceb5d217 [x86] Do not relax PUSHi16 to PUSHi32 (PR18414)
They do *different* things to %esp, so they are not equivalent.

Rename PUSHi8 to PUSH32i8 and add the missing PUSH16i8.

llvm-svn: 198761
2014-01-08 12:58:32 +00:00
David Woodhouse 6dbda4415a [x86] Make AsmParser validate registers for memory operands a bit better
We can't do a perfect job here. We *have* to allow (%dx) even in 64-bit
mode, for example, because it might be used for an unofficial form of
the in/out instructions. We actually want to do a better job of validation
*later*. Perhaps *instead* of doing it where we are at the moment.

But for now, doing what validation we *can* do in the place that the code
already has its validation, is an improvement.

llvm-svn: 198760
2014-01-08 12:58:28 +00:00
David Woodhouse 32da3c8f3b [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand
It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.

Hm, perhaps we do need an AdSize16 bit after all?

llvm-svn: 198759
2014-01-08 12:58:24 +00:00
David Woodhouse 374243a290 [x86] Use 16-bit addressing where possible in 16-bit mode
Where "where possible" means that it's an immediate value and it's below
0x10000. In fact GAS will either truncate or error with larger values,
and will insist on using the addr32 prefix to get 32-bit addressing. So
perhaps we should do that, in a later patch.

llvm-svn: 198758
2014-01-08 12:58:18 +00:00
David Woodhouse 84ed54f91e [x86] Fix JCXZ,JECXZ_32 for 16-bit mode
JCXZ should have the 0x67 prefix only if we're in 32-bit mode, so make that
appropriately conditional. And JECXZ needs the prefix instead.

llvm-svn: 198757
2014-01-08 12:58:12 +00:00
David Woodhouse 79dd505ce1 [x86] Disambiguate RET[QL] and fix aliases for 16-bit mode
I couldn't see how to do this sanely without splitting RETQ from RETL.

Eric says: "sad about the inability to roundtrip them now, but...".
I have no idea what that means, but perhaps it wants preserving in the
commit comment.

llvm-svn: 198756
2014-01-08 12:58:07 +00:00
David Woodhouse c178fbe2a2 [x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliases
llvm-svn: 198755
2014-01-08 12:57:55 +00:00
David Woodhouse fd46016e7f [x86] Add JMP16[rm],CALL16[rm] instructions, and fix up aliases
llvm-svn: 198754
2014-01-08 12:57:49 +00:00
David Woodhouse 13574a7517 [x86] Add PUSHA16,POPA16 instructions, and fix aliases for 16-bit mode
llvm-svn: 198753
2014-01-08 12:57:45 +00:00
David Woodhouse 956965ca69 [x86] Add OpSize16 to instructions that need it
This fixes the bulk of 16-bit output, and the corresponding test case
x86-16.s now looks mostly like the x86-32.s test case that it was
originally based on. A few irrelevant instructions have been dropped,
and there are still some corner cases to be fixed in subsequent patches.

llvm-svn: 198752
2014-01-08 12:57:40 +00:00
Rafael Espindola 4daaa8e8f2 Use -std=gnu99 in tools/llvm-c-test/CMakeLists.txt
With a current mingw (gcc 4.8.1) it looks like we hit some variation of

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40278

The end result is that off_t is not defined and the build fails without this
patch.

llvm-svn: 198749
2014-01-08 11:48:19 +00:00
Alp Toker c0b7bb56db CMake: Provide LLVM_PLUGIN_EXT definition
This is needed to support the addition of tests for clang loadable plugins.

In clang, plugins are built as modules (bundles on OS X) rather than dynamic
libraries (dylib) so the build system needs to inform lit of the actual
file extension in use, typically '.so' on Unix and '.dll' on Windows.

(LLVM itself should probably switch to this scheme to fix PR14903 once and for
all.)

No change in build output or functionality intended.

llvm-svn: 198746
2014-01-08 11:10:24 +00:00
Elena Demikhovsky 172a27c750 AVX-512: Added more intrinsics for pmin/pmax, pabs, blend, pmuldq.
llvm-svn: 198745
2014-01-08 10:54:22 +00:00
Iain Sandoe 618def651b [patch] Adjust behavior of FDE cross-section relocs for targets that don't support abs-differences.
Modern versions of OSX/Darwin's ld (ld64 > 97.17) have an optimisation present that allows the back end to omit relocations (and replace them with an absolute difference) for FDE some text section refs.

This patch allows a backend to opt-in to this behaviour by setting "DwarfFDESymbolsUseAbsDiff".  At present, this is only enabled for modern x86 OSX ports.

test changes by David Fang.

llvm-svn: 198744
2014-01-08 10:22:54 +00:00
Kevin Qin 44946439e1 [AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANE
when lower build_vector if result value type mismatch with operand
value type.

llvm-svn: 198743
2014-01-08 08:06:14 +00:00
Venkatraman Govindaraju b7c6965b19 [SparcV9] Rename operands in some sparc64 instructions so that TableGen can encode them correctly.
llvm-svn: 198740
2014-01-08 07:47:57 +00:00
Venkatraman Govindaraju f691e2c230 [Sparc] Correct the mask for fixup_sparc_br19.
llvm-svn: 198739
2014-01-08 06:46:51 +00:00
Venkatraman Govindaraju b3b7c38983 [Sparc] Add support for parsing branch instructions and conditional moves.
llvm-svn: 198738
2014-01-08 06:14:52 +00:00
Lang Hames 173c69f226 Re-apply r196639: Add support for archives and object file caching under MCJIT.
I believe the bot failures on linux systems were due to overestimating the
alignment of object-files within archives, which are only guaranteed to be
two-byte aligned. I have reduced the alignment in
RuntimeDyldELF::createObjectImageFromFile accordingly.

llvm-svn: 198737
2014-01-08 04:09:09 +00:00
Saleem Abdulrasool 7e34cc4dbd tests: disable ARM unwinding tests if ARM is unavailable
Appease the buildbots for targets which do not build the ARM support by moving
the ARM specific test into a subdirectory and use the lit configuration to
disable them appropriately.

Thanks to chapuni and thakis for explaining how to do this!

llvm-svn: 198736
2014-01-08 03:44:01 +00:00
Saleem Abdulrasool d88affb53c ARM IAS: properly handle expression operands
Operands which involved label arithemetic would previously fail to parse.  This
corrects that by adding the additional case for the shift operand validation.

llvm-svn: 198735
2014-01-08 03:28:14 +00:00
Saleem Abdulrasool be981ebcf0 llvm-readobj: add support for ARM EHABI unwind info
This adds some preliminary support for decoding ARM EHABI unwinding information.
The major functionality that remains from complete support is bytecode
translation.

Each Unwind Index Table is printed out as a separate entity along with its
section index, name, offset, and entries.

Each entry lists the function address, and if possible, the name, of the
function to which it corresponds.  The encoding model, personality routine or
index, and byte code is also listed.

llvm-svn: 198734
2014-01-08 03:28:09 +00:00
Hao Liu 26abebbb2c Fix a bug about generating undef operand when optimising shuffle vector and insert element in instruction combine.
llvm-svn: 198730
2014-01-08 03:06:15 +00:00
David Woodhouse 1c3996abc7 [x86] Kill gratuitous X86_{32,64}TargetMachine subclasses, use X86TargetMachine
llvm-svn: 198720
2014-01-08 00:08:50 +00:00
Rafael Espindola 894843cb4e Move the llvm mangler to lib/IR.
This makes it available to tools that don't link with target (like llvm-ar).

llvm-svn: 198708
2014-01-07 21:19:40 +00:00
Roman Divacky 5a1c54999d In the ELFWriter when writing aliased (.set) symbols dont blindly
take type from the new symbol but merge them so that the type
is never "downgraded".

This is probably quite rare, except for IFUNC symbols which
we used to misassemble, losing the IFUNC type.

Fixes #18372.

llvm-svn: 198706
2014-01-07 20:17:03 +00:00
Cameron McInally 8af9eac331 Fix uninitialized variable warning in DataLayout.
llvm-svn: 198702
2014-01-07 19:51:38 +00:00
Rafael Espindola 170a6e7944 Don't assert with private type info variables.
With the gnu objc runtime private strings are used. Since we only need to
produce a unique label, the fix is to just drop the asserts.

llvm-svn: 198701
2014-01-07 19:38:47 +00:00
Benjamin Kramer 8a68ab3710 Emit arange padding with a single directive.
llvm-svn: 198700
2014-01-07 19:28:14 +00:00
David Peixotto a872e0e0a6 Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64
This commit adds the pre-UAL aliases of fconsts and fconstd for
vmov.f32 and vmov.f64. They use an InstAlias rather than a
MnemonicAlias to properly support the predicate operand.

We need to support encoded 8-bit constants in order to implement the
pre-UAL fconsts/fconstd aliases for vmov.f32/vmov.f64, so this
commit also fixes parsing of encoded floating point constants used
in vmov.f32/vmov.f64 instructions. Now we can support assembly code
like this:

  fconsts s0, #0x70

which is equivalent to vmov.f32 s0, #1.0.

Most of the code was already in place to support this feature.
Previously the code was trying to accept encoded 8-bit float
constants for the vmov.f32/vmov.f64 instructions.  It looks like the
support for parsing encoded floats was lost in a refactoring in
commit r148556 and we did not have any tests in place to catch it.

The change in this commit is to keep the parsed value as a 32-bit
float instead of a 64-bit double because that is what the isFPImm()
function expects to find. There is no loss of precision by using a
32-bit float here because we are still limited to an 8-bit encoded
value in the end.

Additionally, we explicitly reject encoded 8-bit floats for
vmovf.32/64. This is the same as the current behavior, but we now do
it explicitly rather than accidently.

llvm-svn: 198697
2014-01-07 18:19:23 +00:00
Logan Chien 2da1021355 [arm] Fix an incorrect comment in ARMUnwindOpAsm.h.
llvm-svn: 198696
2014-01-07 17:47:25 +00:00
Chandler Carruth 10b0915f85 Try to fix the windows build. The comments in other files don't seem to
be quite accurate. =]

llvm-svn: 198690
2014-01-07 12:37:13 +00:00
Chandler Carruth 9aca918df9 Move the LLVM IR asm writer header files into the IR directory, as they
are part of the core IR library in order to support dumping and other
basic functionality.

Rename the 'Assembly' include directory to 'AsmParser' to match the
library name and the only functionality left their -- printing has been
in the core IR library for quite some time.

Update all of the #includes to match.

All of this started because I wanted to have the layering in good shape
before I started adding support for printing LLVM IR using the new pass
infrastructure, and commandline support for the new pass infrastructure.

llvm-svn: 198688
2014-01-07 12:34:26 +00:00
Chandler Carruth 8a8cd2bab9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685
2014-01-07 11:48:04 +00:00
Hao Liu 7d11d99d20 [AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. There is no test cases for D tuple as the original test cases are too large. As the spill/fill of the D tuple is similar to the Q tuple, the correctness can be guaranteed.
llvm-svn: 198684
2014-01-07 10:50:43 +00:00
NAKAMURA Takumi e42fd0d34d [CMake] Introduce llvm_update_compile_flags(target_name) to update compile flags in target properties.
FIXME: Just add_unittest() is using it.
FIXME: Cooperate with source properties.
llvm-svn: 198683
2014-01-07 10:24:14 +00:00
Hao Liu 27d88376bc [AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuples such as QPair/QTriple/QQuad. There is no test case for D tuple as the original test cases are too large. As the copy of the D tuple is similar to the Q tuple, the correctness can be guaranteed.
llvm-svn: 198682
2014-01-07 10:00:03 +00:00
Venkatraman Govindaraju 559c4ac377 [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc.,
Also, correct the offsets for FixupsKindInfo.

llvm-svn: 198681
2014-01-07 08:00:49 +00:00
Andrew Trick dfacda3635 Fix for PR18396: Assertion: MO->isDead "Cannot fold physreg def".
InlineSpiller::foldMemoryOperand needs to handle undef call operands.

llvm-svn: 198679
2014-01-07 07:31:10 +00:00
Andrew Trick e4a18605e0 Reapply r198654 "indvars: sink truncates outside the loop."
This doesn't seem to have actually broken anything. It was paranoia
on my part. Trying again now that bots are more stable.

This is a follow up of the r198338 commit that added truncates for
lcssa phi nodes. Sinking the truncates below the phis cleans up the
loop and simplifies subsequent analysis within the indvars pass.

llvm-svn: 198678
2014-01-07 06:59:12 +00:00
Kevin Qin cfa41a2569 [AArch64 NEON] Fixed incorrect immediate used in BIC instruction.
llvm-svn: 198675
2014-01-07 05:10:47 +00:00
Saleem Abdulrasool 4cb063cbf0 ARM IAS: allow more depth in contextual diagnostics
Switch the context to be SmallVectors.  This allows for saving additional
context when providing previous emission sites.

llvm-svn: 198665
2014-01-07 02:29:00 +00:00
Saleem Abdulrasool c493d1499a ARM IAS: refactor unwind context
Move the unwinding context for the ARM IAS into a helper class.  This is purely
a structural refactoring.  A follow up change allows for recording additional
depth to improve diagnostics.

llvm-svn: 198664
2014-01-07 02:28:55 +00:00
Saleem Abdulrasool f16e68a24d ARM Streamer: print out tag names
If using verbose asm, print out the friendly name of the tag if possible.

llvm-svn: 198663
2014-01-07 02:28:50 +00:00
Saleem Abdulrasool 87ccd367b6 ARM IAS: improve .eabi_attribute handling
Parse tag names as well as expressions.  The former is part of the
specification, the latter is for improved compatibility with the GNU assembler.
Fix attribute value handling to be comformant to the specification.

llvm-svn: 198662
2014-01-07 02:28:42 +00:00
Saleem Abdulrasool 69c7caf630 MCParser: introduce Note and use it for ARM AsmParser
Introduce a new virtual method Note into the AsmParser.  This completements the
existing Warning and Error methods.  Use the new method to clean up the output
of the unwind routines in the ARM AsmParser.

llvm-svn: 198661
2014-01-07 02:28:31 +00:00
Mingjie Xing 9deac1b7c2 Fix comment of findGCD.
llvm-svn: 198660
2014-01-07 01:54:16 +00:00
Andrew Trick 3c0ed08996 Revert "indvars: sink truncates outside the loop."
This reverts commit r198654.

One of the bots reported a SciMark failure.

llvm-svn: 198659
2014-01-07 01:50:58 +00:00
Venkatraman Govindaraju 0458b599f8 [Sparc] Add support for parsing memory operands in sparc AsmParser.
llvm-svn: 198658
2014-01-07 01:49:11 +00:00
Andrew Trick 0b8e3b2cb4 indvars: sink truncates outside the loop.
This is a follow up of the r198338 commit that added truncates for
lcssa phi nodes. Sinking the truncates below the phis cleans up the
loop and simplifies subsequent analysis within the indvars pass.

llvm-svn: 198654
2014-01-07 01:02:55 +00:00
Andrew Trick b70d9780ac 80 col. comment.
llvm-svn: 198653
2014-01-07 01:02:52 +00:00
Jack Carter 0cd3c19f33 [Mips] TargetStreamer Support for .abicalls and .set pic0.
This patch adds .abicalls and .set pic0 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that both the integrated and standalone
assemblers will use for the output for these directives.

llvm-svn: 198646
2014-01-06 23:27:31 +00:00
Kevin Enderby f16c8c5162 For the 'C' disassembler API, add a new ReferenceType for the
SymbolLookUp() call back to return a demangled C++ name to
be used as a comment.

For example darwin's otool(1) program the uses the llvm
disassembler now can produce disassembly like:

callq   __ZNK4llvm6Target20createMCDisassemblerERKNS_15MCSubtargetInfoE ## llvm::Target::createMCDisassembler(llvm::MCSubtargetInfo const&) const

Also fix a bug in LLVMDisasmInstruction() that was not flushing
the raw_svector_ostream for the disassembled instruction string
before copying it to the output buffer that was causing truncation
of the output.

rdar://10173828

llvm-svn: 198637
2014-01-06 22:08:08 +00:00
Rafael Espindola abdd726ce5 Improve documentation of the 'a' specifier and the '<abi>:<pref>' align pair.
llvm-svn: 198636
2014-01-06 21:40:24 +00:00
Matt Arsenault 50df85f8c0 Fix c++ mode comments
llvm-svn: 198632
2014-01-06 19:52:42 +00:00
Andrew Trick 6796ab424c Reapply r198478 "Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists things."
Now with a fix for PR18384: ValueHandleBase::ValueIsDeleted.

We need to invalidate SCEV's loop info when we delete a block, even if no values are hoisted.

llvm-svn: 198631
2014-01-06 19:43:14 +00:00
Jean-Daniel Dupas edad1b4797 Introduce a cmake LLVM_ENABLE_LIBCXX build parameter to compile using libc++ instead of the system default
Summary:
This parameter is required to build C++11 projects (like lld or lldb) on OS X as the default STL does not provide c++ classes.


CC: llvm-commits, triton

Differential Revision: http://llvm-reviews.chandlerc.com/D2381

llvm-svn: 198625
2014-01-06 18:27:27 +00:00
Rafael Espindola d61a0c028d Remove dead code.
llvm-svn: 198624
2014-01-06 18:14:34 +00:00
Tim Northover d6a729bb85 ARM MachO: sort out isTargetDarwin/isTargetIOS/... checks.
The ARM backend has been using most of the MachO related subtarget
checks almost interchangeably, and since the only target it's had to
run on has been IOS (which is all three of MachO, Darwin and IOS) it's
worked out OK so far.

But we'd like to support embedded targets under the "*-*-none-macho"
triple, which means everything starts falling apart and inconsistent
behaviours emerge.

This patch should pick a reasonably sensible set of behaviours for the
new triple (and any others that come along, with luck). Some choices
were debatable (notably FP == r7 or r11), but we can revisit those
later when deficiencies become apparent.

llvm-svn: 198617
2014-01-06 14:28:05 +00:00
Robert Lytton 9523aa41fb XCore Target: correct callee save register spilling when callsUnwindInit is true.
llvm-svn: 198616
2014-01-06 14:21:12 +00:00
Robert Lytton c8c4aa667b XCore target: Lower EH_RETURN
llvm-svn: 198615
2014-01-06 14:21:07 +00:00
Robert Lytton 5da175214b XCore target: Lower FRAME_TO_ARGS_OFFSET
This requires a knowledge of the stack size which is not known until
the frame is complete, hence the need for the XCoreFTAOElim pass
which lowers the XCoreISD::FRAME_TO_ARGS_OFFSET instrution into its
final form.

llvm-svn: 198614
2014-01-06 14:21:00 +00:00
Robert Lytton dec798751a XCore target: Lower RETURNADDR
Only handles a depth of zero (the same as FRAMEADDR)

llvm-svn: 198613
2014-01-06 14:20:53 +00:00
Robert Lytton cbb588a264 XCore target: Optimise entsp / retsp selection
llvm-svn: 198612
2014-01-06 14:20:47 +00:00
Robert Lytton a53360a339 XCore target: Refactor LR handling
We also narrow the liveness of FP & LR during the prologue to
reflect the actual usage of the registers.
I have been unable to construct a test to prove the previous live
range was too large.

llvm-svn: 198611
2014-01-06 14:20:41 +00:00
Robert Lytton 9288eea910 XCore target: Refactor the loading of constants into a register
This common functionality will be used to lower FRAME_TO_ARGS_OFFSET.

llvm-svn: 198610
2014-01-06 14:20:37 +00:00
Robert Lytton bc4d976152 XCore target: fix handling of unsized global arrays in large code model
llvm-svn: 198609
2014-01-06 14:20:32 +00:00
Tim Northover 7649ebacd6 ARM: keep special non-AEABIness of "-darwin-eabi" triples for now
Longer term, we want to move users to "*-*-*-macho" for embedded work, but for
now people are relying on the last thing we told them, which is unfortunately
"*-*-darwin-eabi".

rdar://problem/15703934

llvm-svn: 198602
2014-01-06 12:00:44 +00:00
Elena Demikhovsky 3629b4aa0e AVX-512: added intrinsic vcvtpd2ps (with rounding mode and without)
llvm-svn: 198593
2014-01-06 08:45:54 +00:00
Venkatraman Govindaraju 2bab98bbae [Sparc] Explicitly cast -1 to unsigned to fix buildbot errors.
llvm-svn: 198592
2014-01-06 08:24:44 +00:00
Venkatraman Govindaraju dfcccc7db0 [Sparc] Add initial implementation of disassembler for sparc
llvm-svn: 198591
2014-01-06 08:08:58 +00:00
David Majnemer a45a176ebc MC: Fatally error if subtraction operand is bad
Instead of crashing, raise an error when a subtraction expression
involves an undefined symbol.

This fixes PR18375.

llvm-svn: 198590
2014-01-06 07:39:46 +00:00
Craig Topper 2ea87dad77 The rest of r198588. Remove SegOvrBits from X86 TSFlags since they weren't being used.
llvm-svn: 198589
2014-01-06 06:57:27 +00:00
Craig Topper 7c6baa7834 Remove SegOvrBits from X86 TSFlags since they weren't being used.
llvm-svn: 198588
2014-01-06 06:51:58 +00:00
Craig Topper 78e58b28a5 Remove argument to fix build bot failure.
llvm-svn: 198587
2014-01-06 06:09:03 +00:00
Craig Topper 7ceb54a2a1 Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode
The 0x66 prefix toggles between 16-bit and 32-bit addressing mode.
So in 32-bit mode it is used to switch to 16-bit addressing mode for the
following instruction, while in 16-bit mode it's the other way round — it's
used to switch to 32-bit mode instead.

Thus, emit the 0x66 prefix byte for OpSize only in 32-bit (and 64-bit) mode,
and introduce a new OpSize16 bit which is used in 16-bit mode instead.

This is just the basic infrastructure for that change; a subsequent patch
will add the new OpSize16 bit to the 32-bit instructions that need it.

Patch from David Woodhouse.

llvm-svn: 198586
2014-01-06 06:02:58 +00:00
Bill Wendling 13199b17f8 Remove unnecessary #includes.
llvm-svn: 198585
2014-01-06 06:00:00 +00:00
Craig Topper 3c80d62a6c [x86] Add basic support for .code16
This is not really expected to work right yet. Mostly because we will
still emit the OpSize (0x66) prefix in all the wrong places, along with
a number of other corner cases. Those will all be fixed in the subsequent
commits.

Patch from David Woodhouse.

llvm-svn: 198584
2014-01-06 04:55:54 +00:00
Saleem Abdulrasool 32a14e0a7b Support: add reference for ARM EHABI
Add a reference to the ARM EHABI Specification as a follow up to SVN r198576

llvm-svn: 198583
2014-01-06 04:14:03 +00:00
Kevin Qin 5cd73c9e0a [AArch64 NEON] Fix invalid constant used in vselect condition.
There is a wrong assumption that the vector element type and the
type of each ConstantSDNode in the build_vector were the same.
However, when promoting the integer operand of a legally typed
build_vector, the operand type and the vector element type do not
need to be the same
(See method 'DAGTypeLegalizer::PromoteIntOp_BUILD_VECTOR' in
LegalizeIntegerTypes.cpp).

  in AArch64 backend, the following dag sequence:

  C0: i1 = Constant<0>
  C1: i1 = Constant<-1>
  V: v8i1 = BUILD_VECTOR C1, C1, C0, C0, C0, C0, C0, C0

  is type-legalized into:

  NewC0: i32 = Constant<0>
  NewC1: i32 = Constant<1>
  V: v8i8 = BUILD_VECTOR NewC1, NewC1, NewC0, NewC0, NewC0, NewC0, NewC0, NewC0

Forcing a getZeroExtend to VTBits to ensure that the new constant
is correctly.

llvm-svn: 198582
2014-01-06 02:26:10 +00:00
Venkatraman Govindaraju b73aeca888 [Sparc] Add ELF Object Writer for Sparc.
llvm-svn: 198580
2014-01-06 01:22:54 +00:00
Bill Wendling 908bf814e7 Refactor function that checks that __builtin_returnaddress's argument is constant.
This moves the check up into the parent class so that all targets can use it
without having to copy (and keep in sync) the same error message.

llvm-svn: 198579
2014-01-06 00:43:20 +00:00
Bill Wendling f7fa730e61 Remove a failing test to get the buildbots back to green.
llvm-svn: 198578
2014-01-06 00:43:09 +00:00
Bill Wendling e4c9a77755 Try to fix s390x build bot.
llvm-svn: 198577
2014-01-06 00:43:04 +00:00
Saleem Abdulrasool b961c99f1a ARM: move ARMUnwindOp.h into Support
Move the ARM EHABI unwind opcode definitions from the ARM MCTargetDesc into LLVM
Support.  This enables sharing of the definitions across the ARM target code as
well as llvm-readobj.  This will allow implementation of the unwind decoding in
llvm-readobj.

llvm-svn: 198576
2014-01-06 00:15:00 +00:00
Benjamin Kramer db5122f6da SPARC: Make helper function static.
llvm-svn: 198567
2014-01-05 20:26:05 +00:00
Craig Topper 21ba8fbc18 Fix ModR/M byte output for 16-bit addressing modes (PR18220)
Add some tests to validate correct register selection, including a fix
to an existing test which was requiring the *wrong* output.

Patch from David Woodhouse.

llvm-svn: 198566
2014-01-05 19:40:56 +00:00
Venkatraman Govindaraju bac9b569c6 ELF relocation types for sparc.
llvm-svn: 198565
2014-01-05 19:25:57 +00:00
Craig Topper 792587cc7b Remove opcode from MOV32r0 that I accidentally left when I converted it to Pseudo. Remove FIXME as well.
llvm-svn: 198564
2014-01-05 19:25:13 +00:00
Saleem Abdulrasool 681e0bb3a6 ARM: style changes to LDRD, STRD definition
Fix indentation, name registers similar to ARM ARM.

No functionality change!

llvm-svn: 198563
2014-01-05 16:36:37 +00:00
Elena Demikhovsky f404e054a1 AVX-512: changed property name from "neverHasSideEffects=1" to "hasSideEffects=0", added this property to VMOVSS/VMOVSD;
Optimized a truncate pattern.

llvm-svn: 198562
2014-01-05 14:21:07 +00:00
Simon Atanasyan 728d21600c [Mips] Add support for DT_MIPS_RLD_MAP and DT_MIPS_PLTGOT dynamic
section tags to the llvm-readobj.

llvm-svn: 198561
2014-01-05 13:40:27 +00:00
Simon Atanasyan 940cc71bea [Mips] Rename the test case input file. No functional changes.
llvm-svn: 198560
2014-01-05 13:40:17 +00:00
Elena Demikhovsky 52e4a0e109 AVX-512: Added more intrinsics for convert and min/max.
Removed vzeroupper from AVX-512 mode - our optimization gude does not recommend to insert vzeroupper at all.

llvm-svn: 198557
2014-01-05 10:46:09 +00:00
Chandler Carruth c4ddab6ff2 [PM] Add a definition for the static PassID in the CallGraphAnalysis.
Missed this when adding the skeleton analysis. Caught by a build break
in the next patch I'm working on when trying to use the analysis.

llvm-svn: 198556
2014-01-05 10:38:52 +00:00
Chandler Carruth cde91b4279 Add in a unittest for the one-use pattern matcher.
llvm-svn: 198552
2014-01-05 09:14:53 +00:00
Craig Topper 7894e812bb Add the other form of movq xmm,xmm for the disassembler.
llvm-svn: 198551
2014-01-05 07:16:04 +00:00
Craig Topper d9e1669d1c Use patterns to remove some duplicate instructions.
llvm-svn: 198550
2014-01-05 06:55:48 +00:00
Craig Topper 34db6523f3 Fix encoding for PUSH64i16. Add In64BitMode Predicate. Remove disassembler hack.
llvm-svn: 198547
2014-01-05 05:46:38 +00:00
Craig Topper c0107977d9 Remove no longer needed x86 disassembler hack.
llvm-svn: 198546
2014-01-05 05:10:07 +00:00
Craig Topper 0550ce7ac1 Mark x86 _alt instructions as AsmParserOnly so they will be omitted from disassembler without string matches.
llvm-svn: 198545
2014-01-05 04:55:55 +00:00
Craig Topper 5165cf78b0 Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode and remove disassmbler table emitter hack.
llvm-svn: 198544
2014-01-05 04:32:42 +00:00
Craig Topper 3484fc2161 Add a new x86 specific instruction flag to force some isCodeGenOnly instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions.
llvm-svn: 198543
2014-01-05 04:17:28 +00:00
Chandler Carruth c77d50a97e Add support to the pattern match library for matching NSW and NUW
instructions. I needed this for a quick experiment I was making, and
while I've no idea if that will ever get committed, I didn't want to
throw away the pattern match code and for anyone else to have to write
it again. I've added unittests to make sure this works correctly.

In fun news, this also uncovered the IRBuilder bug. Doh!

llvm-svn: 198541
2014-01-05 03:28:29 +00:00
Chandler Carruth 0db10c4fef Fix a bug in IRBuilder that's been there for who knows how long. It
failed to correctly propagate the NUW and NSW flags to the constant
folder for two instructions. I've added a unittest to cover flag
propagation for the rest of the instructions and constant expressions.

llvm-svn: 198538
2014-01-05 03:22:33 +00:00
Bill Wendling 4002a941fa Attempt to fix buildbots by XFAILing some architectures.
llvm-svn: 198537
2014-01-05 03:10:56 +00:00
Venkatraman Govindaraju d11572818b Add lit.local.cfg for MC/Sparc
llvm-svn: 198536
2014-01-05 03:07:04 +00:00
Chandler Carruth 91f4e609fe Use a shorter name for the IRBuilder member. This will help the tests
I'm adding next be a lot more readable.

llvm-svn: 198534
2014-01-05 02:23:11 +00:00
Venkatraman Govindaraju 5f1cce50e6 [Sparc] Add initial implementation of MC Code emitter for sparc.
llvm-svn: 198533
2014-01-05 02:13:48 +00:00
Chandler Carruth 4603e96ac0 Simplify the PatternMatch unittest by giving it a module, function, and
basic block to hold instructions, and managing all of their lifetimes in
a fixture. This makes it easy to sink the expectations into the test
cases themselves which also makes things a bit more explicit and clearer
IMO.

llvm-svn: 198532
2014-01-05 02:07:20 +00:00
Bill Wendling df7dd28dc8 Emit an error message if the value passed to __builtin_returnaddress isn't a constant
__builtin_returnaddress requires that the value passed into is be a constant.
However, at -O0 even a constant expression may not be converted to a constant.
Emit an error message intead of crashing.

llvm-svn: 198531
2014-01-05 01:47:20 +00:00
Craig Topper 5999d47538 Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test.
llvm-svn: 198530
2014-01-05 01:35:51 +00:00
Craig Topper 7d4e01cdcb Don't use PrintFatalError(which calls exit) for 'Primary decode conflict'. Just skip emitting the table. This way the main function will delete the output file instead of it remaining empty and confusing dependency checks if build is invoked a second time.
llvm-svn: 198529
2014-01-05 01:34:12 +00:00
Nico Weber 34bac1f730 Add a FIXME.
llvm-svn: 198528
2014-01-05 00:37:45 +00:00
Alp Toker f929e09b10 Add missed cleanup from r198456
All other uses of this macro in LLVM/clang have been moved to the function
definition so follow suite (and the usage advice) here too for consistency.

llvm-svn: 198516
2014-01-04 22:47:48 +00:00
Craig Topper bc281ad8c1 Tag x86 move to/from debug/control registers with Not64BitMode/In64BitMode. Remove disassembler hack.
llvm-svn: 198515
2014-01-04 22:29:41 +00:00
Alp Toker 5e9f3265f8 Revert "Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists things."
This commit was the source of crasher PR18384:

While deleting: label %for.cond127
An asserting value handle still pointed to this value!
UNREACHABLE executed at llvm/lib/IR/Value.cpp:671!

Reverting to get the builders green, feel free to re-land after fixing up.
(Renato has a handy isolated repro if you need it.)

This reverts commit r198478.

llvm-svn: 198503
2014-01-04 17:00:45 +00:00
Venkatraman Govindaraju c2dee7dc74 [Sparc] Add the initial implementation of an asm parser for sparc/sparcv9.
llvm-svn: 198484
2014-01-04 11:30:13 +00:00
Venkatraman Govindaraju 96ab3bc5bd [SparcV9]: Implement RETURNADDR and FRAMEADDR lowering in SPARC64.
Fixes PR18356.

llvm-svn: 198480
2014-01-04 07:17:21 +00:00
Andrew Trick aceac9746d Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists things.
getSCEV for an ashr instruction creates an intermediate zext
expression when it truncates its operand.

The operand is initially inside the loop, so the narrow zext
expression has a non-loop-invariant loop disposition.

LoopSimplify then runs on an outer loop, hoists the ashr operand, and
properly invalidate the SCEVs that are mapped to value.

The SCEV expression for the ashr is now an AddRec with the hoisted
value as the now loop-invariant start value.

The LoopDisposition of this wide value was properly invalidated during
LoopSimplify.

However, if we later get the ashr SCEV again, we again try to create
the intermediate zext expression. We get the same SCEV that we did
earlier, and it is still cached because it was never mapped to a
Value. When we try to create a new AddRec we abort because we're using
the old non-loop-invariant LoopDisposition.

I don't have a solution for this other than to clear LoopDisposition
when LoopSimplify hoists things.

I think the long-term strategy should be to perform LoopSimplify on
all loops before computing SCEV and before running any loop opts on
individual loops. It's possible we may want to rerun LoopSimplify on
individual loops, but it should rarely do anything, so rarely require
invalidating SCEV.

llvm-svn: 198478
2014-01-04 05:52:49 +00:00
Andrew Trick c19df03774 whitespace
llvm-svn: 198477
2014-01-04 05:52:45 +00:00
Craig Topper 1da8582322 Remove JMP64pcrel32 (jmpq ). There are no tests for it. I'm pretty sure it won't be emitted correctly since it was set to NoImm. And I can't prove that gas accepts 'jmpq' with an immediate either. Remove the special case for it from the disassembler table generator.
llvm-svn: 198475
2014-01-04 05:09:27 +00:00
Reid Kleckner ee492dfad5 Fix MSVC warning about missing return in DataLayout
llvm-svn: 198465
2014-01-03 23:51:09 +00:00
Nico Weber 7408c7066a Add a LLVM_DUMP_METHOD macro.
The motivation is to mark dump methods as used in debug builds so that they can
be called from lldb, but to not do so in release builds so that they can be
dead-stripped.

There's lots of potential follow-up work suggested in the thread
"Should dump methods be LLVM_ATTRIBUTE_USED only in debug builds?" on cfe-dev,
but everyone seems to agreen on this subset.

Macro name chosen by fair coin toss.

llvm-svn: 198456
2014-01-03 22:53:37 +00:00
Jack Carter 5b3d51c7fb [Mips]Work around MIPS linker issues exposed by commit r198087 until bug 18360 is resolved
llvm-svn: 198451
2014-01-03 22:18:43 +00:00
Adrian Prantl 81e5cd9e73 FileCheck: Print a nice error message for missing closing ']' in regex vars.
llvm-svn: 198449
2014-01-03 21:49:09 +00:00
Reid Kleckner 19bccb790e Revert "For disassembly when adding a symbolic operand that is a C++ symbol name, also put the human readable name in a comment."
This reverts commit r198441.

This change doesn't build on Windows, and doesn't do the right thing on
Linux and other platforms that don't use a _Z prefix instead of __Z for
C++ names.

It also had no tests, so it wasn't clear how to fix it forward.

llvm-svn: 198445
2014-01-03 19:56:20 +00:00
Rafael Espindola aa842f06bd Fix typo.
Thanks to Owen Anderson for noticing it.

llvm-svn: 198443
2014-01-03 19:42:04 +00:00