Commit Graph

379945 Commits

Author SHA1 Message Date
David Green 08c09bb89f [ARM] Move PhaseOrdering test to the correct place. NFC 2021-02-14 18:43:39 +00:00
Florian Hahn 3df5d5aace [ConstraintElimination] Fix variables used for pattern matching.
Re-using the matched variable in the pattern does not work as expected.
This patch fixes that by introducing a new variable for the 2nd level
match.
2021-02-14 18:42:37 +00:00
Nikita Popov f197cf2126 [BasicAA] Merge aliasGEP code paths
At this point, we can treat the case of GEP/GEP aliasing and
GEP/non-GEP aliasing in essentially the same way. The only
differences are that we need to do an additional negative GEP base
check, and that we perform a bailout on unknown sizes for the
GEP/non-GEP case (the latter exists only to limit compile-time).

This change is not quite NFC due to the peculiar effect that
the DecomposedGEP for V2 can actually be non-trivial even if V2
is not a GEP. The reason for this is that getUnderlyingObject()
can look through LCSSA phi nodes, while stripPointerCasts() doesn't.
This can lead to slightly better results if single-entry phi nodes
occur inside a loop, where looking through the phi node via aliasPhi()
would subject it to phi cycle equivalence restrictions. It would
probably make sense to adjust pointer cast stripping (for AA) to
handle this case, and ensure consistent results.
2021-02-14 19:35:36 +01:00
Nikita Popov da46a2a87b [BasicAA] Add test for single arg phi in loop (NFC) 2021-02-14 19:35:36 +01:00
David Green bc2e843839 [ARM] A couple of small MVE reduction tests from intrinsics. NFC
Also added a PhaseOrdering test, to make sure they are not broken by
VectorCombine cost changes.
2021-02-14 18:26:22 +00:00
Tony Tye 8a91b68b95 [AMDGPU] Limit memory scope for scratch, LDS and GDS
Changes for AMD GPU SIMemoryLegalizer:

- Limit the memory scope to maximum supported by the scratch, LDS and
  GDS address spaces.

- Improve assertion checking.

- Correct toSIAtomicScope argument name.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D96643
2021-02-14 17:34:12 +00:00
Kazu Hirata b4c0d610a6 [AMDGPU] Fix build breakage 2021-02-14 09:02:55 -08:00
David Green ac00518c9d [ARM] Add some tests for MVE lane interleaving. NFC 2021-02-14 16:51:18 +00:00
Kazu Hirata 910e2d1e57 [llvm] Use llvm::is_contained (NFC) 2021-02-14 08:36:20 -08:00
Kazu Hirata 1cc558bd4f [llvm] Fix header guards (NFC)
Identified with llvm-header-guard.
2021-02-14 08:36:18 -08:00
Kazu Hirata 6ac12e4b34 [Analysis] Use ListSeparator (NFC) 2021-02-14 08:36:14 -08:00
Nikita Popov 53ae96d4bb [BasicAA] Avoid duplicate query for GEPs with identical offsets (NFCI)
For two GEPs with identical offsets, we currently first perform
a base address query without size information, and then if it is
MayAlias, perform another with size information. This is pointless,
as the latter query should produce strictly better results.

This was not quite true historically due to the way that NoAlias
assumptions were handled, but that issue has since been resolved.
2021-02-14 17:18:28 +01:00
Nikita Popov 728803ed74 [BasicAA] Use index difference to detect GEPs with identical indexes
We currently detect GEPs that have exactly the same indexes by
comparing the Offsets and VarIndices. However, the latter implicitly
performs equality comparisons between two values, which is not
generally legal inside BasicAA, due to the possibility of comparisons
across phi cycles.

I believe that in this particular instance this actually ends up being
unproblematic, at least I wasn't able to come up with any cases that
could result in an incorrect root query result.

In the interest of being defensive, compute GetIndexDifference earlier
(which knows how to handle phi cycles properly) and use the result of
that to determine whether the offsets are identical.
2021-02-14 17:11:03 +01:00
Nicolas Vasilache 428bc6feed [mlir][Linalg] Fix constant detection in linalg.pad_tensor vectorization. 2021-02-14 15:53:39 +00:00
aqjune 5f3c99085d [ValueTracking] Dereferenced pointers are noundef
This is a follow-up of D95238's LangRef update.
This patch updates `programUndefinedIfUndefOrPoison(V)` to return true if
`V` is used by any memory-accessing instruction.
Interestingly, this affected many tests in Attributors, mainly about adding noundefs.
The tests are updated using llvm/utils/update_test_checks.py. I checked that the diffs
are about updating noundefs.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D96642
2021-02-14 22:50:48 +09:00
Stephen Kelly 39ff002e52 [ASTMatchers] Clarify example in docs 2021-02-14 13:49:06 +00:00
Sanjay Patel b40fde062c [InstCombine] fold fdiv with pow divisor (PR49147)
This is unusual in the general (non-reciprocal) case because we need
an extra instruction, but that should be better for general FP
reassociation and codegen. We conservatively check for "arcp" FMF
here as we do with existing fdiv folds, but it is not strictly
necessary to have that.

This is part of solving:
https://llvm.org/PR49147
(The powi variant potentially has a different constraint.)

Differential Revision: https://reviews.llvm.org/D96648
2021-02-14 08:07:36 -05:00
Juneyoung Lee 2c5c7d5feb [InstCombine] Add nonnull(select c, null, p) tests (NFC) 2021-02-14 22:03:41 +09:00
Juneyoung Lee ed253ef772 [LoopVectorize] Fix VPRecipeBuilder::createEdgeMask to correctly generate the mask
This patch fixes pr48832 by correctly generating the mask when a poison value is involved.

Consider this CFG (which is a part of the input):

```
for.body:                                         ; preds = %for.cond
  br i1 true, label %cond.false, label %land.rhs

land.rhs:                                         ; preds = %for.body
  br i1 poison, label %cond.end, label %cond.false

cond.false:                                       ; preds = %for.body, %land.rhs
  br label %cond.end

cond.end:                                         ; preds = %land.rhs, %cond.false
  %cond = phi i32 [ 0, %cond.false ], [ 1, %land.rhs ]

```

The path for.body -> land.rhs -> cond.end should be taken when 'select i1 false, i1 poison, i1 false' holds (which means it's never taken); but VPRecipeBuilder::createEdgeMask was emitting 'and i1 false, poison' instead.
The former one successfully blocks poison propagation whereas the latter one doesn't, making the condition poison and thus causing the miscompilation.

SimplifyCFG has a similar bug (which didn't expose a real-world bug yet), and a patch for this is also ongoing (see https://reviews.llvm.org/D95026).

Reviewed By: bjope

Differential Revision: https://reviews.llvm.org/D95217
2021-02-14 21:12:34 +09:00
Michael Kruse 089421ba9a [Polly] Test all optimization levels. 2021-02-14 00:31:10 -06:00
Kazu Hirata d5adba10f0 [CodeGen] Use range-based for loops (NFC) 2021-02-13 20:41:39 -08:00
Kazu Hirata dfa3ead01e [Analysis] Drop unnecessary const from return types (NFC)
Identified with readability-const-return-type.
2021-02-13 20:41:38 -08:00
Kazu Hirata d3c3045344 [TableGen] Use ListSeparator (NFC) 2021-02-13 20:41:36 -08:00
Ben Shi efb1cb752b [AVR] Fix a bug in 16-bit shifts
Reviewed By: aykevl

Differential Revision: https://reviews.llvm.org/D96590
2021-02-14 11:54:55 +08:00
Teresa Johnson 95a695bea4 [gold] Add case being tested by equivalent lld test
The new tests added by 1487747e99 for lld
and gold plugin were largely equivalent, but the gold one was missing
one of the cases added to lld. Add that test to the gold plugin version.
2021-02-13 17:09:56 -08:00
Teresa Johnson b3bafbcb18 [lld] Reorder cases in test to match comments (NFC)
The test added in 1487747e99 had a few
cases that were out of order compared to the comments. Reordered to
match.
2021-02-13 16:32:39 -08:00
Teresa Johnson a80232bd5f [LTT] Address post-review comments (NFC)
Implement some post-review cleanup suggestions for D96083.
2021-02-13 15:52:59 -08:00
Malhar 74ddacd30d [Clang] Ensure vector predication loop metadata is always emitted when pragma is specified.
This patch ensures that vector predication and vectorization width
pragmas work together correctly/as expected. Specifically, this patch
fixes the issue that when vectorization_width > 1, the vector
predication behaviour (this would matter if it has NOT been disabled
explicitly by a pragma) was getting ignored, which was incorrect.

The fix here removes the dependence of vector predication on the
vectorization width. The loop metadata corresponding to clang loop
pragma vectorize_predicate is always emitted, if the pragma is
specified, even if vectorization is disabled by vectorize_width(1)
or vectorize(disable) since the option is also used for interleaving
by the LoopVectorize pass.

Reviewed By: dmgreen, Meinersbur

Differential Revision: https://reviews.llvm.org/D94779
2021-02-13 17:35:54 -06:00
Fangrui Song 53187f1eec ELFObjectWriter: Simplify
* Delete unused ELFSymbolData::operator<
* Inline createStringTable
* Fix a comment
* Change align to return uint64_t
2021-02-13 14:52:30 -08:00
Fangrui Song 3643828b51 [CMake][mlir] Fix mlir-linalg-ods-gen/CMakeLists.txt after D96645 2021-02-13 14:16:38 -08:00
Craig Topper 3520371ddb [RISCV] Rename the RVVBaseAddr ComplexPattern to just BaseAddr and use it to merge some scalar load/store patterns too. 2021-02-13 12:01:51 -08:00
Fangrui Song 338e38b33a ELFObjectWriter: Delete redundant registerSymbol
MCELFStreamer::changeSection has registered the group signature symbol.
2021-02-13 12:01:37 -08:00
daquexian 6e31a6b7c2 fix linalg ods gen cross compiling like other gen executables
Signed-off-by: daquexian <daquexian566@gmail.com>

Reviewed By: vinograd47

Differential Revision: https://reviews.llvm.org/D96645
2021-02-13 19:17:46 +00:00
Fangrui Song 135d07fb0d [lldb][test] Fix Shell/SymbolFile/symbol-binding.test 2021-02-13 11:10:29 -08:00
Fangrui Song 962b29d716 ELFObjectWriter: Don't sort non-local symbols
As we don't sort local symbols, don't sort non-local symbols.  This makes
non-local symbols appear in their register order, which matches GNU as. The
register order is nice in that you can write tests with interleaved CHECK
prefixes, e.g.

```
// CHECK: something about foo
.globl foo
foo:
// CHECK: something about bar
.globl bar
bar:
```

With the lexicographical order, the user needs to place lexicographical smallest
symbol first or keep CHECK prefixes in one place.
2021-02-13 10:32:27 -08:00
Sanjay Patel b45fd233ad [InstCombine] add tests for pow() divisor; NFC 2021-02-13 13:04:38 -05:00
Mikhail Dvorskiy 5856f20205 [pstl] Iterator types renaming: ForwardIterator -> RandomAccessIterator; for parallel patterns/bricks
https://reviews.llvm.org/D96266
2021-02-13 20:28:50 +03:00
Nikita Popov f515ca8995 [IRBuilder] Remove Align-related deprecated APIs
This removes IRBuilder methods accepting unsigned alignments
in favor of their Align/MaybeAlign variants. These methods have
been deprecated for more than a year at this point, so they
should be safe to remove.
2021-02-13 16:42:37 +01:00
David Green 6abe362ed7 [ARM] Fix duplicate fdiv tests, changing them to frem. NFC 2021-02-13 15:16:11 +00:00
David Green 7c2e061188 [ARM] Extra vector shuffle tests of various kinds. NFC 2021-02-13 15:03:10 +00:00
Simon Pilgrim 6f5a805bbb [DAG] Fold i1/vXi1 saddsat/uaddsat(x,y) -> or(x,y)
Alive2: https://alive2.llvm.org/ce/z/FzcrpH
2021-02-13 15:02:01 +00:00
Shivam Gupta d1ef9a63a6
[NFC][Docs] Fix RAVFrontendAction doc's CMakeLists.txt for shared build
It should fix following error:

  Undefined symbols for architecture x86_64:
    "llvm::outs()", referenced from:
        FindNamedClassVisitor::VisitCXXRecordDecl(clang::CXXRecordDecl*) in FindClassDecls.cpp.o
2021-02-13 19:48:49 +05:30
Nathan James 022920c25b
[clangd] Retire clang-tidy-checks flag.
In clangd-12 the ability to override what clang tidy checks should run was moved into config.
For the 13 release its a wise progression to remove the command line option for this.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D96508
2021-02-13 14:14:22 +00:00
Stephen Kelly f2f920b987 [clang-tidy] Simplify inaccurate erase check
The normalization of matchers means that this now works in all language
modes.

Differential Revision: https://reviews.llvm.org/D96139
2021-02-13 13:51:27 +00:00
Stephen Kelly 1709bb8c73 [clang-tidy] Simplify static assert check
Differential Revision: https://reviews.llvm.org/D96223
2021-02-13 13:49:01 +00:00
Simon Pilgrim 0df15e5eff [DAG] Fold i1/vXi1 ssubsat/usubsat(x,y) -> and(x,~y)
Alive2: https://alive2.llvm.org/ce/z/4nkNGh
2021-02-13 13:21:15 +00:00
Simon Pilgrim 60ba5397df [DAG] PromoteIntRes_ADDSUBSHLSAT - use promoted ISD::USUBSAT directly
As discussed on D96413, as long as the promoted bits of the args are zero we can use the basic ISD::USUBSAT pattern directly, without the shifting like we do for other ops.

I think something similar should be possible for ISD::UADDSAT as well, which I'll look at later.

Also, create a ISD::USUBSAT node directly - this will be expanded back by the legalizer later on if necessary.

Differential Revision: https://reviews.llvm.org/D96622
2021-02-13 12:35:10 +00:00
Kadir Cetinkaya d25fbaa4a4
[clangd] Fix unsued private field warning 2021-02-13 13:20:15 +01:00
Tyker 642e9225c6 reland [InstCombine] convert assumes to operand bundles
Instcombine will convert the nonnull and alignment assumption that use the boolean condtion
to an assumption that uses the operand bundles when knowledge retention is enabled.

Differential Revision: https://reviews.llvm.org/D82703
2021-02-13 13:03:11 +01:00
Simon Pilgrim 7ad0c573bd [DAG] Fix shift amount limit in SimplifyDemandedBits trunc(shift(x,c)) to truncated bitwidth
We lost this in D56387/rG69bc0990a9181e6eb86228276d2f59435a7fae67 - where I got the src/dst bitwidths mixed up and assumed getValidShiftAmountConstant would catch it.

Patch by @craig.topper - confirmed by @Carrot that it fixes PR49162
2021-02-13 12:00:08 +00:00