53771ba07c
Dramatically speedup codegen prepare by a) avoiding use of dominator tree and b) doing a separate pass over dbg.value instructions.
...
llvm-svn: 137908
2011-08-18 00:50:51 +00:00
a90896397b
Port new Thumb1 encoding tests over to decoding tests.
...
llvm-svn: 137902
2011-08-17 23:37:33 +00:00
50aafeaa2c
Remove extraneous newline from operand print method. PR10569.
...
llvm-svn: 137900
2011-08-17 23:23:07 +00:00
1b43828958
ARM assembly parsing and encoding test for BKPT.
...
llvm-svn: 137898
2011-08-17 23:11:13 +00:00
23b729eeba
Clean up patterns for Thumb1 system instructions.
...
llvm-svn: 137897
2011-08-17 23:08:57 +00:00
e3bdcd0ea8
ARM assembly parsing and encoding test for BIC.
...
llvm-svn: 137895
2011-08-17 23:00:53 +00:00
eea541ce4e
Changed definition of EXT and INS per Bruno's comments.
...
llvm-svn: 137892
2011-08-17 22:59:46 +00:00
cbd4ab104b
Thumb assembly parsing and encoding for B.
...
llvm-svn: 137891
2011-08-17 22:57:40 +00:00
2b21d86cfe
Do not use DebugInfoFinder. Extract debug info directly from llvm.dbg.cu named mdnode.
...
llvm-svn: 137890
2011-08-17 22:49:38 +00:00
d3e8e29124
Thumb assembly parsing and encoding for ASR.
...
llvm-svn: 137889
2011-08-17 22:49:09 +00:00
9a468153e1
Atomic load/store handling for the passes using memdep (GVN, DSE, memcpyopt).
...
llvm-svn: 137888
2011-08-17 22:22:24 +00:00
1a87fcb9ba
Fix PR10688. Add support for spliting 256-bit vector shifts when the
...
shift amount is variable
llvm-svn: 137885
2011-08-17 22:12:20 +00:00
d14b70d00b
Tidy up. 80 columns.
...
llvm-svn: 137881
2011-08-17 21:58:18 +00:00
247fd3bf59
Add the support in code-gen for the landingpad instruction lowering.
...
The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION
SDNodes. The information from the landingpad instruction is harvested by the
'AddLandingPadInfo' function. The new EH uses the current EH scheme in the
back-end. This will change once we switch over to the new scheme. (Reviewed by
Jakob!)
llvm-svn: 137880
2011-08-17 21:56:44 +00:00
46dd413991
ARM clean up the imm_sr operand class representation.
...
Represent the operand value as it will be encoded in the instruction. This
allows removing the specialized encoder and decoder methods entirely. Add
an assembler match class while we're at it to lay groundwork for parsing the
thumb shift instructions.
llvm-svn: 137879
2011-08-17 21:51:27 +00:00
8bbcbedeaf
Disable PRE for landing pads.
...
PRE needs the landing pads to have their critical edges split. Doing this for a
landing pad is non-trivial. Abandon the attempt to perform PRE when we come
across a landing pad. (Reviewed by Owen!)
llvm-svn: 137876
2011-08-17 21:32:02 +00:00
a408e5bf31
Revert patch. Forgot a dependent commit.
...
llvm-svn: 137875
2011-08-17 21:28:05 +00:00
2a521948f0
Add the body of 'visitLandingPad'.
...
This generates the SDNodes for the new exception handling scheme. It takes the
two values coming from the landingpad instruction and assigns them to the
EXCEPTIONADDR and EHSELECTION nodes.
llvm-svn: 137873
2011-08-17 21:25:14 +00:00
79a6873d9c
Increment the insertion iterator to beyond the landingpad instruction.
...
llvm-svn: 137872
2011-08-17 21:21:31 +00:00
39257d6b5c
Don't optimize the landing pad exit block.
...
One way to exit the loop is through an unwind edge. However, that may involve
splitting the critical edge of the landing pad, which is non-trivial. Prevent
the transformation from rewriting the landing pad exit loop block.
llvm-svn: 137871
2011-08-17 21:20:43 +00:00
2dfbcc4506
Assert that we aren't trying to split the critical edge of a landing pad. Doing
...
so requires more care than this generic algorithm should handle.
llvm-svn: 137866
2011-08-17 21:04:05 +00:00
854fe433d4
Fix predicate for imm1_32
...
llvm-svn: 137865
2011-08-17 21:01:11 +00:00
e2a0404a69
Thumb assembly parsing and encoding for ADR.
...
llvm-svn: 137864
2011-08-17 20:37:40 +00:00
a9ee09f4be
Revert r137655. There is some question about whether the 'landingpad'
...
instruction should be marked as potentially reading and/or writing memory.
llvm-svn: 137863
2011-08-17 20:36:44 +00:00
e2d152016f
Add a couple of FIXMEs.
...
llvm-svn: 137861
2011-08-17 20:35:57 +00:00
3b5a69cc45
80 columns.
...
llvm-svn: 137857
2011-08-17 19:55:51 +00:00
8637523886
Tidy up.
...
llvm-svn: 137856
2011-08-17 19:53:53 +00:00
1cdd7fdf54
Modify for the new EH scheme.
...
Things are much saner now. We no longer need to modify the laning pads, because
of the invariants we impose upon them. The only thing DwarfEHPrepare needs to do
is convert the 'resume' instruction into a call to '_Unwind_Resume'.
llvm-svn: 137855
2011-08-17 19:48:49 +00:00
62a03c4817
Remove unneeded sentence.
...
llvm-svn: 137854
2011-08-17 19:33:27 +00:00
ad3cfe7933
Revert r137781; I agree with Duncan's comment that the situation in question is clearly impossible given the current structure of the code.
...
llvm-svn: 137853
2011-08-17 19:31:49 +00:00
b2e7558c40
Add support for half-word unaligned loads and stores.
...
llvm-svn: 137848
2011-08-17 18:49:18 +00:00
35ea5cfd46
Fix test case.
...
llvm-svn: 137847
2011-08-17 18:48:28 +00:00
ae2848ed69
Remove superficial test.
...
llvm-svn: 137846
2011-08-17 18:39:13 +00:00
3fee10b7d2
Robustify test.
...
llvm-svn: 137845
2011-08-17 18:38:44 +00:00
04bc405a29
Static fields require an out-of-line definition. Fix DynamicLibrary for real.
...
llvm-svn: 137844
2011-08-17 18:38:42 +00:00
fff6d558fc
...and make sure DynamicLibrary builds by removing "const" from the Invalid placeholder.
...
llvm-svn: 137843
2011-08-17 18:28:14 +00:00
e575902c71
Don't use NULL to represent an invalid library; Cygwin uses this for RTLD_DEFAULT. Caught by Takumi.
...
llvm-svn: 137841
2011-08-17 18:23:17 +00:00
d40d838cc4
Start building a Thumb1 decoding test file based on the Thumb1 parsing/encoding test file.
...
llvm-svn: 137840
2011-08-17 18:21:36 +00:00
187e1e46f9
Be more careful in the Thumb decoder hooks to avoid walking off the end of the OpInfo array.
...
llvm-svn: 137838
2011-08-17 18:14:48 +00:00
d7749be2d7
Silly mistake from r137777; restore significant isStructTy() checks. While here, be a bit more defensive
...
with unknown instructions.
Fixes PR10687.
llvm-svn: 137836
2011-08-17 18:10:43 +00:00
80636b48c0
Thumb assembly parsing and encoding for ADC(register) instruction.
...
llvm-svn: 137833
2011-08-17 17:55:28 +00:00
a806eebe13
Add missing '@' delimiter.
...
llvm-svn: 137832
2011-08-17 17:46:01 +00:00
184b63d09c
Move pattern matching for EXT and INS to post-legalization DAGCombine per Bruno's comment.
...
llvm-svn: 137831
2011-08-17 17:45:08 +00:00
a4043c4b32
Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
...
Patch by James Molloy.
llvm-svn: 137830
2011-08-17 17:44:15 +00:00
be5e987379
Introduce matching patterns for vbroadcast AVX instruction. The idea is to
...
match splats in the form (splat (scalar_to_vector (load ...))) whenever
the load can be folded. All the logic and instruction emission is
working but because of PR8156, there are no ways to match loads, cause
they can never be folded for splats. Thus, the tests are XFAILed, but
I've tested and exercised all the logic using a relaxed version for
checking the foldable loads, as if the bug was already fixed. This
should work out of the box once PR8156 gets fixed since MayFoldLoad will
work as expected.
llvm-svn: 137810
2011-08-17 02:29:19 +00:00
3400825b41
Update test to not use the scalar type to splat from a load
...
llvm-svn: 137809
2011-08-17 02:29:15 +00:00
6d33c7f303
Update comments about vector splat handling in x86
...
llvm-svn: 137808
2011-08-17 02:29:13 +00:00
ed786a346e
Now that we have a canonical way to handle 256-bit splats:
...
vinsertf128 $1 + vpermilps $0, remove the old code that used to first
do the splat in a 128-bit vector and then insert it into a larger one.
This is better because the handling code gets simpler and also makes a
better room for the upcoming vbroadcast!
llvm-svn: 137807
2011-08-17 02:29:10 +00:00
54cd240d0f
Update uwtable vim color!
...
llvm-svn: 137806
2011-08-17 02:29:07 +00:00
5360f88355
Add support for ext and ins.
...
llvm-svn: 137804
2011-08-17 02:05:42 +00:00
b3457c9eef
CMake: [MSVC] Suppress C4551 'function call missing argument list'.
...
(void)static_func; it is used as idiom in llvm source tree to suppress "Unused static function" warnings.
llvm-svn: 137800
2011-08-17 01:28:30 +00:00
1a3ca9201a
Unbork Windows build. Thanks, Francois.
...
llvm-svn: 137798
2011-08-17 00:59:50 +00:00
a19917da7c
Use DynamicLibrary instances as a way to get symbols from a specific library. Preparation for upcoming (preliminary) support for plugins for the static analyzer.
...
llvm-svn: 137791
2011-08-17 00:29:32 +00:00
e9ab47a72a
Thumb ADD(immediate) parsing support.
...
llvm-svn: 137788
2011-08-16 23:57:34 +00:00
91a8f9be20
Separate out Thumb1 instructions that need an S bit operand from those that do not, for the purposes of decoding them.
...
llvm-svn: 137787
2011-08-16 23:45:44 +00:00
e1df253200
An additional atomic test; related to r137662.
...
llvm-svn: 137786
2011-08-16 23:29:17 +00:00
55919a9ed7
Extend the undef ^ undef idiom once more. No testcase: I can't figure out how to actually trigger the codepath in question at the moment, but it might get exposed in the future.
...
llvm-svn: 137781
2011-08-16 22:38:34 +00:00
b7fa2c0a53
Thumb parsing diagnostics for low-reg requirements on ADD and MOV.
...
llvm-svn: 137779
2011-08-16 22:20:01 +00:00
eb1bb4e419
Until now all debug info MDNodes referred to a root MDNode, a compile unit. This simplified handling of these needs in dwarf writer. However, one side effect of this is that during link time optimization all these MDNodes are _not_ uniqued. In other words there will be N number of MDNodes describing "int", "char" and all other types, which would suddenly grow when each object file starts using libraries like STL.
...
MDNodes graph structure such that compiler unit keeps track of important MDNodes and update dwarf writer to process mdnodes top-down instead of bottom up.
llvm-svn: 137778
2011-08-16 22:09:43 +00:00
0793eb4c46
A bunch of misc fixes to SCCPSolver::ResolvedUndefsIn, including a fix to stop
...
making random bad assumptions about instructions which are not explicitly listed.
Includes fix for rdar://9956541, a version of "undef ^ undef should return
0 because it's easier than arguing with users".
llvm-svn: 137777
2011-08-16 22:06:31 +00:00
d56ba41bc3
Remove tests that have been obsoleted or migrated to clang/optimizer tests.
...
llvm-svn: 137775
2011-08-16 21:46:25 +00:00
64610e52e7
Add missing exit for 'case'.
...
llvm-svn: 137774
2011-08-16 21:42:31 +00:00
58ffdccab1
Thumb assembly parsing and encoding for ADD(register) instruction.
...
llvm-svn: 137759
2011-08-16 21:34:08 +00:00
d7c6c9141a
The resume instruction may throw. Return 'true' in this case.
...
llvm-svn: 137757
2011-08-16 21:15:50 +00:00
7283da9bb2
Move some logic into a helper function and expand the commentary.
...
llvm-svn: 137756
2011-08-16 21:12:37 +00:00
56f2f21254
Minor bug in SCCP found by inspection. (I don't think it's possible to hit this with a normal pass pipeline, but fixing for completeness.)
...
llvm-svn: 137755
2011-08-16 21:12:35 +00:00
2c21bf4b43
Add testcase for r137746.
...
llvm-svn: 137754
2011-08-16 21:11:21 +00:00
0f9fa8bddc
Increment debug info version to accommodate upcoming change in debug info node structure.
...
llvm-svn: 137751
2011-08-16 21:00:05 +00:00
d3ad0aa413
Tidy up formatting.
...
llvm-svn: 137747
2011-08-16 20:55:41 +00:00
3e941aee69
ARM thumb assembly parsing for arithmetic flag setting instructions.
...
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.
llvm-svn: 137746
2011-08-16 20:45:50 +00:00
8ddfc09e7a
Use the getFirstInsertionPt() method instead of getFirstNonPHI + an 'isa<>'
...
check for a LandingPadInst.
llvm-svn: 137745
2011-08-16 20:45:24 +00:00
ee1c2d2437
Add getFirstInsertionPt() method.
...
getFirstInsertionPt() returns an iterator to the first insertion point in a
basic block. This is after all PHIs and any other instruction which is required
to be at the top of the basic block (like LandingPadInst).
llvm-svn: 137744
2011-08-16 20:42:52 +00:00
55d875fa1c
I think there was some confusion about what I meant. :-) Replacing the comment.
...
llvm-svn: 137743
2011-08-16 20:41:17 +00:00
d152e2cc00
Prefer diagnostics from target predicate in asm matcher.
...
llvm-svn: 137742
2011-08-16 20:12:35 +00:00
345768c9ff
Remove unused Target argument from AsmParser construction methods.
...
The argument is unused, and is a layering violation in any case.
llvm-svn: 137735
2011-08-16 18:33:49 +00:00
24613e031a
Remove unused forward declaration.
...
llvm-svn: 137734
2011-08-16 18:31:36 +00:00
2e99f1b3aa
Instead of always leaving the work to the generic legalizer when
...
there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:
For this shuffle:
shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
<i32 1, i32 0, i32 7, i32 6>
This was expanded to:
vextractf128 $1, %ymm1, %xmm2
vpextrq $0, %xmm2, %rax
vmovd %rax, %xmm1
vpextrq $1, %xmm2, %rax
vmovd %rax, %xmm2
vpunpcklqdq %xmm1, %xmm2, %xmm1
vpextrq $0, %xmm0, %rax
vmovd %rax, %xmm2
vpextrq $1, %xmm0, %rax
vmovd %rax, %xmm0
vpunpcklqdq %xmm2, %xmm0, %xmm0
vinsertf128 $1, %xmm1, %ymm0, %ymm0
ret
Now we get:
vshufpd $1, %xmm0, %xmm0, %xmm0
vextractf128 $1, %ymm1, %xmm1
vshufpd $1, %xmm1, %xmm1, %xmm1
vinsertf128 $1, %xmm1, %ymm0, %ymm0
llvm-svn: 137733
2011-08-16 18:21:54 +00:00
927840458e
Remove unnecessary version check.
...
llvm-svn: 137728
2011-08-16 17:41:41 +00:00
7d7bec5acf
Add test case for r137711.
...
llvm-svn: 137725
2011-08-16 17:32:01 +00:00
45e50d8a0b
ARM .align NOP padding uses different encoding pre-ARMv6.
...
Patch by Kristof Beyls and James Malloy.
llvm-svn: 137723
2011-08-16 17:06:20 +00:00
5de2044f3d
Tidy up. Trailing whitespace.
...
llvm-svn: 137721
2011-08-16 16:38:17 +00:00
b66b866f46
Revert r137562 because it caused PR10674
...
llvm-svn: 137719
2011-08-16 14:34:29 +00:00
719a72f34c
Add a mechanism for optimisation plugins to register passes that all front ends can use without needing to be aware of the plugin (or the plugin be aware of the front end).
...
Before 3.0, I'd like to add a mechanism for automatically loading a set of plugins from a config file. API suggestions welcome...
llvm-svn: 137717
2011-08-16 13:58:41 +00:00
0e6ed55712
Remove unimplemented method. Fixes PR10658.
...
Thanks to Jonas Gafele for noticing.
llvm-svn: 137716
2011-08-16 13:53:50 +00:00
46568bdb6e
cmake/modules/FindBison.cmake: It must be unneeded any more.
...
llvm-svn: 137715
2011-08-16 11:10:54 +00:00
be33e8d58d
A few places where we want to skip the landingpad instruction for insertion.
...
llvm-svn: 137712
2011-08-16 04:52:55 +00:00
2263c10946
Fix handling of double precision loads and stores when Mips1 is targeted.
...
Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.
Without the changes made in this patch, llc produces code that has the same
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.
llvm-svn: 137711
2011-08-16 03:51:51 +00:00
77f1fd5e44
Define function MipsMCInstLower::LowerOperand.
...
llvm-svn: 137707
2011-08-16 02:21:03 +00:00
6520b9857f
Add parameter Offset to MipsMCInstLower::LowerSymbolOperand.
...
llvm-svn: 137706
2011-08-16 02:15:03 +00:00
ac992afd93
Fix test.
...
llvm-svn: 137703
2011-08-16 01:42:56 +00:00
a917d4f9b4
Revert a bit of r137667; the logic in question can safely handle atomic load/store.
...
llvm-svn: 137702
2011-08-16 01:28:22 +00:00
5403862ab7
Migrate this test from llvm/test/FrontendC++/ptr-to-method-devirt.cpp and
...
FileCheckize. It is more properly an optimizer test.
llvm-svn: 137700
2011-08-16 01:17:17 +00:00
bd39703456
After talking with Bill, it seems like the LandingPad handling here is likely
...
to be wrong (or at least somewhat suspect). Leave a FIXME for Bill.
llvm-svn: 137694
2011-08-16 00:41:37 +00:00
b8f30de527
Minor comment fixes.
...
llvm-svn: 137693
2011-08-16 00:20:11 +00:00
0ffdf2ea0b
Update SimplifyCFG for atomic operations.
...
This commit includes a mention of the landingpad instruction, but it's not
changing the behavior around it. I think the current behavior is correct,
though. Bill, can you double-check that?
llvm-svn: 137691
2011-08-15 23:59:28 +00:00
01a67111d1
Add comments and test for atomic load/store and mem2reg.
...
llvm-svn: 137690
2011-08-15 23:55:52 +00:00
07bb9eea33
Refactor.
...
llvm-svn: 137689
2011-08-15 23:47:24 +00:00
53440984b3
Add a test file for Thumb2 NEON.
...
llvm-svn: 137687
2011-08-15 23:42:20 +00:00
a6201f0a72
Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the Thumb2 NEON decoding hooks to bring us closer to correctness.
...
llvm-svn: 137686
2011-08-15 23:38:54 +00:00
c1676e41c0
While I'm here, remove the "_alt" hacks to a series of INSERT_SUBREG and
...
also add the AVX versions of the 128-bit patterns
llvm-svn: 137685
2011-08-15 23:36:51 +00:00
67005029bc
Reorder declarations of vmovmskp* and also put the necessary AVX
...
predicate and TB encoding fields. This fix the encoding for the
attached testcase. This fixes PR10625.
llvm-svn: 137684
2011-08-15 23:36:45 +00:00
1f4f98d664
Continue to hoist uses of getCompileUnit() up. The goal is to get rid of uses of getCompileUnit().
...
llvm-svn: 137683
2011-08-15 23:36:40 +00:00
aecb7501ad
Avoid evaluating Neon macro arguments more than once by disabling type checks.
...
It turns out that the use of "__extension__" in these macros was disabling
the expected "incompatible pointer" warnings, so these type checks were not
doing anything anyway. They introduced a serious bug by evaluating some
macro arguments twice, which is a big problem for arguments with side effects.
I'll have to find another way to get the right type checking. Radar 9947657.
llvm-svn: 137680
2011-08-15 23:22:56 +00:00
5a18b7c7c7
In places where it's using "getFirstNonPHI", skip the landingpad instruction if necessary.
...
llvm-svn: 137679
2011-08-15 23:19:54 +00:00
120a96a721
MCTargetAsmParser target match predicate support.
...
Allow a target assembly parser to do context sensitive constraint checking
on a potential instruction match. This will be used, for example, to handle
Thumb2 IT block parsing.
llvm-svn: 137675
2011-08-15 23:03:29 +00:00
2b8acaf4f3
Add a finalize() hook, that'll let DIBuilder construct compile unit lazily.
...
llvm-svn: 137673
2011-08-15 23:00:00 +00:00
91d4e9edec
Don't sink the instruction to before a landingpad instruction.
...
llvm-svn: 137672
2011-08-15 22:53:05 +00:00
d2dfc5ec02
This is somewhat déjà-vu, but avoid using getCompileUnit() as much as possible.
...
llvm-svn: 137668
2011-08-15 22:24:32 +00:00
211e348eaa
Update inter-procedural optimizations for atomic load/store.
...
llvm-svn: 137667
2011-08-15 22:16:46 +00:00
8bc586e770
Update instcombine for atomic load/store.
...
llvm-svn: 137664
2011-08-15 22:09:40 +00:00
3acc70e536
Refactor. Variables are part of compile unit so let CompileUnit create new variable.
...
llvm-svn: 137663
2011-08-15 22:04:40 +00:00
4419cd2464
Add some comments here because the lack of a check for volatile/atomic here is a bit unusual.
...
llvm-svn: 137662
2011-08-15 21:56:39 +00:00
cbe7feeab9
Fix PR10656. It's only profitable to use 128-bit inserts and extracts
...
when AVX mode is one. Otherwise is just more work for the type
legalizer.
llvm-svn: 137661
2011-08-15 21:45:54 +00:00
d899444347
There is no need to maintain a set to keep track of variables that use location expressions. In such cases, AT_location attribute's value will be a label.
...
llvm-svn: 137659
2011-08-15 21:43:21 +00:00
900d97719b
Fix warning.
...
llvm-svn: 137658
2011-08-15 21:35:16 +00:00
5286bd2d01
Add some more comprehensive VFP decoding tests.
...
llvm-svn: 137657
2011-08-15 21:29:01 +00:00
3e4a965519
Simplify. Let DbgVariable keep track of variable's DBG_VALUE machine instruction.
...
llvm-svn: 137656
2011-08-15 21:24:36 +00:00
e86965ee19
Duncan pointed out that the LandingPadInst might read memory. (It might also
...
write to memory.) Marking it as such makes some checks for immobility go away.
llvm-svn: 137655
2011-08-15 21:14:31 +00:00
4d05198d1f
Fix llvm::CloneModule to correctly clone globals. Patch per bug report by Simon Moll on llvmdev.
...
llvm-svn: 137654
2011-08-15 21:05:06 +00:00
b9d5a63c86
Fix predicates methods on Instruction to handle atomic load/store correctly.
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llvm-svn: 137652
2011-08-15 21:00:18 +00:00
8c5f3f7624
Fix this test to avoid leaving a temporary file behind.
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llvm-svn: 137651
2011-08-15 20:55:03 +00:00
5494adac67
Misc analysis passes that need to be aware of atomic load/store.
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llvm-svn: 137650
2011-08-15 20:54:19 +00:00
b59abbd4fd
Move MatchResultTy enum into base class definition.
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No need for it to be redefined as part of every derived target asm parser
class.
llvm-svn: 137649
2011-08-15 20:53:08 +00:00
91386c7be4
Atomic load/store support in LICM.
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llvm-svn: 137648
2011-08-15 20:52:09 +00:00
1d5d2cac8c
Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact.
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Patch by James Molloy.
llvm-svn: 137647
2011-08-15 20:51:32 +00:00
990dd3d0fb
Add an ipsccp test. Migrated from test/FrontendC++.
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llvm-svn: 137646
2011-08-15 20:50:36 +00:00
944f4923a4
Add a test for Thumb1 LDRSH decoding.
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llvm-svn: 137645
2011-08-15 20:15:43 +00:00
f746b0ec53
Add testcase for STRH. Patch by James Molloy.
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llvm-svn: 137644
2011-08-15 20:12:03 +00:00
de25f9aa8f
Remove dead classes.
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llvm-svn: 137643
2011-08-15 20:11:11 +00:00
d9fb470758
The "landingpad" instruction will never be "trivially" dead.
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llvm-svn: 137642
2011-08-15 20:10:51 +00:00
61a3ece665
Fix incorrect encoding of UMAAL and friends. Patch by James Molloy.
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llvm-svn: 137641
2011-08-15 20:08:25 +00:00
99819b527d
Simplify mapping to variable from its abstract variable info.
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When a variable is inlined multiple places, abstract variable keeps name, location, type etc.. info and all other concreate instances of the variable directly refers to abstract variable.
llvm-svn: 137637
2011-08-15 19:01:20 +00:00
3157f2eebe
Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy.
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llvm-svn: 137636
2011-08-15 19:00:06 +00:00
b9d82f411c
Fix problems decoding the to/from-lane NEON memory instructions, and add a comprehensive NEON decoding testcase.
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llvm-svn: 137635
2011-08-15 18:44:44 +00:00
d7d80aadd1
Refactor.
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llvm-svn: 137632
2011-08-15 18:40:16 +00:00
6e4d2c9fb7
Refactor.
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llvm-svn: 137631
2011-08-15 18:35:42 +00:00
dd94d3426b
Don't try to sink the landingpad instruction. It's immobile.
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llvm-svn: 137629
2011-08-15 18:23:40 +00:00
9af5b22b76
The landingpad instruction isn't loop-invariant.
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llvm-svn: 137628
2011-08-15 18:22:49 +00:00
88294cdbe0
Mark the SCC as "might unwind" if we run into a 'resume' instruction.
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llvm-svn: 137627
2011-08-15 18:22:00 +00:00
b9c0e0db53
Skip the insertion iterator past the landingpad instruction if there.
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llvm-svn: 137626
2011-08-15 18:21:07 +00:00
dfd6ec3ce1
Refactor. Global variables are part of compile unit so let CompileUnit create new global variable.
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llvm-svn: 137621
2011-08-15 17:57:41 +00:00
ccf5233ae8
Tidy up trailing whitespace.
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llvm-svn: 137619
2011-08-15 17:30:25 +00:00
895437142a
Refactor. A subprogram is part of compile unit so let CompileUnit construct new subprogram.
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llvm-svn: 137618
2011-08-15 17:24:54 +00:00
30694dcdeb
Update comment to reflect MC target machine refactor.
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llvm-svn: 137615
2011-08-15 16:52:24 +00:00
55421f0c4d
Add inlining for the new EH scheme.
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This builds off of the current scheme, but instead of llvm.eh.exception and
llvm.eh.selector, it uses the landingpad instruction. And instead of
llvm.eh.resume, it uses the resume instruction.
Because of the invariants in the landing pad instruction, a lot of code that's
currently needed to find the appropriate intrinsic calls for an invoke
instruction won't be needed once we go to the new EH scheme. The "FIXME"s tell
us what to remove after we switch.
llvm-svn: 137576
2011-08-14 08:01:36 +00:00
746e317953
This transform is not safe. Thanks to Eli for pointing that out!
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llvm-svn: 137575
2011-08-14 04:51:49 +00:00
ae13df60a6
Don't attempt to add 'nsw' when intermediate instructions had no such guarantee.
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llvm-svn: 137572
2011-08-14 03:41:33 +00:00
de49278c26
Teach instcombine to preserve the nsw bit by doing an after-the-fact analysis
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when combining add and sub instructions. Patch by Pranav Bhandarkar!
llvm-svn: 137570
2011-08-14 01:45:19 +00:00
45620380b5
EE: Provide the symbol "lseek64" explicitly with <unistd.h> on Linux glibc.
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With libcxx, it seems <unistd.h> would not be provided. Thanks to Ryuta Suzuki.
llvm-svn: 137567
2011-08-14 00:34:04 +00:00
6858b344ed
Fix PR 10635. When generating integer constants, the constant element type may
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be illegal, even if the requested vector type is legal. Testcase is one of the
disabled ARM tests in the vector-select patch.
llvm-svn: 137562
2011-08-13 20:31:45 +00:00
9f56acc124
Fix test.
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llvm-svn: 137556
2011-08-13 17:06:34 +00:00
d1de7764be
Expand VMOVQQQQ pseudo instructions.
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Apparently we never added code to expand these pseudo instructions, and in
over a year, no one has noticed. Our register allocator must be awesome!
llvm-svn: 137551
2011-08-13 05:14:55 +00:00
2be81acd77
Remove the last improper use of getGlobalContext() from LLVM.
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This caused a race condition where a thread calls ~LLVMContextImpl which calls
Module::dropAllReferences which calls begin() on an empty ilist that would
create the sentinel, which racily accesses the global context.
This can not be fixed by locking inside createSentinel because the lock would
need to be shared with all users of the global context, including those that
reside outside LLVM's own code.
llvm-svn: 137546
2011-08-13 01:04:44 +00:00
d8874dc1d6
Fix the getelementptr description so it is extremely clear that array indices passed to getelementptr are signed.
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llvm-svn: 137538
2011-08-12 23:37:55 +00:00
02e737b08e
Move "atomic" and "volatile" designations on instructions after the opcode
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of the instruction.
Note that this change affects the existing non-atomic load and store
instructions; the parser now accepts both forms, and the change is noted
in the release notes.
llvm-svn: 137527
2011-08-12 22:50:01 +00:00
2325474368
ARM STR_POST_IMM offset encoding fix in load/store optimizer.
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Tidy up the code a bit and push the definition of the value next to the uses
to try to minimize this sort of issue from arising again while I'm at it.
rdar://9945172
llvm-svn: 137525
2011-08-12 22:20:41 +00:00
c53dd2ac01
Fix comment!
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llvm-svn: 137521
2011-08-12 21:54:42 +00:00
c13f05c978
Some reorganization of atomic docs. Added explicit section for NonAtomic. Added example for illegal non-atomic operation.
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llvm-svn: 137520
2011-08-12 21:50:54 +00:00
f15dfe5818
The VPERM2F128 is a AVX instruction which permutes between two 256-bit
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vectors. It operates on 128-bit elements instead of regular scalar
types. Recognize shuffles that are suitable for VPERM2F128 and teach
the x86 legalizer how to handle them.
llvm-svn: 137519
2011-08-12 21:48:26 +00:00
960c8f71aa
Move code around and add comments
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llvm-svn: 137518
2011-08-12 21:48:22 +00:00
2fcc1cfdce
Define unaligned load and store.
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llvm-svn: 137515
2011-08-12 21:30:06 +00:00
f402f694e2
ARM expansion of pre-indexed store pseudos should maintain memoperands.
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Partial fix for rdar://9945172.
llvm-svn: 137513
2011-08-12 21:02:34 +00:00
a52aa3c18f
Add checks for the landingpad instruction's clause values to make sure that
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they're the correct type.
llvm-svn: 137511
2011-08-12 20:52:25 +00:00
2d1d7a11f8
Fix some remaining issues with decoding ARM-mode memory instructions, and add another batch of tests.
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llvm-svn: 137502
2011-08-12 20:36:11 +00:00
fae1475823
Initial commit of the 'landingpad' instruction.
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This implements the 'landingpad' instruction. It's used to indicate that a basic
block is a landing pad. There are several restrictions on its use (see
LangRef.html for more detail). These restrictions allow the exception handling
code to gather the information it needs in a much more sane way.
This patch has the definition, implementation, C interface, parsing, and bitcode
support in it.
llvm-svn: 137501
2011-08-12 20:24:12 +00:00
60138eaf93
Fix decoding of ARM-mode STRH.
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llvm-svn: 137499
2011-08-12 20:02:50 +00:00
30e697ebaf
apparently variable naming conventions never got added, document the
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prevailing convention. Thanks to Dave Zarzycki for the patch.
llvm-svn: 137497
2011-08-12 19:49:16 +00:00
2c945b3d88
minor typo
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llvm-svn: 137496
2011-08-12 19:48:19 +00:00
ed6d3e813e
Port over the basic ARM encodings test file to a decoding test file. Greatly increases our test coverage of basic ARM-mode instructions.
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llvm-svn: 137495
2011-08-12 19:42:45 +00:00
1043e173bc
Specify fixed bit in the LDRBT encoding, which allows us to distinguish it from certain USAT16 encodings.
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llvm-svn: 137494
2011-08-12 19:41:29 +00:00
ede5857203
Constify.
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llvm-svn: 137489
2011-08-12 18:18:02 +00:00
3253173c34
fix one reference that slipped through, thanks Eli
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llvm-svn: 137488
2011-08-12 18:12:40 +00:00
3987a61c16
Fix decoding of pre-indexed stores.
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llvm-svn: 137487
2011-08-12 18:12:39 +00:00
2f6b944f56
Test case for 137484
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llvm-svn: 137486
2011-08-12 18:12:06 +00:00
444034783e
Use ArrayRef.
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llvm-svn: 137485
2011-08-12 18:10:19 +00:00
7bd6e6ebef
When constant double 0.0 is lowered, make sure 0 is copied directly from an
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integer register to a floating point register. It is not valid to interpret
the value of a floating pointer register as part of a double precision
floating point value after a single precision floating point computational
or move instruction stores its result to the register.
- In the test case, the following code is generated before this patch is
applied:
mtc1 $zero, $f2 ; unformatted copy to $f2
mov.s $f0, $f2 ; $f0 is in single format
sdc1 $f12, 0($sp)
mov.s $f1, $f2 ; $f1 is in single format
c.eq.d $f12, $f0 ; $f0 cannot be interpreted as double
- The following code is generated after this patch is applied:
mtc1 $zero, $f0 ; unformatted copy to $f0
mtc1 $zero, $f1 ; unformatted copy to $f1
c.eq.d $f12, $f0 ; $f0 can be interpreted as double
Bhanu Chetlapalli and Chris Dearman at MIPS technologies reported this bug and
provided the test case.
llvm-svn: 137484
2011-08-12 18:09:59 +00:00
a585102d3e
add ifdef's to let people easily remove these dead api for testing.
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llvm-svn: 137483
2011-08-12 18:08:19 +00:00
44f7ab4544
switch to the new struct api.
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llvm-svn: 137482
2011-08-12 18:07:26 +00:00
01becebef3
switch to the new struct apis.
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llvm-svn: 137481
2011-08-12 18:07:07 +00:00
335d399a0e
switch to use the new api for structtypes.
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llvm-svn: 137480
2011-08-12 18:06:37 +00:00
2f50231c10
forward to the correct constructor.
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llvm-svn: 137479
2011-08-12 18:03:30 +00:00
db4374a28a
Provide fast path as Jakob suggested.
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llvm-svn: 137478
2011-08-12 18:01:34 +00:00
c5798a3a59
Separate decoding for STREXD and LDREXD to make each work better.
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llvm-svn: 137476
2011-08-12 17:58:32 +00:00
d1b60f7a6d
Tidy up formatting.
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llvm-svn: 137471
2011-08-12 17:43:31 +00:00
8a2f747546
add two missing function impls
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llvm-svn: 137470
2011-08-12 17:43:05 +00:00
190552d3e0
add new accessors to reflect new terminology in struct types.
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llvm-svn: 137468
2011-08-12 17:31:02 +00:00
45fc2a6a9b
Fix bugpoint fallout from the new type system.
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llvm-svn: 137467
2011-08-12 17:25:45 +00:00
62da15a330
Revert r137310 because it does not optimize any code on ToT
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llvm-svn: 137466
2011-08-12 17:15:04 +00:00
234317d12a
Tidy up formatting.
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llvm-svn: 137464
2011-08-12 17:01:02 +00:00
75ec09c0e3
Whitespace and formatting. No functional change intended.
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llvm-svn: 137463
2011-08-12 16:45:18 +00:00
a41634e307
Silence a bunch (but not all) "variable written but not read" warnings
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when building with assertions disabled.
llvm-svn: 137460
2011-08-12 14:54:45 +00:00
5dd4132ab8
docs/GettingStarted.html: [Git] Add instructions how to generate patchset with Git.
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llvm-svn: 137444
2011-08-12 07:48:06 +00:00
d92a5fe2fb
docs/GettingStarted.html: [Git] Mention branch.master.rebase for the tracking branch.
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Thanks to Jeff Yasskin to reword.
llvm-svn: 137443
2011-08-12 07:48:01 +00:00
d9b1c6ecd0
docs/GettingStarted.html: [Git] Split the subsubsection for committer's section.
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llvm-svn: 137442
2011-08-12 07:47:55 +00:00
6bdfe91e01
.gitignore: Ignore /autom4te.cache. We can execute "PATH=/path/to/autotools/bin autoconf/AutoRegen.sh".
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llvm-svn: 137441
2011-08-12 07:47:50 +00:00
0300d88af5
docs: Update HTML markup(s).
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llvm-svn: 137433
2011-08-12 06:17:17 +00:00
8e01926b24
docs/llvm.css: Introduce <blockquote><pre>. It may be used as blockquoted "doc_code".
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llvm-svn: 137432
2011-08-12 06:17:11 +00:00
1ec8114eb8
Fix an obscure bug in PointerUnion that would bite PointerUnion3/4. Basically,
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when checking isNull(), we'd pick off the sentinel bit for the outer
PointerUnion, but would not recursively convert the inner pointerunion to bool,
so if *its* sentinel bit is set, isNull() would incorrectly return false.
No testcase, because someone hit this when they were trying to refactor code
to use PointerUnion3, but they since found a better solution.
llvm-svn: 137428
2011-08-12 04:31:38 +00:00
4826b7f13a
Misc atomic doc tweaks; reordering operations across Acquire/Release can be beneficial.
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llvm-svn: 137425
2011-08-12 03:38:32 +00:00
4e5ad1713a
include/llvm/Config/config.h.cmake: Reorder to follow config.h.in, and import stuff from llvm-config.h.cmake and clang/config.h.
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llvm-svn: 137424
2011-08-12 03:27:54 +00:00
Devang Patel