Commit Graph

9093 Commits

Author SHA1 Message Date
Hsiangkai Wang d93ffa1b37 [docs] Fix typo in the example code in ProgrammersManual.
Differential Revision: https://reviews.llvm.org/D117665
2022-01-20 01:25:49 +00:00
Hsiangkai Wang 70cef70b13 [docs] Put define DEBUG_TYPE after include directives.
Differential Revision: https://reviews.llvm.org/D117666
2022-01-20 01:18:35 +00:00
Luís Marques 771613295d [docs][lli] Fix lli rst docs formatting
Differential Revision: https://reviews.llvm.org/D109092
2022-01-19 21:54:15 +00:00
Fraser Cormack b8cb79404b [LangRef] Mangle all vector operands in insert/extract intrinsics
This better matches the canonical mangling of these intrinsics.

Reviewed By: peterwaller-arm

Differential Revision: https://reviews.llvm.org/D117675
2022-01-19 15:23:15 +00:00
Chuanqi Xu c8ecf12bc3 [Coroutines] Offering llvm.coro.align intrinsic
It is a known problem that we can't align the switch-based coroutine
frame if the alignment exceeds std::max_align_t (which is 16 usually).

We could solve the problem on the middle-end by dynamically transforming
or in the frontend by emitting aligned allocation function.

If we need to solve it in the frontend, the middle end need to offer an
intrinsic to tell the alignment at least. This patch tries to offer such
an intrinsic called llvm.coro.align.

Reviewed By: https://reviews.llvm.org/D117542

Differential revision: https://reviews.llvm.org/D117542
2022-01-19 09:52:45 +08:00
minglotus-6 76b74236c7 Update bitcode format doc to mention that a multi-module bitcode file is
valid.

Differential Revision: https://reviews.llvm.org/D117067
2022-01-18 17:49:34 -08:00
Philip Reames 17beee44e1 [LangRef] Clarify that inaccessiblememonly functions are allowed noalias returns
Confusion over this point came up in a couple of recent changes (D117180, e20b32ff3). Current tone of discussion seems to be that we think inaccessiblememonly was always legal on allocation functions, so this change takes the form of a clarification instead of a change.

Differential Revision: https://reviews.llvm.org/D117571
2022-01-18 14:47:46 -08:00
Fraser Cormack c8e33978fb [VP] Propagate align parameter attr on VP gather/scatter to ISel
This patch fixes a case where the 'align' parameter attribute on the
pointer operands to llvm.vp.gather and llvm.vp.scatter was being dropped
during the conversion to the SelectionDAG. The default alignment equal
to the ABI type alignment of the vector type was kept. It also updates
the documentation to reflect the fact that the parameter attribute is
now properly supported.

The default alignment of these intrinsics was previously documented as
being equal to the ABI alignment of the *scalar* type, when in fact that
wasn't the case: the ABI alignment of the vector type was used instead.
This has also been fixed in this patch.

Reviewed By: simoll, craig.topper

Differential Revision: https://reviews.llvm.org/D114423
2022-01-18 17:33:24 +00:00
Tony Tye 8ba5043dbf [AMDGPU][NFC] Add DWARF extension support for SIMD execution
- Add current iteration to the context of a DWARF expression evaluation.
- Add DW_AT_LLVM_iterations attribute to specify the number of
  iterations executing concurrently.
- Add DF_OP_LLVM_push_iteration to support optimizations that result in
  multiple iterations executing concurrently.
- Add DW_OP_LLVM_overlay and DW_OP_LLVM_bit_overlay to support
  expressing the location of arrays that are promoted to vector
  registers in SIMD vectorized loops.
- Generally clarify the difference between SIMT and SIMD execution.
- Change the DW_AT_LLVM_active_lane attribute to take location
  description expression so that a loclist can be used to express
  different vales at different program locations.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D117572
2022-01-18 17:36:39 +00:00
Dmitry Preobrazhensky c7ca4c6365 [AMDGPU][GFX10][MC] Updated symbolic names of internal HW registers
GFX10 no longer support HW_ID. It has been replaced with HW_ID1 and HW_ID2.
See bug 52904: https://github.com/llvm/llvm-project/issues/52904

Differential Revision: https://reviews.llvm.org/D117313
2022-01-17 20:29:10 +03:00
Nikita Popov a2261e399a [Docs] Use anonymous reference (NFC)
Hopefully fixes the build failure. Also fix a typo.
2022-01-14 18:01:06 +01:00
Nikita Popov 3bbf7f5ed8 [Docs] Update opaque pointer docs (NFC)
Mention -opaque-pointers, write a bit more about migration pitfalls
and update the open issues.
2022-01-14 17:42:43 +01:00
Hans Wennborg 2bc57d85eb Don't override __attribute__((no_stack_protector)) by inlining (PR52886)
Since 26c6a3e736, LLVM's inliner will "upgrade" the caller's stack protector
attribute based on the callee. This lead to surprising results with Clang's
no_stack_protector attribute added in 4fbf84c173 (D46300). Consider the
following code compiled with clang -fstack-protector-strong -Os
(https://godbolt.org/z/7s3rW7a1q).

  extern void h(int* p);

  inline __attribute__((always_inline)) int g() {
    return 0;
  }

  int __attribute__((__no_stack_protector__)) f() {
    int a[1];
    h(a);
    return g();
  }

LLVM will inline g() into f(), and f() would get a stack protector, against the
users explicit wishes, potentially breaking the program e.g. if h() changes the
value of the stack cookie. That's a miscompile.

More recently, bc044a88ee (D91816) addressed this problem by preventing
inlining when the stack protector is disabled in the caller and enabled in the
callee or vice versa. However, the problem remained if the callee is marked
always_inline as in the example above. This affected users, see e.g.
http://crbug.com/1274129 and http://llvm.org/pr52886.

One way to fix this would be to prevent inlining also in the always_inline
case. Despite the name, always_inline does not guarantee inlining, so this
would be legal but potentially surprising to users.

However, I think the better fix is to not enable the stack protector in a
caller based on the callee. The motivation for the old behaviour is unclear, it
seems counter-intuitive, and causes real problems as we've seen.

This commit implements that fix, which means in the example above, g() gets
inlined into f() (also without always_inline), and f() is emitted without stack
protector. I think that matches most developers' expectations, and that's also
what GCC does.

Another effect of this change is that a no_stack_protector function can now be
inlined into a stack protected function, e.g. (https://godbolt.org/z/hafP6W856):

  extern void h(int* p);

  inline int __attribute__((__no_stack_protector__)) __attribute__((always_inline)) g() {
    return 0;
  }

  int f() {
    int a[1];
    h(a);
    return g();
  }

I think that's fine. Such code would be unusual since no_stack_protector is
normally applied to a program entry point which sets up the stack canary. And
even if such code exists, inlining doesn't change the semantics: there is still
no stack cookie setup/check around entry/exit of the g() code region, but there
may be in the surrounding context, as there was before inlining. This also
matches GCC.

See also the discussion at https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94722

Differential revision: https://reviews.llvm.org/D116589
2022-01-13 12:04:49 +01:00
Sebastian Neubauer f4139440f1 [Docs] Fix IR and TableGen grammar inconsistencies
IR:
- globals (and functions, ifuncs, aliases) can have a partition
- catchret has a `to` before the label
- the sint/int types do not exist
- signext comes after the type
- a variable was missing its type

TableGen:
- The second value after a `#` concatenation is optional
  See e.g. llvm/lib/Target/X86/X86InstrAVX512.td:L3351
- IncludeDirective and PreprocessorDirective were never referenced in
  the grammar
- Add some missing ;
- Parent classes of multiclasses can have generic arguments.
  Reuse the `ParentClassList` that is already used in other places.

MIR:
- liveins only allows physical registers, which start with a $

Differential Revision: https://reviews.llvm.org/D116674
2022-01-13 11:55:13 +01:00
Pietro Albini c8c3021e9f Update Pietro Albini's employer
Differential Revision: https://reviews.llvm.org/D117027
2022-01-12 14:46:06 +01:00
Simon Moll 33efbc8184 [VP] llvm.vp.merge intrinsic and LangRef
llvm.vp.merge interprets the %evl operand differently than the other vp
intrinsics: all lanes at positions greater or equal than the %evl
operand are passed through from the second vector input. Otherwise it
behaves like llvm.vp.select.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D116725
2022-01-12 14:06:56 +01:00
Patrick Holland 85e6e748d4 [MCA] Switching from conservatively guessing which instructions are
memory-barrier instructions to providing targets and developers a convenient
way to explicitly declare which instructions are memory-barriers.

Differential Revision: https://reviews.llvm.org/D116779
2022-01-11 13:50:14 -08:00
Dimitry Andric 593b4d7a1c [Nomination] Adding Intel representatives to security group
We would like to nominate Andy Kaylor and Sergey Maslov to join the LLVM security group as a representative of Intel.  Both are members of the Intel compiler team, and would like to register as vendor contacts.  Intel packages and distributes LLVM-based toolchains as part of our compiler products.   As such, we would like to be aware of any security vulnerability found in the compiler, and would like to contribute to the resolution of such issues.

Please let us know if anything is missing from the nomination.

Reviewed By: apilipenko, dim, george.burgess.iv, kristof.beyls, mattdr, nikhgupt, probinson, peter.smith, pietroalbini, steveklabnik

Differential Revision: https://reviews.llvm.org/D115657
2022-01-11 17:30:44 +01:00
David Spickett 88fdce5be6 [lldb] Remove non address bits from memory read arguments
Addresses on AArch64 can have top byte tags, memory tags and pointer
authentication signatures in the upper bits.

While testing memory tagging I found that memory read couldn't
read a range if the two addresses had different tags. The same
could apply to signed pointers given the right circumstance.

(lldb) memory read mte_buf_alt_tag mte_buf+16
error: end address (0x900fffff7ff8010) must be greater than the start
address (0xa00fffff7ff8000).

Or it would try to read a lot more memory than expected.

(lldb) memory read mte_buf mte_buf_alt_tag+16
error: Normally, 'memory read' will not read over 1024 bytes of data.
error: Please use --force to override this restriction just once.
error: or set target.max-memory-read-size if you will often need a
larger limit.

Fix this by removing non address bits before we calculate the read
range. A test is added for AArch64 Linux that confirms this by using
the top byte ignore feature.

This means that if you do read with a tagged pointer the output
does not include those tags. This is potentially confusing but I think
overall it's better that we don't pretend that we're reading memory
from a range that the process is unable to map.

(lldb) p ptr1
(char *) $4 = 0x3400fffffffff140 "\x80\xf1\xff\xff\xff\xff"
(lldb) p ptr2
(char *) $5 = 0x5600fffffffff140 "\x80\xf1\xff\xff\xff\xff"
(lldb) memory read ptr1 ptr2+16
0xfffffffff140: 80 f1 ff ff ff ff 00 00 38 70 bc f7 ff ff 00 00  ........8p......

Reviewed By: omjavaid, danielkiss

Differential Revision: https://reviews.llvm.org/D103626
2022-01-11 13:24:09 +00:00
David Sherwood 51497dc0b2 [IR] Change vector.splice intrinsic to reject out-of-bounds indices
I've changed the definition of the experimental.vector.splice
instrinsic to reject indices that are known to be or possibly
out-of-bounds. In practice, this means changing the definition so that
the index is now only valid in the range [-VL, VL-1] where VL is the
known minimum vector length. We use the vscale_range attribute to
take the minimum vscale value into account so that we can permit
more indices when the attribute is present.

The splice intrinsic is currently only ever generated by the vectoriser,
which will never attempt to splice vectors with out-of-bounds values.
Changing the definition also makes things simpler for codegen since we
can always assume that the index is valid.

This patch was created in response to review comments on D115863

Differential Revision: https://reviews.llvm.org/D115933
2022-01-11 09:37:39 +00:00
Keith Smiley bfeb92cb9c docs: update some bug tracker references (NFC)
Fixes https://github.com/llvm/llvm-project/issues/53091

Differential Revision: https://reviews.llvm.org/D116898
2022-01-10 15:59:08 -08:00
Martin Storsjö 392aa97acc [llvm-objcopy] Implement the PE-COFF specific --subsystem option
This implements the parsing of the highly PE-COFF specific option
in ConfigManager.cpp, setting Optional<> values in COFFConfig, which
then are used in COFFObjcopy.

This should fix https://github.com/mstorsjo/llvm-mingw/issues/239.

Differential Revision: https://reviews.llvm.org/D116556
2022-01-10 14:44:15 +02:00
Tanya Lattner 645c845d45 Add first draft of the discourse migration guide. 2022-01-07 20:24:35 -08:00
John Ericson feeff8a37c [llvm] Use `GNUInstallDirs` to support custom installation dirs
This is the patch for LLVM proper in my series for adding GNUInstallDirs support in all project.

Additionally:

Create a new `CACHE STRING` variable, `LLVM_EXAMPLES_INSTALL_DIR`, to control where the examples are installed on analogy with the other variables.

---

This patch supersedes D28234, which tried to do the same thing but hand-rolled without GNUInstallDirs.

This patch nearly reverts commit 3 0fc88bf1dc15a72e2d9809d28019d386b7a7cc0, which was a revert of a prior attempt."

(I had to add a space here or else Phabricator detects a reference cycle and won't let me do the form submit.)

Reviewed By: compnerd

Differential Revision: https://reviews.llvm.org/D100810
2022-01-08 00:47:31 +00:00
Chuanqi Xu bbce75e352 Update Bug report URL to Github Issues
Although we moved to Github Issues. The bug report message refers to
Bugzilla still. This patch tries to update these URLs.

Reviewed By: MaskRay, Quuxplusone, jhenderson, libunwind, libc++

Differential Revision: https://reviews.llvm.org/D116351
2022-01-06 17:33:25 +08:00
Luís Ferreira 34435fd105 [llvm] Add support for DW_TAG_immutable_type
Added documentation about DW_TAG_immutable_type too.

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D113633
2022-01-05 19:17:08 +00:00
Chuanqi Xu c75cedc237 [Coroutines] Set presplit attribute in Clang and mlir
This fixes bug49264.

Simply, coroutine shouldn't be inlined before CoroSplit. And the marker
for pre-splited coroutine is created in CoroEarly pass, which ran after
AlwaysInliner Pass in O0 pipeline. So that the AlwaysInliner couldn't
detect it shouldn't inline a coroutine. So here is the error.

This patch set the presplit attribute in clang and mlir. So the inliner
would always detect the attribute before splitting.

Reviewed By: rjmccall, ezhulenev

Differential Revision: https://reviews.llvm.org/D115790
2022-01-05 10:25:02 +08:00
Nikita Popov 8484bab9cd [LangRef] Require elementtype attribute for indirect inline asm operands
Indirect inline asm operands may require the materialization of a
memory access according to the pointer element type. As this will
no longer be available with opaque pointers, we require it to be
explicitly annotated using the elementtype attribute, for example:

    define void @test(i32* %p, i32 %x) {
      call void asm "addl $1, $0", "=*rm,r"(i32* elementtype(i32) %p, i32 %x)
      ret void
    }

This patch only includes the LangRef change and Verifier updates to
allow adding the elementtype attribute in this position. It does not
yet enforce this, as this will require changes on the clang side
(and test updates) first.

Something I'm a bit unsure about is whether we really need the
elementtype for all indirect constraints, rather than only indirect
register constraints. I think indirect memory constraints might not
strictly need it (though the backend code is written in a way that
does require it). I think it's okay to just make this a general
requirement though, as this means we don't need to carefully deal
with multiple or alternative constraints. In addition, I believe
that MemorySanitizer benefits from having the element type even in
cases where it may not be strictly necessary for normal lowering
(cd2b050fa4/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp (L4066)).

Differential Revision: https://reviews.llvm.org/D116531
2022-01-04 10:02:06 +01:00
Fraser Cormack d762794040 [IR] Allow the 'align' param attr on vectors of pointers
This patch extends the available uses of the 'align' parameter attribute
to include vectors of pointers. The attribute specifies pointer
alignment element-wise.

This change was previously requested and discussed in D87304.

The vector predication (VP) intrinsics intend to use this for scatter
and gather operations, as they lack the explicit alignment parameter
that the masked versions use.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D115161
2022-01-03 12:32:46 +00:00
Nuno Lopes b23669123a [docs] Mark @llvm.sideeffect() as willreturn
Changed by https://reviews.llvm.org/D65455
2022-01-01 18:04:04 +00:00
Fangrui Song 25ff448aac [docs][llvm-profdata] Prefer double-dash long options
To match the `--help` message and most other utilities.

While here, change `option:: -output=output` to `option:: --output=<output>` and
omit the value name for the short options (convention of other utilities).

Reviewed By: snehasish

Differential Revision: https://reviews.llvm.org/D116353
2021-12-30 10:37:17 -08:00
Fangrui Song dd2fbbbb2d [llvm-profdata][docs] Use `` instead of ` 2021-12-28 18:03:28 -08:00
Kyungwoo Lee 4ecf15b789 [llvm-profdata] Make -debug-info visible
Add the option comment in .rst.

Reviewed By: ellis

Differential Revision: https://reviews.llvm.org/D116348
2021-12-28 17:35:08 -08:00
Renato Golin c5e8eb9783 Documentation for the process of adding new targets
Plenty of new targets nowadays and I found myself repeating the same
thing over and over, so this is more or less what we said over the last
few years, but condensed in an ordered fashion and easy to digest.

This does not change any of the recommendations, only documents what we
have been saying for years.
2021-12-28 21:00:26 +00:00
Tony Tye 0ac939f3e2 [AMDGPU][NFC] Update to DWARF extension for heterogeneous debugging
- Update documentation on the DWARF extension for heterogeneous
  debugging to better reference the DWARF Version 5 standard.
- Numerous other corrections.

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D116275
2021-12-28 17:13:45 +00:00
Tony Tye 4360207a21 [AMDGPU][NFC] Update DWARF extension allowing locations on stack
Add changes to the DWARF Version 5 standard to the DWARF extension to
allow locations on the evaluation stack documentation.

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D116265
2021-12-28 17:12:20 +00:00
Simon Moll 3d36da7702 [VE] Add manuals to CompilerWriterInfo
Reference VE manual and documentations in CompilerWriterInfo.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D116212
2021-12-23 14:14:37 +01:00
Philip Reames 157d565502 [docs] Update new builder instructions to starting on the staging buildmaster
This adds a step in the instructions to switch to the production buildmaster at the very end (after explicit approval), and updates the early instruction to start with the builder pointed at the staging buildmaster.

Differential Revision: https://reviews.llvm.org/D116129
2021-12-22 18:21:17 -08:00
Tony Tye 0a3258febf [AMDGPU][NFC] Update DWARF extension for locations on the stack
- Improve extension description.
- Rename "What is DWARF?" section to better reflect what it is
  describing.

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D116077
2021-12-21 05:58:11 +00:00
Esme-Yi b66328701a [PowerPC][llvm-objdump] enable --symbolize-operands for PowerPC ELF/XCOFF.
Summary: When disassembling, symbolize a branch target operand
to print a label instead of a real address.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D114492
2021-12-21 04:17:57 +00:00
Tom Stellard f819db11de docs: Clarify licensing rules for the project
Reviewed By: lattner, kristof.beyls

Differential Revision: https://reviews.llvm.org/D113427
2021-12-20 17:03:31 -08:00
Jinsong Ji 557a17eec0 [docs]LLVM Tutorial: fix the typo in Cpu0 URL
jonathan2251.github.com/lbd/ is 404. Update the URL to .io one according
to https://github.com/Jonathan2251/lbd/blob/master/README.md.
2021-12-20 21:45:57 +00:00
Sami Tolvanen 5dc8aaac39 [llvm][IR] Add no_cfi constant
With Control-Flow Integrity (CFI), the LowerTypeTests pass replaces
function references with CFI jump table references, which is a problem
for low-level code that needs the address of the actual function body.

For example, in the Linux kernel, the code that sets up interrupt
handlers needs to take the address of the interrupt handler function
instead of the CFI jump table, as the jump table may not even be mapped
into memory when an interrupt is triggered.

This change adds the no_cfi constant type, which wraps function
references in a value that LowerTypeTestsModule::replaceCfiUses does not
replace.

Link: https://github.com/ClangBuiltLinux/linux/issues/1353

Reviewed By: nickdesaulniers, pcc

Differential Revision: https://reviews.llvm.org/D108478
2021-12-20 12:55:32 -08:00
Noah Shutty c9509b03a1 [llvm] Fix small typos in Programmer's Manual and Chrono.h.
The Programmer's Manual guidance on the StringRef class (https://llvm.org/docs/ProgrammersManual.html#the-stringref-class) refers to `iterator StringRef::find(StringRef Key)` which does not exist. Based on context this is surely a small typo meant to be `iterator StringMap::find(StringRef Key)`.

This also corrects some small typos in the comments of llvm/include/llvm/Support/Chrono.h

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D113462
2021-12-16 19:20:25 +00:00
David Spickett 2dbe5898d7 [llvm][docs] Describe how to work with patch series on Phabricator
Reviewed By: awarzynski, jhenderson

Differential Revision: https://reviews.llvm.org/D115519
2021-12-16 15:32:26 +00:00
Fraser Cormack 8002fa6760 [LangRef] Remove incorrect vector alignment rules
The LangRef incorrectly says that if no exact match is found when
seeking alignment for a vector type, the largest vector type smaller
than the sought-after vector type. This is incorrect as vector types
require an exact match, else they fall back to reporting the natural
alignment.

The corrected rule was not added in its place, as rules for other types
(e.g., floating-point types) aren't documented.

A unit test was added to demonstrate this.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D112463
2021-12-14 14:35:40 +00:00
Tony Tye c6be2ad73a [AMDGPU][NFC] Add documentation for location description DWARF extension
Add documentation for the DWARF extension to allow location descriptions
on the DWARF expression stack. This is part of the "DWARF Extensions For
Heterogeneous Debugging" used by the AMD GPU target.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D115587
2021-12-14 00:58:17 +00:00
Alina Sbirlea ac994f831c [MemorySSA] Document details regarding MemorySSA's precision. 2021-12-13 16:49:24 -08:00
Fraser Cormack 2d60bc87a2 [VP] [NFC] Fix vp_store signature and vp_gather examples
Reviewed By: frasercrmck, simoll

Differential Revision: https://reviews.llvm.org/D115027
2021-12-13 17:53:19 +00:00
Med Ismail Bennani 30fc88bf1d Revert "Revert "Revert "Use `GNUInstallDirs` to support custom installation dirs. -- LLVM"""
This reverts commit 492de35df4.

I tried to apply John's changes in 8d897ec915 that were expected to
fix his patch but that didn't work unfortunately.

Reverting this again to fix the macOS bots and leave him more time to
investigate the issue.
2021-12-10 17:33:54 -08:00