Commit Graph

148455 Commits

Author SHA1 Message Date
Matt Arsenault 868af92235 TableGen: Add IntrHasSideEffects property for intrinsics
The IntrNoMem, IntrReadMem, IntrWriteMem, and IntrArgMemOnly intrinsic
properties differ from their corresponding LLVM IR attributes by specifying
that the intrinsic, in addition to its memory properties, has no other side
effects.

The IntrHasSideEffects flag used in combination with one of the memory flags
listed above, makes it possible to define an intrinsic such that its
properties at the CodeGen layer match its properties at the IR layer.

Patch by Tom Stellard

llvm-svn: 301685
2017-04-28 21:01:46 +00:00
Reid Kleckner 859f8b544a Make getParamAlignment use argument numbers
The method is called "get *Param* Alignment", and is only used for
return values exactly once, so it should take argument indices, not
attribute indices.

Avoids confusing code like:
  IsSwiftError = CS->paramHasAttr(ArgIdx, Attribute::SwiftError);
  Alignment  = CS->getParamAlignment(ArgIdx + 1);

Add getRetAlignment to handle the one case in Value.cpp that wants the
return value alignment.

This is a potentially breaking change for out-of-tree backends that do
their own call lowering.

llvm-svn: 301682
2017-04-28 20:34:27 +00:00
Matthias Braun 91d6a4488d GlobalISel: Followup for r301679
llvm-svn: 301681
2017-04-28 20:31:49 +00:00
Matt Arsenault b19b57ea60 Add speculatable function attribute
This attribute tells the optimizer that the function may be speculated.

Patch by Tom Stellard

llvm-svn: 301680
2017-04-28 20:25:27 +00:00
Matthias Braun 744c215e29 TargetLowering: Add finalizeLowering() function; NFC
Adds a new method finalizeLowering to TargetLoweringBase. This is in
preparation for an upcoming commit.

This function is meant for target specific adjustments to
MachineFrameInfo or register reservations.

Move the freezeRegisters() and the hasCopyImplyingStackAdjustment()
handling into the new function to prove the concept. As an added bonus
GlobalISel no longer missed the hasCopyImplyingStackAdjustment()
handling with this.

Differential Revision: https://reviews.llvm.org/D32621

llvm-svn: 301679
2017-04-28 20:25:05 +00:00
Marek Olsak 2d82590f64 AMDGPU: Add new amdgcn.init.exec intrinsics
v2: More tests, bug fixes, cosmetic changes.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D31762

llvm-svn: 301677
2017-04-28 20:21:58 +00:00
Bob Haarman 894f8df2c8 limit to 2 parallel links when using thinlto
Summary:
When using ThinLTO, the linker performs its own parallelism. This
change limits the number of parallel link jobs that Ninja will issue
to keep the total number of threads reasonable when linking with
ThinLTO.

Reviewers: hans, ruiu

Subscribers: mgorny, mehdi_amini, Prazek

Differential Revision: https://reviews.llvm.org/D31990

llvm-svn: 301676
2017-04-28 20:17:15 +00:00
Daniel Berlin 4d0fe64ae3 Kill off the old SimplifyInstruction API by converting remaining users.
llvm-svn: 301673
2017-04-28 19:55:38 +00:00
Davide Italiano b6681e2b4e [IPO/MergeFunctions] This function is used only under DEBUG().
llvm-svn: 301672
2017-04-28 19:39:45 +00:00
Reid Kleckner 99351967c7 [RS4GC] Simplify attribute handling code NFC
Avoids use of AttributeList::getNumSlots, making it easier to change the
underlying implementation.

llvm-svn: 301671
2017-04-28 19:22:40 +00:00
Reid Kleckner 6652a52e2b Use Argument::hasAttribute and AttributeList::ReturnIndex more
This eliminates many extra 'Idx' induction variables in loops over
arguments in CodeGen/ and Target/. It also reduces the number of places
where we assume that ReturnIndex is 0 and that we should add one to
argument numbers to get the corresponding attribute list index.

NFC

llvm-svn: 301666
2017-04-28 18:37:16 +00:00
Adrian Prantl 06d6096edc Cleanup: Use DIExpression::prepend in buildDbgValueForSpill(). (NFC)
llvm-svn: 301665
2017-04-28 18:30:36 +00:00
Reid Kleckner 6a752c4d30 [IR] Delete unused Argument::removeAttr overload
It doesn't make sense to remove an AttributeList from an argument.

llvm-svn: 301663
2017-04-28 17:58:18 +00:00
Adrian Prantl 109b236850 Clean up DIExpression::prependDIExpr a little. (NFC)
llvm-svn: 301662
2017-04-28 17:51:05 +00:00
Peter Collingbourne ba124f9e42 Bitcode: Do not remove empty summary entries when reading a per-module summary.
This became no longer necessary after D19462 landed, and will be incompatible
with an upcoming change to the summary data structures that changes how we
represent references.

llvm-svn: 301660
2017-04-28 17:41:43 +00:00
Saleem Abdulrasool 2dc8cb9f6b IR: fix some doxygen grammar (NFC)
Fix a bit of the doxygen grammar that was off that I noticed while
looking at this file for another issue.

llvm-svn: 301658
2017-04-28 17:18:28 +00:00
Craig Topper 24db6b800f [APInt] Add clearSignBit method. Use it and setSignBit in a few places. NFCI
llvm-svn: 301656
2017-04-28 16:58:05 +00:00
Craig Topper 96d6ee8576 [LazyValueInfo] Fix typo in comment. NFC
llvm-svn: 301655
2017-04-28 16:57:59 +00:00
Craig Topper 9eb2d72a1d [ValueTracking] Use APInt::isSubsetOf and APInt::intersects. NFC
llvm-svn: 301654
2017-04-28 16:57:55 +00:00
Alexei Starovoitov f7bd5ebd3b [bpf] add bigendian support to disassembler
. swap 4-bit register encoding, 16-bit offset and 32-bit imm to support big endian archs
. add a test

Reported-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 301653
2017-04-28 16:51:01 +00:00
Tim Northover 65e448422c CMake: ignore git stderr when trying to sort out revision. NFC.
llvm-svn: 301650
2017-04-28 16:06:00 +00:00
Jun Bum Lim 919f9e8d65 [InlineCost] Improve the cost heuristic for Switch
Summary:
The motivation example is like below which has 13 cases but only 2 distinct targets

```
lor.lhs.false2:                                   ; preds = %if.then
  switch i32 %Status, label %if.then27 [
    i32 -7012, label %if.end35
    i32 -10008, label %if.end35
    i32 -10016, label %if.end35
    i32 15000, label %if.end35
    i32 14013, label %if.end35
    i32 10114, label %if.end35
    i32 10107, label %if.end35
    i32 10105, label %if.end35
    i32 10013, label %if.end35
    i32 10011, label %if.end35
    i32 7008, label %if.end35
    i32 7007, label %if.end35
    i32 5002, label %if.end35
  ]
```
which is compiled into a balanced binary tree like this on AArch64 (similar on X86)

```
.LBB853_9:                              // %lor.lhs.false2
        mov     w8, #10012
        cmp             w19, w8
        b.gt    .LBB853_14
// BB#10:                               // %lor.lhs.false2
        mov     w8, #5001
        cmp             w19, w8
        b.gt    .LBB853_18
// BB#11:                               // %lor.lhs.false2
        mov     w8, #-10016
        cmp             w19, w8
        b.eq    .LBB853_23
// BB#12:                               // %lor.lhs.false2
        mov     w8, #-10008
        cmp             w19, w8
        b.eq    .LBB853_23
// BB#13:                               // %lor.lhs.false2
        mov     w8, #-7012
        cmp             w19, w8
        b.eq    .LBB853_23
        b       .LBB853_3
.LBB853_14:                             // %lor.lhs.false2
        mov     w8, #14012
        cmp             w19, w8
        b.gt    .LBB853_21
// BB#15:                               // %lor.lhs.false2
        mov     w8, #-10105
        add             w8, w19, w8
        cmp             w8, #9          // =9
        b.hi    .LBB853_17
// BB#16:                               // %lor.lhs.false2
        orr     w9, wzr, #0x1
        lsl     w8, w9, w8
        mov     w9, #517
        and             w8, w8, w9
        cbnz    w8, .LBB853_23
.LBB853_17:                             // %lor.lhs.false2
        mov     w8, #10013
        cmp             w19, w8
        b.eq    .LBB853_23
        b       .LBB853_3
.LBB853_18:                             // %lor.lhs.false2
        mov     w8, #-7007
        add             w8, w19, w8
        cmp             w8, #2          // =2
        b.lo    .LBB853_23
// BB#19:                               // %lor.lhs.false2
        mov     w8, #5002
        cmp             w19, w8
        b.eq    .LBB853_23
// BB#20:                               // %lor.lhs.false2
        mov     w8, #10011
        cmp             w19, w8
        b.eq    .LBB853_23
        b       .LBB853_3
.LBB853_21:                             // %lor.lhs.false2
        mov     w8, #14013
        cmp             w19, w8
        b.eq    .LBB853_23
// BB#22:                               // %lor.lhs.false2
        mov     w8, #15000
        cmp             w19, w8
        b.ne    .LBB853_3
```
However, the inline cost model estimates the cost to be linear with the number
of distinct targets and the cost of the above switch is just 2 InstrCosts.
The function containing this switch is then inlined about 900 times.

This change use the general way of switch lowering for the inline heuristic. It
etimate the number of case clusters with the suitability check for a jump table
or bit test. Considering the binary search tree built for the clusters, this
change modifies the model to be linear with the size of the balanced binary
tree. The model is off by default for now :
  -inline-generic-switch-cost=false

This change was originally proposed by Haicheng in D29870.

Reviewers: hans, bmakam, chandlerc, eraman, haicheng, mcrosier

Reviewed By: hans

Subscribers: joerg, aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D31085

llvm-svn: 301649
2017-04-28 16:04:03 +00:00
Simon Pilgrim cce5097ce4 Move variable local to where ita used. NFCI.
llvm-svn: 301646
2017-04-28 14:42:15 +00:00
Teresa Johnson 51177295c4 Memory intrinsic value profile optimization: Avoid divide by 0
Summary:
Skip memops if the total value profiled count is 0, we can't correctly
scale up the counts and there is no point anyway.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32624

llvm-svn: 301645
2017-04-28 14:30:54 +00:00
Simon Pilgrim 7ae9419dc0 [DAGCombiner] Add ComputeNumSignBits vector demanded elements support to ASHR and INSERT_VECTOR_ELT (reapplied)
Reapplied r299221 after fix for nondeterminism in ThinLTO builder (rL301599), with extra check for implicit truncation of inserted element.

llvm-svn: 301644
2017-04-28 13:21:18 +00:00
Simon Pilgrim ec93334317 [X86][SSE] Added new tests from D32416 to show codegen delta
llvm-svn: 301641
2017-04-28 11:53:08 +00:00
Simon Pilgrim 04928fd021 [X86][SSE] Renames all ones test to better match type.
Added 8f32/4f64 optsize tests discussed on D32416

llvm-svn: 301639
2017-04-28 11:12:30 +00:00
Simon Pilgrim 67b1a79985 [X86][SSE] Add codegen test for _mm_set_pd1 (PR32827)
llvm-svn: 301638
2017-04-28 10:31:42 +00:00
Diana Picus 6f975692e5 [ARM] GlobalISel: fixup r301632
Actually remove ARMInstructionSelector.h... Forgot to stage the removal
in the previous commit.

llvm-svn: 301633
2017-04-28 09:20:31 +00:00
Diana Picus 674888d84c [ARM] GlobalISel: Get rid of ARMInstructionSelector.h. NFC.
Declare the ARMInstructionSelector in an anonymous namespace, to make it
more in line with the other targets which were migrated to this in
r299637 in order to avoid TableGen'erated headers being included in
non-GlobalISel builds.

llvm-svn: 301632
2017-04-28 09:10:38 +00:00
George Rimar 96a3de2729 [DWARF] - Fix mistype in dump output of pub* tables. NFC.
There was a garbage character in output introduced by myself in
r290040 "[DWARF] - Introduce DWARFDebugPubTable class for dumping pub* sections."

llvm-svn: 301631
2017-04-28 08:54:10 +00:00
Andrew Ng 03e35b6bc0 [DebugInfo][X86] Improve X86 Optimize LEAs handling of debug values.
This is a follow up to the fix in r298360 to improve the handling of debug
values when redundant LEAs are removed. The fix in r298360 effectively
discarded the debug values. This patch now attempts to preserve the debug
values by using the DWARF DW_OP_stack_value operation via prependDIExpr.

Moved functions appendOffset and prependDIExpr from Local.cpp to
DebugInfoMetadata.cpp and made them available as static member functions of
DIExpression.

Differential Revision: https://reviews.llvm.org/D31604

llvm-svn: 301630
2017-04-28 08:44:30 +00:00
Craig Topper 053cf4da9d [WebAssembly] Update calls to computeKnownBits after the changes from r301620.
I didn't realize WebAssembly wasn't a default build target so I missed that changes were needed.

llvm-svn: 301629
2017-04-28 08:15:33 +00:00
Clement Courbet 5f0ab9e51d [X86][NFC] Refactor RepMovsRepeats in preparation for D32481.
Differential Revision: https://reviews.llvm.org/D32583

llvm-svn: 301628
2017-04-28 07:56:31 +00:00
Diana Picus 0674a3ce97 [ARM] GlobalISel: Tighten test. NFC
Explicitly check types and load sizes in the IRTranslator test.

llvm-svn: 301627
2017-04-28 07:50:47 +00:00
Craig Topper f42b23f7d8 [ValueTracking] Convert computeKnownBitsFromRangeMetadata to use KnownBits struct.
llvm-svn: 301626
2017-04-28 06:28:56 +00:00
Max Kazantsev 531db9a504 [EarlyCSE] Mark the condition of assume intrinsic as true
EarlyCSE should not just ignore assumes. It should use the fact that its condition is true for all dominated instructions.

Reviewers: sanjoy, reames, apilipenko, anna, skatkov

Reviewed By: reames, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32482

llvm-svn: 301625
2017-04-28 06:25:39 +00:00
Max Kazantsev 0589d9fa0f [EarlyCSE] Remove guards with conditions known to be true
If a condition is calculated only once, and there are multiple guards on this condition, we should be able
to remove all guards dominated by the first of them. This patch allows EarlyCSE to try to find the condition
of a guard among the known values, and if it is true, remove the guard. Otherwise we keep the guard and
mark its condition as 'true' for future consideration.

Reviewers: sanjoy, reames, apilipenko, skatkov, anna, dberlin

Reviewed By: reames, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32476

llvm-svn: 301623
2017-04-28 06:05:48 +00:00
Craig Topper d0af7e8ab8 [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDemandedBits
This patch replaces the separate APInts for KnownZero/KnownOne with a single KnownBits struct. This is similar to what was done to ValueTracking's version recently.

This is largely a mechanical transformation from KnownZero to Known.Zero.

Differential Revision: https://reviews.llvm.org/D32569

llvm-svn: 301620
2017-04-28 05:31:46 +00:00
Craig Topper 0e03e74e95 [SelectionDAG] Use various APInt methods to reduce temporary APInt creation
This patch uses various APInt methods to reduce the number of temporary APInts. These were all found while working through converting SelectionDAG's computeKnownBits to also use the KnownBits struct recently added to the ValueTracking version.

llvm-svn: 301618
2017-04-28 04:57:59 +00:00
Sanjoy Das 730edccb24 Remove unnecessary semicolon
This shows up as a -Wpendatic error on GCC.

llvm-svn: 301616
2017-04-28 04:49:32 +00:00
Sanjoy Das ba0daee6b2 [StackMaps] Increase the size of the "location size" field
Summary:
In some cases LLVM (especially the SLP vectorizer) will create vectors
that are 256 bytes (or larger).  Given that this is intentional[0] is
likely to get more common, this patch updates the StackMap binary
format to deal with the spill locations for said vectors.

This change also bumps the stack map version from 2 to 3.

[0]: https://reviews.llvm.org/D32533#738350

Reviewers: reames, kavon, skatkov, javed.absar

Subscribers: mcrosier, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D32629

llvm-svn: 301615
2017-04-28 04:48:42 +00:00
Saleem Abdulrasool 41d9ef3ced COFF Import: expose both symbols
COFF Import libraries which use the obsolete CONSTANT export are
supposed to get two symbols, one with the `_imp_` prefix and one
without.  Ensure that we expose both for iteration.  This is necessary
to fix the librarian with COFF CONSTANT exports.

llvm-svn: 301614
2017-04-28 04:29:43 +00:00
Craig Topper 24e71017aa [APInt] Use inplace shift methods where possible. NFCI
llvm-svn: 301612
2017-04-28 03:36:24 +00:00
Zachary Turner 7159ab95c7 [llvm-pdbdump] Allow printing only a portion of a stream.
When dumping raw data from a stream, you might know the offset
of a certain record you're interested in, as well as how long
that record is.  Previously, you had to dump the entire stream
and wade through the bytes to find the interesting record.

This patch allows you to specify an offset and length on the
command line, and it will only dump the requested range.

llvm-svn: 301607
2017-04-28 00:43:38 +00:00
Sam Clegg 10545c9c24 [WebAssembly] Add some tests for wasm MC layer
Subscribers: jfb, dschuff

Differential Revision: https://reviews.llvm.org/D32558

llvm-svn: 301606
2017-04-28 00:36:36 +00:00
Davide Italiano 81a26da1e5 [SROA] Fix nondeterminism exposed by Simon's r299221.
Use a SmallSetSetVector instead of a SmallPtrSet as iterating
over the latter is not stable ('<' relies on addresses).

llvm-svn: 301599
2017-04-27 23:09:01 +00:00
Frederich Munch eab432a18b Fix a few pedantic warnings.
Reviewers: zturner, hansw, hans

Reviewed By: hans

Subscribers: hans, llvm-commits

Differential Revision: https://reviews.llvm.org/D32611

llvm-svn: 301595
2017-04-27 22:10:57 +00:00
Sanjay Patel 73d8c43da8 [InstCombine] fix matcher to bind to specific operand (PR32830)
Matching any random value would be very wrong:
https://bugs.llvm.org/show_bug.cgi?id=32830

llvm-svn: 301594
2017-04-27 21:55:03 +00:00
Sanjoy Das d2d007707a Specify something that's true in practice
llvm-svn: 301591
2017-04-27 20:55:07 +00:00
Evgeniy Stepanov 964f4663c4 [asan] Fix dead stripping of globals on Linux.
Use a combination of !associated, comdat, @llvm.compiler.used and
custom sections to allow dead stripping of globals and their asan
metadata. Sometimes.

Currently this works on LLD, which supports SHF_LINK_ORDER with
sh_link pointing to the associated section.

This also works on BFD, which seems to treat comdats as
all-or-nothing with respect to linker GC. There is a weird quirk
where the "first" global in each link is never GC-ed because of the
section symbols.

At this moment it does not work on Gold (as in the globals are never
stripped).

This is a second re-land of r298158. This time, this feature is
limited to -fdata-sections builds.

llvm-svn: 301587
2017-04-27 20:27:27 +00:00
Evgeniy Stepanov 716f0ff222 [asan] Put ctor/dtor in comdat.
When possible, put ASan ctor/dtor in comdat.

The only reason not to is global registration, which can be
TU-specific. This is not the case when there are no instrumented
globals. This is also limited to ELF targets, because MachO does
not have comdat, and COFF linkers may GC comdat constructors.

The benefit of this is a lot less __asan_init() calls: one per DSO
instead of one per TU. It's also necessary for the upcoming
gc-sections-for-globals change on Linux, where multiple references to
section start symbols trigger quadratic behaviour in gold linker.

This is a second re-land of r298756. This time with a flag to disable
the whole thing to avoid a bug in the gold linker:
  https://sourceware.org/bugzilla/show_bug.cgi?id=19002

llvm-svn: 301586
2017-04-27 20:27:23 +00:00
Simon Pilgrim 9a08ad8abd [X86][SSE] Add tests for broadcast from larger vector loads
llvm-svn: 301583
2017-04-27 20:19:00 +00:00
Zachary Turner 8d6396d3b0 [llvm-readobj] Dump COFF Resources section.
This patch dumps the raw bytes of the .rsrc sections that
are present in COFF object and executable files.  Subsequent
patches will parse this information and dump in a more human
readable format.

Differential Revision: https://reviews.llvm.org/D32463
Patch By: Eric Beckmann

llvm-svn: 301578
2017-04-27 19:38:38 +00:00
Chandler Carruth 1353f9a48b [PM/LoopUnswitch] Introduce a new, simpler loop unswitch pass.
Currently, this pass only focuses on *trivial* loop unswitching. At that
reduced problem it remains significantly better than the current loop
unswitch:
- Old pass is worse than cubic complexity. New pass is (I think) linear.
- New pass is much simpler in its design by focusing on full unswitching. (See
  below for details on this).
- New pass doesn't carry state for thresholds between pass iterations.
- New pass doesn't carry state for correctness (both miscompile and
  infloop) between pass iterations.
- New pass produces substantially better code after unswitching.
- New pass can handle more trivial unswitch cases.
- New pass doesn't recompute the dominator tree for the entire function
  and instead incrementally updates it.

I've ported all of the trivial unswitching test cases from the old pass
to the new one to make sure that major functionality isn't lost in the
process. For several of the test cases I've worked to improve the
precision and rigor of the CHECKs, but for many I've just updated them
to handle the new IR produced.

My initial motivation was the fact that the old pass carried state in
very unreliable ways between pass iterations, and these mechansims were
incompatible with the new pass manager. However, I discovered many more
improvements to make along the way.

This pass makes two very significant assumptions that enable most of these
improvements:

1) Focus on *full* unswitching -- that is, completely removing whatever
   control flow construct is being unswitched from the loop. In the case
   of trivial unswitching, this means removing the trivial (exiting)
   edge. In non-trivial unswitching, this means removing the branch or
   switch itself. This is in opposition to *partial* unswitching where
   some part of the unswitched control flow remains in the loop. Partial
   unswitching only really applies to switches and to folded branches.
   These are very similar to full unrolling and partial unrolling. The
   full form is an effective canonicalization, the partial form needs
   a complex cost model, cannot be iterated, isn't canonicalizing, and
   should be a separate pass that runs very late (much like unrolling).

2) Leverage LLVM's Loop machinery to the fullest. The original unswitch
   dates from a time when a great deal of LLVM's loop infrastructure was
   missing, ineffective, and/or unreliable. As a consequence, a lot of
   complexity was added which we no longer need.

With these two overarching principles, I think we can build a fast and
effective unswitcher that fits in well in the new PM and in the
canonicalization pipeline. Some of the remaining functionality around
partial unswitching may not be relevant today (not many test cases or
benchmarks I can find) but if they are I'd like to add support for them
as a separate layer that runs very late in the pipeline.

Purely to make reviewing and introducing this code more manageable, I've
split this into first a trivial-unswitch-only pass and in the next patch
I'll add support for full non-trivial unswitching against a *fixed*
threshold, exactly like full unrolling. I even plan to re-use the
unrolling thresholds, as these are incredibly similar cost tradeoffs:
we're cloning a loop body in order to end up with simplified control
flow. We should only do that when the total growth is reasonably small.

One of the biggest changes with this pass compared to the previous one
is that previously, each individual trivial exiting edge from a switch
was unswitched separately as a branch. Now, we unswitch the entire
switch at once, with cases going to the various destinations. This lets
us unswitch multiple exiting edges in a single operation and also avoids
numerous extremely bad behaviors, where we would introduce 1000s of
branches to test for thousands of possible values, all of which would
take the exact same exit path bypassing the loop. Now we will use
a switch with 1000s of cases that can be efficiently lowered into
a jumptable. This avoids relying on somehow forming a switch out of the
branches or getting horrible code if that fails for any reason.

Another significant change is that this pass actively updates the CFG
based on unswitching. For trivial unswitching, this is actually very
easy because of the definition of loop simplified form. Doing this makes
the code coming out of loop unswitch dramatically more friendly. We
still should run loop-simplifycfg (at the least) after this to clean up,
but it will have to do a lot less work.

Finally, this pass makes much fewer attempts to simplify instructions
based on the unswitch. Something like loop-instsimplify, instcombine, or
GVN can be used to do increasingly powerful simplifications based on the
now dominating predicate. The old simplifications are things that
something like loop-instsimplify should get today or a very, very basic
loop-instcombine could get. Keeping that logic separate is a big
simplifying technique.

Most of the code in this pass that isn't in the old one has to do with
achieving specific goals:
- Updating the dominator tree as we go
- Unswitching all cases in a switch in a single step.

I think it is still shorter than just the trivial unswitching code in
the old pass despite having this functionality.

Differential Revision: https://reviews.llvm.org/D32409

llvm-svn: 301576
2017-04-27 18:45:20 +00:00
Eli Friedman 10ab923b32 [GlobalOpt] Correctly update metadata when localizing a global.
Just calling dropAllReferences leaves pointers to the ConstantExpr
behind, so we would eventually crash with a null pointer dereference.

Differential Revision: https://reviews.llvm.org/D32551

llvm-svn: 301575
2017-04-27 18:39:08 +00:00
Teresa Johnson f9ea176f05 Memory intrinsic value profile optimization: Improve debug output (NFC)
Summary:
Misc improvements to debug output. Fix a couple typos and also dump the
value profile before we make any profitability checks.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32607

llvm-svn: 301574
2017-04-27 18:25:22 +00:00
Frederich Munch 3ba085563c Limit disabling of warnings emitted from r301571 by checking __GNUC__.
llvm-svn: 301572
2017-04-27 18:05:29 +00:00
Frederich Munch d0c0700f92 Fix warnings from test added in r301562 on Windows (when built without exceptions).
llvm-svn: 301571
2017-04-27 17:33:50 +00:00
Vassil Vassilev d36820f1ed Sync with changes from r300825 in clang.
Generate the better include paths. Instead of #include <llvm_header.h> doxygen
produces #include "llvm/Folder/llvm_header.h"

Patch by Yuka Takahashi (D32342)!

llvm-svn: 301569
2017-04-27 17:23:53 +00:00
Sanjoy Das 40c32dd9a0 Use a pointer type for target frame indices during statepoint lowering
Summary:
The type of the target frame index is intptr, not the type of the value we're
going to store into it.  Without this change we crash in the attached test case
when trying to type-legalize a TargetFrameIndex.

Patchpoint lowering types the target frame index as intptr as well.

Reviewers: reames, bogner, arsenm

Subscribers: arsenm, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32256

llvm-svn: 301566
2017-04-27 17:17:16 +00:00
Peter Collingbourne eaaba2b59e cmake: Touch $GIT_DIR/logs/HEAD if it does not already exist.
Apparently some git tools (such as "repo") may not create this file.
Patch by Quentin Neill.

llvm-svn: 301565
2017-04-27 17:04:05 +00:00
Frederich Munch c1db8cf9c1 Refactor DynamicLibrary so searching for a symbol will have a defined order and
libraries are properly unloaded when llvm_shutdown is called.

Summary:
This was mostly affecting usage of the JIT, where storing the library handles in
a set made iteration unordered/undefined. This lead to disagreement between the
JIT and native code as to what the address and implementation of particularly on
Windows with stdlib functions:

JIT: putenv_s("TEST", "VALUE") // called msvcrt.dll, putenv_s
JIT: getenv("TEST") -> "VALUE" // called msvcrt.dll, getenv
Native: getenv("TEST") -> NULL // called ucrt.dll, getenv

Also fixed is the issue of DynamicLibrary::getPermanentLibrary(0,0) on Windows
not giving priority to the process' symbols as it did on Unix.

Reviewers: chapuni, v.g.vassilev, lhames

Reviewed By: lhames

Subscribers: danalbert, srhines, mgorny, vsk, llvm-commits

Differential Revision: https://reviews.llvm.org/D30107

llvm-svn: 301562
2017-04-27 16:55:24 +00:00
Xinliang David Li d21601a929 [PartialInlining]: Improve partial inlining to handle complex conditions
Differential Revision: http://reviews.llvm.org/D32249

llvm-svn: 301561
2017-04-27 16:34:00 +00:00
Zachary Turner c37cb0c6a5 [CodeView] Isolate Debug Info Fragments into standalone classes.
Previously parsing of these were all grouped together into a
single master class that could parse any type of debug info
fragment.

With writing forthcoming, the complexity of each individual
fragment is enough to warrant them having their own classes so
that reading and writing of each fragment type can be grouped
together, but isolated from the code for reading and writing
other fragment types.

In doing so, I found a place where parsing code was duplicated
for the FileChecksums fragment, across llvm-readobj and the
CodeView library, and one of the implementations had a bug.
Now that the codepaths are merged, the bug is resolved.

Differential Revision: https://reviews.llvm.org/D32547

llvm-svn: 301557
2017-04-27 16:12:16 +00:00
Zachary Turner e509447418 [Support] Make BinaryStreamArray extractors stateless.
Instead, we now pass a context memeber through the extraction
process.

llvm-svn: 301556
2017-04-27 16:11:47 +00:00
Zachary Turner 67c5601404 Rename some PDB classes.
We have a lot of very similarly named classes related to
dealing with module debug info.  This patch has NFC, it just
renames some classes to be more descriptive (albeit slightly
more to type).  The mapping from old to new class names is as
follows:

   Old          |        New
ModInfo         | DbiModuleDescriptor
ModuleSubstream | ModuleDebugFragment
ModStream       | ModuleDebugStream

With the corresponding Builder classes renamed accordingly.

Differential Revision: https://reviews.llvm.org/D32506

llvm-svn: 301555
2017-04-27 16:11:19 +00:00
Sanjay Patel c3e00fcadd [x86] add minimal tests for potential size-changing vsel transforms; NFC
llvm-svn: 301554
2017-04-27 16:10:20 +00:00
Sam Kolton 5d99386b4d [AMDGPU] DPP: add support for GFX9
Reviewers: artem.tamazov

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D32588

llvm-svn: 301551
2017-04-27 15:42:38 +00:00
Krzysztof Parzyszek 14f10e03e0 Fix typo and place comment close to its target
Patch by Wei-Ren Chen.

Differential Revision: https://reviews.llvm.org/D32594

llvm-svn: 301546
2017-04-27 14:38:21 +00:00
Aaron Ballman 678512d062 Fixing a malformed RST table to get the documentation bot back to green.
llvm-svn: 301545
2017-04-27 14:33:01 +00:00
Simon Pilgrim 684372d8c4 Fixed assert message to correctly refer to MRMSrcReg4VOp3Frm/MRMSrcMeg4VOp3Frm.
llvm-svn: 301544
2017-04-27 14:25:04 +00:00
Zoran Jovanovic ffef3e3c6a [mips][microMIPS] Adding code size reduction pass for MicroMIPS
Author: milena.vujosevic.janicic
Reviewers: sdardis
The code implements size reduction pass for MicroMIPS.
Load and store instructions are examined and transformed, if possible.
lw32 instruction is transformed into 16-bit instruction lwsp
sw32 instruction is transformed into 16-bit instruction swsp
Arithmetic instrcutions are examined and transformed, if possible.
addu32 instruction is transformed into 16-bit instruction addu16
subu32 instruction is transformed into 16-bit instruction subu16
Differential Revision: https://reviews.llvm.org/D15144

llvm-svn: 301540
2017-04-27 13:10:48 +00:00
Jonas Paulsson ac4e022d72 [SystemZ] Remove incorrect assert in SystemZTTIImpl
In getCmpSelInstrCost(), CondTy may actually be scalar while ValTy is a
vector when LoopVectorizer is the caller. Therefore the assert that CondTy
must be a vector type if ValTy is was wrong and is now removed.

Review: Ulrich Weigand
llvm-svn: 301533
2017-04-27 11:01:18 +00:00
Diana Picus 4f46be327c [ARM] GlobalISel: Fix extended stack operands
Fix a crash when trying to extend a value passed as a sign- or
zero-extended stack parameter. The cause of the crash was that we were
setting the size of the loaded value to 32 bits, and then tyring to
extend again to 32 bits.

This patch addresses the issue by also introducing a G_TRUNC after the
load. This will leave the unused bits to their original values set by
the caller, while being consistent about the types. For values that are
not extended, we just use a smaller load.

llvm-svn: 301531
2017-04-27 10:23:30 +00:00
Andrew V. Tischenko 9108ae2b50 2 tests that were lost in rL301390
llvm-svn: 301529
2017-04-27 10:20:35 +00:00
George Rimar e6ef4488e1 [llvm-dwarfdump] - Change format for .gdb_index dump.
It is useful to output size of ranges when address ranges
section of .gdb_index is dumped.

It helps to compare outputs produced by different linkers,
for example. In that case address ranges can look very different,
when they are the same at fact. Difference comes from different 
low address because of different address of .text.

Differential revision: https://reviews.llvm.org/D32492

llvm-svn: 301527
2017-04-27 10:00:13 +00:00
Igor Breger 360d0f23ee [GlobalISel][X86] handle not symmetric G_COPY
Summary: handle not symmetric G_COPY

Reviewers: zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32420

llvm-svn: 301523
2017-04-27 08:02:03 +00:00
Clement Courbet 7b0ec39494 [CodeGen][NFC] Rename 'Src' to 'Val'.
'Src' looks like it was borrowed from memcpy, 'Val' makes more sense for
memset and is consistent with naming within the function.

Differential Revision: https://reviews.llvm.org/D32580

llvm-svn: 301521
2017-04-27 07:22:30 +00:00
Sanjoy Das 6f08789d30 Use accessors for ValueHandleBase::V; NFC
This changes code that touches ValueHandleBase::V to go through
getValPtr and (newly added) setValPtr.  This functionality will be
used later, but also seemed like a generally good cleanup.

I also renamed the field to Val, but that's just to make it obvious
that I fixed all the uses.

llvm-svn: 301518
2017-04-27 06:02:18 +00:00
Craig Topper abd6b1dc76 [Metadata] Fix typos in comments. NFC
llvm-svn: 301517
2017-04-27 05:48:29 +00:00
Craig Topper 9474e9b6c8 [InstCombine] Use APInt bit counting methods to avoid a temporary APInt. NFC
llvm-svn: 301516
2017-04-27 04:51:25 +00:00
Rui Ueyama bbf69502a9 Make StringSaver::save less ambiguous.
Previously, an expression such as Saver.save(std::string("foo") + "bar")
didn't compile because there is an ambiguity as to whether the argument
is of const Twine& or StringRef.

llvm-svn: 301512
2017-04-27 03:45:33 +00:00
Konstantin Zhuravlyov 97a663b6a2 AMDGPU: Fix assert in scheduler
Assert is triggered if DBG_VALUE is first instruction in BB

Differential Revision: https://reviews.llvm.org/D32572

llvm-svn: 301511
2017-04-27 03:22:44 +00:00
Ahmed Bougacha 5104e681e2 [Support] Fix overflow in SLEB128 decoding.
decodeULEB128 was fixed in r216268, but decodeSLEB128 always had the
same issue, which is now exposed in r301369.

llvm-svn: 301510
2017-04-27 02:09:44 +00:00
Ahmed Bougacha ca04c5defe [Support] clang-format LEB128.h. NFC.
llvm-svn: 301509
2017-04-27 02:09:42 +00:00
Chandler Carruth c246a4c973 Disable GVN Hoist due to still more bugs being found in it. There is
also a discussion about exactly what we should do prior to re-enabling
it.

The current bug is http://llvm.org/PR32821 and the discussion about this
is in the review thread for r300200.

llvm-svn: 301505
2017-04-27 00:28:03 +00:00
Adrian Prantl 9d2f019fb6 Turn DISubprogram into a variable-length node.
DISubprogram currently has 10 pointer operands, several of which are
often nullptr. This patch reduces the amount of memory allocated by
DISubprogram by rearranging the operands such that containing type,
template params, and thrown types come last, and are only allocated
when they are non-null (or followed by non-null operands).

This patch also eliminates the entirely unused DisplayName operand.

This saves up to 4 pointer operands per DISubprogram. (I tried
measuring the effect on peak memory usage on an LTO link of an X86
llc, but the results were very noisy).

This reapplies r301498 with an attempted workaround for g++.

Differential Revision: https://reviews.llvm.org/D32560

llvm-svn: 301501
2017-04-26 23:59:52 +00:00
Adrian Prantl aa1d602fbd Revert "Turn DISubprogram into a variable-length node."
This reverts commit r301498 while investigating bot breakage.

llvm-svn: 301499
2017-04-26 23:49:30 +00:00
Adrian Prantl 82c98fcdbf Turn DISubprogram into a variable-length node.
DISubprogram currently has 10 pointer operands, several of which are
often nullptr. This patch reduces the amount of memory allocated by
DISubprogram by rearranging the operands such that containing type,
template params, and thrown types come last, and are only allocated
when they are non-null (or followed by non-null operands).

This patch also eliminates the entirely unused DisplayName operand.

This saves up to 4 pointer operands per DISubprogram. (I tried
measuring the effect on peak memory usage on an LTO link of an X86
llc, but the results were very noisy).

llvm-svn: 301498
2017-04-26 23:44:54 +00:00
Matthias Braun 092e32e540 MachineFrameInfo.h: Remove unnecessary forward declarations; NFC
llvm-svn: 301496
2017-04-26 23:37:04 +00:00
Matthias Braun 90834df0b4 Lanai: Remove unnecessary canRealignStack() override; NFC
It was doing the same as the base implementation and was irritating me
when I was searching for backends that have custom behavior for
canRealignStack.

llvm-svn: 301495
2017-04-26 23:37:01 +00:00
Matthias Braun e4e14ae507 MachineFrameInfo: Move implementation to an own file; NFC
Move implementation of the MachineFrameInfo class into
MachineFrameInfo.cpp

llvm-svn: 301494
2017-04-26 23:36:58 +00:00
Rui Ueyama 0fcbb2893e Revert r301487: Replace HashString algorithm with xxHash64
This reverts commit r301487 to make buildbots green.

llvm-svn: 301491
2017-04-26 23:15:10 +00:00
Adrian Prantl 1d12b885b0 Add support for DW_TAG_thrown_type.
For Swift we would like to be able to encode the error types that a
function may throw, so the debugger can display them alongside the
function's return value when finish-ing a function.

DWARF defines DW_TAG_thrown_type (intended to be used for C++ throw()
declarations) that is a perfect fit for this purpose. This patch wires
up support for DW_TAG_thrown_type in LLVM by adding a list of thrown
types to DISubprogram.

To offset the cost of the extra pointer, there is a follow-up patch
that turns DISubprogram into a variable-length node.

rdar://problem/29481673

Differential Revision: https://reviews.llvm.org/D32559

llvm-svn: 301489
2017-04-26 22:56:44 +00:00
Rui Ueyama 87b30ac9d3 Replace HashString algorithm with xxHash64
The previous algorithm processed one character at a time, which is very
painful on a modern CPU. Replace it with xxHash64, which both already
exists in the codebase and is fairly fast.

Patch from Scott Smith!

Differential Revision: https://reviews.llvm.org/D32509

llvm-svn: 301487
2017-04-26 22:45:04 +00:00
Eugene Zelenko 7975b99fe6 [MC] Fix some Clang-tidy modernize-use-using warnings; other minor fixes (NFC).
llvm-svn: 301485
2017-04-26 22:31:39 +00:00
Davide Italiano d7b2a9981c [LibCallsShrinkWrap] Remove an unnecessary class member variable.
llvm-svn: 301477
2017-04-26 21:28:40 +00:00
Davide Italiano 11817ba2ea [LibCallsShrinkWrap] More descriptive assertion messages.
Fix a typo while I'm here.

llvm-svn: 301474
2017-04-26 21:21:02 +00:00
Davide Italiano 3c3785fd1f [LibCallsShrinkWrap] Remove some temporary cl::opt(s).
The pass has been on and working for a while.

llvm-svn: 301473
2017-04-26 21:19:05 +00:00
Davide Italiano 6abada8ab8 [LibCallsShrinkWrap] Teach the pass how to preserve the dominator.
llvm-svn: 301471
2017-04-26 21:05:40 +00:00
Daniel Berlin 99397cea69 Kill the old Simplify* APIs, leave SimplifyInstruction for the moment
llvm-svn: 301467
2017-04-26 20:56:17 +00:00
Daniel Berlin ede130d490 NewGVN: Use new SimplifyQuery based API
llvm-svn: 301466
2017-04-26 20:56:14 +00:00
Daniel Berlin e6cb21a287 PHITransAddr: Use new SimplifyQuery based API.
llvm-svn: 301465
2017-04-26 20:56:13 +00:00
Daniel Berlin 2c75c63063 InstCombine: Use the new SimplifyQuery versions of Simplify*. Use AssumptionCache, DominatorTree, TargetLibraryInfo everywhere.
llvm-svn: 301464
2017-04-26 20:56:07 +00:00
Sanjay Patel a0547c3d9f [DAGCombiner] add (sext i1 X), 1 --> zext (not i1 X)
Besides better codegen, the motivation is to be able to canonicalize this pattern 
in IR (currently we don't) knowing that the backend is prepared for that.

This may also allow removing code for special constant cases in 
DAGCombiner::foldSelectOfConstants() that was added in D30180.

Differential Revision: https://reviews.llvm.org/D31944

llvm-svn: 301457
2017-04-26 20:26:46 +00:00
Dmitry Preobrazhensky 43d297eb45 [AMDGPU][MC] Added arg checks for vmcnt, expcnt, lgkmcnt helpers
Summary of changes:
- corrected vmcnt, expcnt, lgkmcnt helpers to checks their argument for truncation;
- added saturated versions of these helpers.

See bug 32711 for details: https://bugs.llvm.org//show_bug.cgi?id=32711

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D32546

llvm-svn: 301439
2017-04-26 17:55:50 +00:00
Peter Collingbourne fa58f7528e LTO: Mark undefined module asm symbols as used.
Marking them as used causes them to be considered visible outside of LTO. This
prevents the symbols from being internalized or discarded, either by GlobalDCE
or by summary-based dead stripping in ThinLTO.

This change makes it unnecessary to add these symbols to llvm.compiler.used
in the backend, as the symbols are kept alive by virtue of being external,
so remove the backend code that handles that.

Fixes PR32798.

Differential Revision: https://reviews.llvm.org/D32544

llvm-svn: 301438
2017-04-26 17:53:39 +00:00
Daniel Berlin c9f0a4f1ec CorrelatedValuePropagation: Rename a variable for consistency
llvm-svn: 301435
2017-04-26 17:41:46 +00:00
Craig Topper b45eabcf82 [ValueTracking] Introduce a KnownBits struct to wrap the two APInts for computeKnownBits
This patch introduces a new KnownBits struct that wraps the two APInt used by computeKnownBits. This allows us to treat them as more of a unit.

Initially I've just altered the signatures of computeKnownBits and InstCombine's simplifyDemandedBits to pass a KnownBits reference instead of two separate APInt references. I'll do similar to the SelectionDAG version of computeKnownBits/simplifyDemandedBits as a separate patch.

I've added a constructor that allows initializing both APInts to the same bit width with a starting value of 0. This reduces the repeated pattern of initializing both APInts. Once place default constructed the APInts so I added a default constructor for those cases.

Going forward I would like to add more methods that will work on the pairs. For example trunc, zext, and sext occur on both APInts together in several places. We should probably add a clear method that can be used to clear both pieces. Maybe a method to check for conflicting information. A method to return (Zero|One) so we don't write it out everywhere. Maybe a method for (Zero|One).isAllOnesValue() to determine if all bits are known. I'm sure there are many other methods we can come up with.

Differential Revision: https://reviews.llvm.org/D32376

llvm-svn: 301432
2017-04-26 16:39:58 +00:00
Sanjoy Das 2cbeb00f38 Reverts commit r301424, r301425 and r301426
Commits were:

"Use WeakVH instead of WeakTrackingVH in AliasSetTracker's UnkownInsts"
"Add a new WeakVH value handle; NFC"
"Rename WeakVH to WeakTrackingVH; NFC"

The changes assumed pointers are 8 byte aligned on all architectures.

llvm-svn: 301429
2017-04-26 16:37:05 +00:00
Matthew Simpson 9eed0bee3d [LV] Handle external uses of floating-point induction variables
Reference: https://bugs.llvm.org/show_bug.cgi?id=32758
Differential Revision: https://reviews.llvm.org/D32445

llvm-svn: 301428
2017-04-26 16:23:02 +00:00
Sanjoy Das 8b32b81954 Use WeakVH instead of WeakTrackingVH in AliasSetTracker's UnkownInsts
Summary:
In cases where an instruction (a call site, say) is RAUW'ed with some
other value (this is possible via the `returned` attribute, amongst
other things), we want the slot in UnknownInsts to point to the
original Instruction we wanted to track, not the value it got replaced
by.

Fixes PR32587.

Reviewers: davide

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32268

llvm-svn: 301426
2017-04-26 16:21:02 +00:00
Sanjoy Das 7de051ba0c Add a new WeakVH value handle; NFC
Summary:
WeakVH nulls itself out if the value it was tracking gets deleted, but
it does not track RAUW.

Reviewers: dblaikie, davide

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32267

llvm-svn: 301425
2017-04-26 16:20:59 +00:00
Sanjoy Das 01de557738 Rename WeakVH to WeakTrackingVH; NFC
Summary:
I plan to use WeakVH to mean "nulls itself out on deletion, but does
not track RAUW" in a subsequent commit.

Reviewers: dblaikie, davide

Reviewed By: davide

Subscribers: arsenm, mehdi_amini, mcrosier, mzolotukhin, jfb, llvm-commits, nhaehnle

Differential Revision: https://reviews.llvm.org/D32266

llvm-svn: 301424
2017-04-26 16:20:52 +00:00
Igor Breger 1593a741a4 [globalisel][tablegen] Fix vector element size
Summary: Fix vector element size.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32537

llvm-svn: 301421
2017-04-26 15:59:05 +00:00
Vedant Kumar 7f5b3d6fc8 [sampleprof] Drop test dependency on the string hash func (NFC)
The SampleProfWriter emits function information in an order determined
by the string hash function. The situation is a bit brittle, because
changing the hash function can break the tests.

Instead of sorting the function samples to get a relaible ordering (that
might be too expensive), make the tests not depend on a particular
ordering of function samples.

Differential Revision: https://reviews.llvm.org/D32516

llvm-svn: 301419
2017-04-26 15:39:53 +00:00
Dmitry Preobrazhensky c7d35a0d6a [AMDGPU][MC] Added check for truncation of SOPK imm operand
See bug 30827: https://bugs.llvm.org//show_bug.cgi?id=30827

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D32535

llvm-svn: 301418
2017-04-26 15:34:19 +00:00
Dylan McKay 828bd6169c [AVR] Remove an unused local variable
llvm-svn: 301413
2017-04-26 14:47:27 +00:00
Sanjay Patel 3603e3f22d [x86] change tests to use sext, not zext; NFC
These are intended to exercise D31944, so we need sexts.

llvm-svn: 301412
2017-04-26 14:35:54 +00:00
Haojian Wu e43db0a834 Fix unused-variable warning caused by r301407.
llvm-svn: 301411
2017-04-26 14:31:05 +00:00
Sanjay Patel e2ec05a62a [TargetLowering] fix isConstTrueVal to account for build vector truncation
Build vectors have magical truncation powers, so we have things like this:

v4i1 = BUILD_VECTOR Constant:i32<1>, Constant:i32<1>, Constant:i32<1>, Constant:i32<1>
v4i16 = BUILD_VECTOR Constant:i32<1>, Constant:i32<1>, Constant:i32<1>, Constant:i32<1>

If we don't truncate the splat node returned by getConstantSplatNode(), then we won't find 
truth when ZeroOrNegativeOneBooleanContent is the rule.

Differential Revision: https://reviews.llvm.org/D32505

llvm-svn: 301408
2017-04-26 14:05:42 +00:00
Daniel Berlin 62aee14978 Convert LoopRotation to use SimplifyQuery version of SimplifyInstruction. Add AssumptionCache, DominatorTree, TLI if available.
llvm-svn: 301407
2017-04-26 13:52:18 +00:00
Daniel Berlin 954006fde8 Convert SimplifyInstructions to use the SimplifyQuery version of SimplifyInstruction
llvm-svn: 301406
2017-04-26 13:52:16 +00:00
Daniel Berlin 9bae449d78 Convert CVP to use SimplifyQuery version of SimplifyInstruction. Add AssumptionCache, DominatorTree, TLI if available.
llvm-svn: 301405
2017-04-26 13:52:13 +00:00
Ranjeet Singh acbd4e141f Fix signed multiplication with overflow fallback.
For targets that don't have ISD::MULHS or ISD::SMUL_LOHI for the type
and the double width type is illegal, then the two operands are
sign extended to twice their size then multiplied to check for overflow.
The extended upper halves were mismatched causing an incorrect result.
This fixes the mismatch.

A test was added for ARM V6-M where the bug was detected.

Patch by James Duley.

Differential Revision: https://reviews.llvm.org/D31807

llvm-svn: 301404
2017-04-26 13:41:43 +00:00
Sanjay Patel a4b4e9388c [DAG] add FIXME comments for splat detection; NFC
llvm-svn: 301403
2017-04-26 13:27:57 +00:00
Simon Pilgrim e093594074 [X86] Added pointer math zext test case (PR22970)
llvm-svn: 301401
2017-04-26 13:03:00 +00:00
Simon Pilgrim e6a7708448 [X86][SSE] Add test case for repeated vector insertions of the same element (PR15298)
llvm-svn: 301396
2017-04-26 12:23:32 +00:00
Filipe Cabecinhas 92dc348773 Simplify the CFG after loop pass cleanup.
Summary:
Otherwise we might end up with some empty basic blocks or
single-entry-single-exit basic blocks.

This fixes PR32085

Reviewers: chandlerc, danielcdh

Subscribers: mehdi_amini, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D30468

llvm-svn: 301395
2017-04-26 12:02:41 +00:00
Sagar Thakur b458b468a2 [mips] Fix test mips64fpldst.ll with machine verifier enabled
Removed micro mips register classes for gp initialization because gp initialization uses pure mips64 instruction. Even when compiling for micro mips, gp initialization can be done with pure mips64 instructions.

Reviewed by Simon Dardis
Differential: D32286

llvm-svn: 301394
2017-04-26 11:40:12 +00:00
Ayman Musa 11966ab00b [X86] Add missing mayLoad/mayStore attributes to some X86 instructions (Continue)
Complete the patch committed in rL300190.

Differential Revision: https://reviews.llvm.org/D32287

llvm-svn: 301393
2017-04-26 11:34:09 +00:00
Simon Dardis 70f79251bc [mips] Rework a portion of MipsCC interface. (NFC)
r299766 contained a "conditional move or jump depends on uninitialized value"
fault, identified by valgrind. This occurred as MipsFastISel::finishCall(..)
used CCState over MipsCCState. The latter is required for the TableGen'd calling
convention logic due to reliance on pre-analyzing type information to lower call
results/returns of vectors correctly.

This change modifies the MipsCC AnalyzeCallResult to be useful with both the
SelectionDAG and FastISel lowering logic.

Reviewers: slthakur

Differential Revision: https://reviews.llvm.org/D32004

llvm-svn: 301392
2017-04-26 11:10:38 +00:00
Andrew V. Tischenko c3c6723ab5 PR31007 and PR27884 will be closed: a possibility to compile constants like 0bH is now supported in MS asm.
llvm-svn: 301390
2017-04-26 09:56:59 +00:00
Ayman Musa d9fb157845 [X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
Replace "mov{d|q}" with "movq".

Differential Revision: https://reviews.llvm.org/D32220

llvm-svn: 301386
2017-04-26 07:08:44 +00:00
Craig Topper 17a2b694c0 [InstCombine] Add test cases for opportunities to improve knownbits handling for cttz and ctlz intrinsics.
llvm-svn: 301385
2017-04-26 05:59:19 +00:00
Michael Liao a5d4537077 Remove tailing whitespaces.
llvm-svn: 301383
2017-04-26 05:27:20 +00:00
Daniel Berlin 3fef15b73f InstructionSimplify: Use braced initializer list for SimplifyQuery creation
llvm-svn: 301381
2017-04-26 04:10:02 +00:00
Daniel Berlin e8d74dce81 InstructionSimplify: Have SimplifyFPBinOp pass FastMathFlags by value, like we do everywhere else
llvm-svn: 301380
2017-04-26 04:10:00 +00:00
Daniel Berlin 5e3fcb1a2b InstructionSimplify: End our long national nightmare of ever-growing Simplify* arguments.
Summary:
Expose the internal query structure, start using it.

Note: This is the most minimal change possible i could create.  I have
trivial followups, like fixing the one use of const FastMathFlags &,
the renaming of CtxI to be consistent, etc.

This should be NFC.

Reviewers: majnemer, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32448

llvm-svn: 301379
2017-04-26 04:09:56 +00:00
Dean Michael Berris db21bde129 [XRay][tools] Remove wayward semicolon (NFC)
Follow-up to D29320.

llvm-svn: 301378
2017-04-26 03:49:49 +00:00
Dean Michael Berris 0827b7ff3e [XRay][tools] Fixup definition for stat division.
Copy-pasta error.

Follow-up to D29320.

llvm-svn: 301376
2017-04-26 01:35:23 +00:00
Davide Italiano 0316f7ae7b [AMDGPU] Garbage collect dead code. NFCI.
llvm-svn: 301375
2017-04-26 01:00:52 +00:00
Ahmed Bougacha 9547aabb26 [Support] Avoid UB in sys::fs::perms::operator~. NFC.
This was exposed in r297945 and r301220: the intermediate complement
is a 32-bit value, and casting it to 'perms' invokes UB.

llvm-svn: 301373
2017-04-26 00:48:28 +00:00
Vadzim Dambrouski d91fb8c367 [MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses.
If Select pseudo instruction doesn't have use SR, then
CMP instructions are being marked as dead and later can be
removed by MachineCSE pass. This leads to incorrect code
generation.

Differential Revision: https://reviews.llvm.org/D32473

llvm-svn: 301372
2017-04-26 00:33:59 +00:00
Vedant Kumar 77deb5c788 [gcov] Sort file info before printing it
The order in which GCOV file info is printed depends on the string hash
function. This makes some GCOV tests brittle, because the tests must be
updated whenever the hash function changes.

Sort the filenames before printing out the file info to solve the
problem. This should be relatively cheap.

Differential Revision: https://reviews.llvm.org/D32512

llvm-svn: 301371
2017-04-26 00:16:10 +00:00
Sam Clegg c5e84f14a2 revert debugging
llvm-svn: 301370
2017-04-26 00:02:39 +00:00
Sam Clegg cc182aaaef [WebAssembly] Allow for signed relocation addends
Summary:
Addends are used as offsets to addresses of globals
and can be both positive and negative.  This change
prints libObject in line with the spec and the MC
layer.

Subscribers: jfb, dschuff

Differential Revision: https://reviews.llvm.org/D32507

llvm-svn: 301369
2017-04-26 00:02:31 +00:00
Dylan McKay ff49a05565 [AVR] Do not kill the dest register for a pseudo instruction
It caused the register to later be dead, which would trigger a verifier
error.

llvm-svn: 301368
2017-04-25 23:58:20 +00:00
Matt Arsenault 36c3122ecd AMDGPU: Shift down reserved SP register like scratch wave offset
llvm-svn: 301367
2017-04-25 23:40:57 +00:00
Sanjay Patel 7a8317c09a [DAG] fix formatting of isConstantSplat(); NFC
llvm-svn: 301366
2017-04-25 23:33:28 +00:00
Matt Arsenault df58e825ad AMDGPU: Clean up VOP3NoMods pattern
There is no need to copy the operands or inspect the sources.
Also remove some unnecessary clamp/omod usage.

llvm-svn: 301363
2017-04-25 21:17:38 +00:00
Sanjay Patel 227c901dd8 [x86] add more tests for potential change in bool math folding; NFC
Also, use AVX2 to show a potential difference for 256-bit vectors.

llvm-svn: 301362
2017-04-25 20:56:14 +00:00
Konstantin Zhuravlyov 54ba4312a3 AMDGPU: Fix ValueKind code object metadata for images
Differential Revision: https://reviews.llvm.org/D32504

llvm-svn: 301360
2017-04-25 20:38:26 +00:00
Sanjay Patel 7e6ee7c00d [x86] regenerate checks; NFC
llvm-svn: 301359
2017-04-25 20:30:08 +00:00
Zachary Turner da307b64dd [llvm-pdbdump] Allow sorting / filtering by immediate padding
llvm-svn: 301358
2017-04-25 20:22:29 +00:00
Zachary Turner ee3b9c2558 [llvm-pdbdump] Dump File / Line Info to YAML.
We were already parsing and dumping this to the human readable
format, but not to the YAML format.  This does so, in preparation
for reading it in and reconstructing the line information from
YAML.

llvm-svn: 301357
2017-04-25 20:22:02 +00:00
Zachary Turner e46b4498b8 [StringExtras] Add a fromHex to complement toHex.
We already have a function toHex that will convert a string like
"\xFF\xFF" to the string "FFFF", but we do not have one that goes
the other way - i.e. to convert a textual string representing a
sequence of hexadecimal characters into the corresponding actual
bytes.  This patch adds such a function.

llvm-svn: 301356
2017-04-25 20:21:35 +00:00
Matthias Braun c36a78c3f3 SimplifyLibCalls: Fix crash on memset(notmalloc())
rdar://31520787

llvm-svn: 301352
2017-04-25 19:44:25 +00:00
Adrian Prantl dd21502482 Fix an assertion when skipping stack values in DWARF2 mode.
The fix consists of resetting LocationKind when addMachineRegExpression fails.

rdar://problem/31803010

llvm-svn: 301351
2017-04-25 19:40:53 +00:00
Petr Hosek 86611a078f [llvm-objdump] Don't attempt to print lines beyond the end of file
This may trigger a segfault in llvm-objdump when the line number stored
in debug infromation points beyond the end of file; lines in LineBuffer
are stored in std::vector which is allocated in chunks, so even if the
debug info points beyond the end of the file, this doesn't necessarily
trigger the segfault unless the line number points beyond the allocated
space.

Differential Revision: https://reviews.llvm.org/D32466

llvm-svn: 301347
2017-04-25 18:56:33 +00:00
Krzysztof Parzyszek 9ebbe5bf2e [Hexagon] Only increment debug counters if debug option is present
llvm-svn: 301346
2017-04-25 18:56:14 +00:00
Gil Rapaport 5c875c3d6f [LV] Make LIT test insensitive to basic block numbering
This patch is part of D28975's breakdown.

induction.ll encodes the specific (and rather arbitrary) numbers given to
predicated basic blocks by the unique naming mechanism, which makes it
sensitive to changes in LV's instruction generation order. This patch replaces
those specific numbers with a numeric pattern.

Differential Revision: https://reviews.llvm.org/D32404

llvm-svn: 301345
2017-04-25 18:14:24 +00:00
Stanislav Mekhanoshin f2db5434be Skip bitcasts while looking for GEP in LoadStoreVectorizer
Differential Revisison: https://reviews.llvm.org/D32101

llvm-svn: 301343
2017-04-25 18:00:08 +00:00
Simon Pilgrim 58641e4529 [X86][AVX2] Add shuffle test for PR27320 showing current codegen.
llvm-svn: 301342
2017-04-25 18:00:04 +00:00
Craig Topper 09a5878d33 [InstCombine] Remove redundant code from SimplifyUsingDistributiveLaws
The code I've removed here exists in ExpandBinOp in InstSimplify which we call into before SimplifyUsingDistributiveLaws. The code in InstSimplify looks to have been copied from here.

I verified this code doesn't fire on any lit tests. Not that that proves its definitely dead.

Differential Revision: https://reviews.llvm.org/D32472

llvm-svn: 301341
2017-04-25 17:54:12 +00:00
Craig Topper f3dbd17d0a [APInt] Use isSubsetOf, intersects, and bit counting methods to reduce temporary APInts
This patch uses various APInt methods to reduce temporary APInt creation.

This should be all of the unrelated cleanups that got buried in D32376(creating a KnownBits struct) as well as some pointed out by Simon during the review of that. Plus a few improvements to use counting instead of masking.

I've left out any places where we do something like (KnownZero & KnownOne) != 0 as I plan to add a helper method to KnownBits to ask that question and didn't want to thrash that code an additional time.

Differential Revision: https://reviews.llvm.org/D32495

llvm-svn: 301338
2017-04-25 17:46:30 +00:00
Craig Topper b3b3c29c87 [InstCombine] Fix CHECK-LABEL in two tests.
llvm-svn: 301337
2017-04-25 17:40:58 +00:00
Simon Pilgrim 6f775ba188 [X86][SSE] Add tests for PR14657 showing current codegen.
llvm-svn: 301334
2017-04-25 17:22:34 +00:00
Adrian Prantl de1a8b4efb Print complete DIExpressions in the assembler output DEBUG_VALUE comments.
The previous code was complex, incorrect, and couldn't print everything.

llvm-svn: 301333
2017-04-25 17:22:09 +00:00
Sam Clegg 03b1923725 [WebAssembly] Fix relocation count in wasm binaries with call_indirect
Subscribers: jfb, dschuff

Differential Revision: https://reviews.llvm.org/D32459

llvm-svn: 301331
2017-04-25 17:13:23 +00:00
Sam Clegg 7fb391fea3 [WebAssembly] Read global index in init expression as LEB
Subscribers: jfb, dschuff

Differential Revision: https://reviews.llvm.org/D32462

llvm-svn: 301330
2017-04-25 17:11:56 +00:00
Craig Topper 0b650d3569 [InstSimplify] Handle (~A & ~B) | (~A ^ B) -> ~A ^ B
The code Sanjay Patel moved over from InstCombine doesn't work properly if the 'and' has both inputs as nots because we used a commuted op matcher on the 'and' first. But this will bind to the first 'not' on 'and' when there could be two 'not's. InstCombine could rely on DeMorgan to ensure the 'and' wouldn't have two 'not's eventually, but InstSimplify can't rely on that.

This patch matches the xor first then checks for the ands and allows a not of either operand of the xor.

Differential Revision: https://reviews.llvm.org/D32458

llvm-svn: 301329
2017-04-25 17:01:32 +00:00
Davide Italiano 058abf1f61 [PM] Run IndirectCallPromotion only when PGO is enabled.
Differential Revision:  https://reviews.llvm.org/D32465

llvm-svn: 301327
2017-04-25 16:54:45 +00:00
Craig Topper 7603dce6b2 [InstCombine] Remove superfluous curly braces around a single line if body. NFC
llvm-svn: 301326
2017-04-25 16:48:19 +00:00
Craig Topper 2d9afa7745 [ValueTracking] Use APInt::operator|=(uint64_t) instead of creating a temporary APInt. NFC
llvm-svn: 301325
2017-04-25 16:48:14 +00:00
Craig Topper da8ff4181c [ValueTracking] Use APInt instead of auto. NFC
This is a pre-commit for a patch I'm working on to turn KnownZero/One into a struct. Once I do that the type here will be less obvious.

llvm-svn: 301324
2017-04-25 16:48:09 +00:00
Craig Topper 9c932d31e1 [ValueTracking] Use BitWidth local variable instead of re-reading it from KnownZero. NFC
This is a pre-commit for a patch that I'm working on to merge KnownZero/KnownOne into a KnownBits struct which would have had to touch this line.

llvm-svn: 301323
2017-04-25 16:48:03 +00:00
Simon Pilgrim d68785803b [SelectionDAG] Added getBuildVector(ArrayRef<SDUse>) helper.
llvm-svn: 301322
2017-04-25 16:41:28 +00:00
Simon Pilgrim 8264ed7075 [DAGCombiner] Refactor to make it easy to add support for vectors in a future patch. NFCI.
llvm-svn: 301320
2017-04-25 16:16:03 +00:00
Andrew Ng 10ebfe0684 Resubmit r301309: [DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler.
This patch reapplies r301309 with the fix to the MIR test to fix the assertion
triggered by r301309. Had trimmed a little bit too much from the MIR!

llvm-svn: 301317
2017-04-25 15:39:57 +00:00
Craig Topper ba01143193 [InstCombine] Add missing commute handling to (A | B) & (B ^ (~A)) -> (A & B)
The matching here wasn't able to handle all the possible commutes. It always assumed the not would be on the left of the xor, but that's not guaranteed.

Differential Revision: https://reviews.llvm.org/D32474

llvm-svn: 301316
2017-04-25 15:19:04 +00:00
Simon Pilgrim 37ef04ad1f [SelectionDAG] Use getBuildVector helper where possible. NFCI
llvm-svn: 301314
2017-04-25 15:10:47 +00:00
Dylan McKay 8f515b1ef7 [AVR] Support the LDWRdPtr instruction with the same Src+Dst register
llvm-svn: 301313
2017-04-25 15:09:04 +00:00
Andrew Ng 049ed153af Revert "[DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler."
This reverts commit r301309 which is causing buildbot assertion failures.

llvm-svn: 301312
2017-04-25 14:36:01 +00:00
Daniel Sanders 11e78c2bff Bring back the ability opt out of padding zero-byte functions by not providing a nop instruction.
Summary: No test case since I'm not aware of an in-tree target that needs this.

Reviewers: hans

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32398

llvm-svn: 301311
2017-04-25 14:27:27 +00:00
Andrew Ng 178c369456 [DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler.
This patch fixes a bug with the updating of DBG_VALUE's in
BreakAntiDependencies. Previously, it would only attempt to update the first
DBG_VALUE following the instruction whose register is being changed,
potentially leaving DBG_VALUE's referring to the wrong register. Now the code
will update all DBG_VALUE's that immediately follow the instruction.

This issue was detected as a result of an optimized codegen difference with
"-g" where an X86 byte/word fixup was not performed due to a DBG_VALUE
referencing the wrong register.

Differential Revision: https://reviews.llvm.org/D31755

llvm-svn: 301309
2017-04-25 13:39:49 +00:00
Simon Pilgrim 986d73cc1d [SelectionDAG] Pull out repeated getValueType calls. NFCI.
Noticed in D32391.

llvm-svn: 301308
2017-04-25 13:39:07 +00:00
Simon Pilgrim 7d65b66962 [DAGCombiner] Add vector support for (srl (trunc (srl x, c1)), c2) combine.
llvm-svn: 301305
2017-04-25 12:40:45 +00:00
Andrew Ng 1606fc0bf9 [SimplifyLibCalls] Fix infinite loop with fast-math optimization.
One of the fast-math optimizations is to replace calls to standard double
functions with their float equivalents, e.g. exp -> expf. However, this can
cause infinite loops for the following:

  float expf(float val) { return (float) exp((double) val); }

A similar inline declaration exists in the MinGW-w64 math.h header file which
when compiled with -O2/3 and fast-math generates infinite loops.

So this fix checks that the calling function to the standard double function
that is being replaced does not match the float equivalent.

Differential Revision: https://reviews.llvm.org/D31806

llvm-svn: 301304
2017-04-25 12:36:14 +00:00
Simon Pilgrim ab0446332e [SelectionDAG] Recognise splat vector isKnownToBeAPowerOfTwo one/sign bit shift cases.
llvm-svn: 301303
2017-04-25 12:29:07 +00:00
Simon Pilgrim 96611aa30c [DAGCombiner] Use SDValue::getConstantOperandVal helper where possible. NFCI.
llvm-svn: 301300
2017-04-25 10:47:35 +00:00
Sanjoy Das 561247a823 [IVUsers] Don't bail out of normalizing non-affine add recs
Summary:
In a previous change I changed SCEV's normalization / denormalization
to work with non-affine add recs.  So the bailout in IVUsers can be
removed.

Reviewers: atrick, efriedma

Reviewed By: atrick

Subscribers: davide, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32105

llvm-svn: 301298
2017-04-25 06:53:25 +00:00
Craig Topper d5775617c8 [InstCombine] Add test cases for missing commute handling in ((A ^ C) ^ B) & (B ^ A) -> (B ^ A) & ~C
llvm-svn: 301297
2017-04-25 06:47:49 +00:00
Craig Topper e4d7ac4cb1 [InstCombine] Add test cases showing failures to handle commuted patterns after tricking the operand complexity sorting.
llvm-svn: 301296
2017-04-25 06:22:17 +00:00
Craig Topper c4b48a32f0 [InstCombine] Use commutable matchers to reduce some code. NFC
llvm-svn: 301294
2017-04-25 06:02:11 +00:00
Gil Rapaport 860f0a2bad [LV] Remove redundant basic block split
This patch is part of D28975's breakdown.

Genreating the control-flow to guard predicated instructions modified to
only use SplitBlockAndInsertIfThen() for producing the if-then construct.

Differential Revision: https://reviews.llvm.org/D32224

llvm-svn: 301293
2017-04-25 05:57:22 +00:00
Serge Guelton 376508ad8d Update doc of the variadic version of getOrInsertFunction
It no longer needs a null terminator.

llvm-svn: 301292
2017-04-25 05:45:37 +00:00
Xinliang David Li f12a0faf88 [CodeExtractor]: Fixup use refs of the old phi.
Differential Revision: http://reviews.llvm.org/D32468

llvm-svn: 301291
2017-04-25 04:51:19 +00:00
Akira Hatanaka 490397fc08 [ObjCARC] Do not sink an objc_retain past a clang.arc.use.
We need to do this to prevent a miscompile which sinks an objc_retain
past an objc_release that releases the object objc_retain retains. This
happens because the top-down and bottom-up traversals each determines
the insert point for retain or release individually without knowing
where the other instruction is moved.

For example, when the following IR is fed to the ARC optimizer, the
top-down traversal decides to insert objc_retain right before
objc_release and the bottom-up traversal decides to insert objc_release
right after clang.arc.use.

(IR before ARC optimizer)
%11 = call i8* @objc_retain(i8* %10)
call void (...) @clang.arc.use(%0* %5)
call void @llvm.dbg.value(...)
call void @objc_release(i8* %6)

This reverses the order of objc_release and objc_retain, which causes
the object to be destructed prematurely.

(IR after ARC optimizer)
call void (...) @clang.arc.use(%0* %5)
call void @objc_release(i8* %6)
call void @llvm.dbg.value(...)
%11 = call i8* @objc_retain(i8* %10)

rdar://problem/30530580

llvm-svn: 301289
2017-04-25 04:06:35 +00:00
Davide Italiano 5b65f12bfa [SimplifyLibCalls] Remove a cl::opt that's been `true` for a long time.
llvm-svn: 301288
2017-04-25 03:48:47 +00:00
Sanjoy Das bbebcb6c4d Teach SCEV normalization to de/normalize non-affine add recs
Summary:
Before this change, SCEV Normalization would incorrectly normalize
non-affine add recurrences.  To work around this there was (still is)
a check in place to make sure we only tried to normalize affine add
recurrences.

We recently found a bug in aforementioned check to bail out of
normalizing non-affine add recurrences.  However, instead of fixing
the bailout, I have decided to teach SCEV normalization to work
correctly with non-affine add recurrences, making the bailout
unnecessary (I'll remove it in a subsequent change).

I've also added some unit tests (which would have failed before this
change).

Reviewers: atrick, sunfish, efriedma

Reviewed By: atrick

Subscribers: mcrosier, mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D32104

llvm-svn: 301281
2017-04-25 00:09:19 +00:00
Matt Arsenault 6d7f01e3d8 InferAddressSpaces: Use reference arguments instead of pointers
llvm-svn: 301276
2017-04-24 23:42:41 +00:00
Eugene Zelenko 1df42fac54 [Object] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 301275
2017-04-24 23:21:38 +00:00
Matt Arsenault e8d0539f20 InferAddressSpaces: Remove redundant assert
This is just asserting all the operations are handled in the
switch, which the unreachable already handles.

llvm-svn: 301270
2017-04-24 23:02:57 +00:00
Sanjay Patel 6b01b4f5a6 [ARM, x86] add more vector tests for bool math; NFC
I'm proposing a fold for increment-of-sexted-bool in:
https://reviews.llvm.org/D31944
...so we need to know what happens in more cases like these.

llvm-svn: 301269
2017-04-24 22:42:34 +00:00
Reid Kleckner df7263567a [git-llvm] Remove CR from middle of svn propget output
llvm-svn: 301268
2017-04-24 22:26:46 +00:00
Reid Kleckner 63b26f0eea Make getSlotAttributes return an AttributeSet instead of a wrapper list
Remove the temporary, poorly named getSlotSet method which did the same
thing. Also remove getSlotNode, which is a hold-over from when we were
dealing with AttributeSetNode* instead of AttributeSet.

llvm-svn: 301267
2017-04-24 22:25:02 +00:00
Reid Kleckner 4534097b0b [git-llvm] Make `push` work on CRLF files with svn:eol-style=native
Summary:
`git apply` on Windows doesn't work for files that SVN checks out as
CRLF. There is no way to force SVN to check everything out with Unix
line endings on Windows. Files with svn:eol-style=native will always
come out with CRLF, breaking `git apply`, which wants Unix line endings.
My workaround is to list all files with this property set in the change,
and run `dos2unix` on them. SVN doesn't commit a massive line ending
change because the svn:eol-style property indicates that these are text
files.

Tested on r301245.

Reviewers: zturner, jlebar

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32452

llvm-svn: 301262
2017-04-24 22:09:08 +00:00
Sanjay Patel 35c362ebbb [InstSimplify] use ConstantRange to simplify more and-of-icmps
We can simplify (and (icmp X, C1), (icmp X, C2)) to one of the icmps in many cases. 
I had to check some of these with Alive to prove to myself it's right, but everything 
seems to check out. Eg, the code in instcombine was completely ignoring predicates with 
mismatched signedness.

Handling or-of-icmps would be a follow-up step.

Differential Revision: https://reviews.llvm.org/D32143

llvm-svn: 301260
2017-04-24 21:52:39 +00:00
Simon Pilgrim 93da6660a2 [DAGCombiner] Use APInt::intersects to avoid tmp variable. NFCI.
llvm-svn: 301258
2017-04-24 21:43:21 +00:00
Matt Arsenault e22184940b AMDGPU: Slightly simplify prolog reserved register handling
Rely on MachineRegisterInfo's knowledge of used physical
registers.

Move flat_scratch initialization earlier, so the uses are visible
when making these decisions.

This will make it easier to add another reserved register
at the end for the stack pointer rather than handling another
special case.

llvm-svn: 301254
2017-04-24 21:08:32 +00:00
Galina Kistanova 5fda6a90e0 Cosmetic change.
llvm-svn: 301253
2017-04-24 21:06:29 +00:00
Saleem Abdulrasool 53972d60cb ProfileData: clean up some stale declarations (NFC)
These were removed in SVN r300381.  Remove the declarations.

llvm-svn: 301252
2017-04-24 21:05:05 +00:00
Galina Kistanova c7524f05b2 Small addition on how to add a builder.
llvm-svn: 301248
2017-04-24 20:48:40 +00:00
Artem Tamazov d6656b945e [AMDGPU][mc][tests][NFC] Bulk ISA tests: update for Gfx7/Gfx8, add for Gfx9.
llvm-svn: 301247
2017-04-24 20:42:27 +00:00
Reid Kleckner b4a2d18777 [Bitcode] Refactor attribute group writing to avoid getSlotAttributes
Summary:
That API creates a temporary AttributeList to carry an index and a
single AttributeSet. We need to carry the index in addition to the set,
because that is how attribute groups are currently encoded.

NFC

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32262

llvm-svn: 301245
2017-04-24 20:38:30 +00:00
Teresa Johnson b2c390e9f5 Update profile during memory instrinsic optimization
Summary:
Ensure that the new merge BB (which contains the rest of the original BB
after the mem op being optimized) gets a profile frequency, in case
there are additional mem ops later in the BB. Otherwise they get skipped
as the merge BB looks cold.

Reviewers: davidxl, xur

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32447

llvm-svn: 301244
2017-04-24 20:30:42 +00:00
Matt Arsenault 4474652c95 Revert "StructurizeCFG: Directly invert cmp instructions"
This reverts commit r300732. This breaks a few tests.
I think the problem is related to adding more uses of
the condition that don't yet exist at this point.

llvm-svn: 301242
2017-04-24 20:25:01 +00:00
Davide Italiano ca81fbcadb [LoopUnroll] Remove spurious newline.
Eli pointed out in the review, but I didn't squash the two commits
correctly. Pointy-hat to me.

llvm-svn: 301241
2017-04-24 20:17:38 +00:00
Frederich Munch fd96d5e1c9 Revert "Refactor DynamicLibrary so searching for a symbol will have a defined order"
The i686-mingw32-RA-on-linux bot is still having errors.

This reverts commit r301236.

llvm-svn: 301240
2017-04-24 20:16:01 +00:00
Davide Italiano 0f62eea7ff [LoopUnroll] Don't try to unroll non canonical loops.
The current Loop Unroll implementation works with loops having a
single latch that contains a conditional branch to a block outside
the loop (the other successor is, by defition of latch, the header).
If this precondition doesn't hold, avoid unrolling the loop as
the code is not ready to handle such circumstances.

Differential Revision:  https://reviews.llvm.org/D32261

llvm-svn: 301239
2017-04-24 20:14:11 +00:00
Sanjoy Das 206f65c049 [LIR] Obey non-integral pointer semantics
Summary: See http://llvm.org/docs/LangRef.html#non-integral-pointer-type

Reviewers: haicheng

Reviewed By: haicheng

Subscribers: mcrosier, mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D32196

llvm-svn: 301238
2017-04-24 20:12:10 +00:00
Saleem Abdulrasool d056cb4b74 Avoid unnecessary copies in some for loops
Use constant references rather than `const auto` which will cause the
copy constructor.  These particular cases cause issues for the swift
compiler.

llvm-svn: 301237
2017-04-24 20:01:03 +00:00
Frederich Munch 70c377a362 Refactor DynamicLibrary so searching for a symbol will have a defined order and
libraries are properly unloaded when llvm_shutdown is called.

Summary:
This was mostly affecting usage of the JIT, where storing the library handles in
a set made iteration unordered/undefined. This lead to disagreement between the
JIT and native code as to what the address and implementation of particularly on
Windows with stdlib functions:

JIT: putenv_s("TEST", "VALUE") // called msvcrt.dll, putenv_s
JIT: getenv("TEST") -> "VALUE" // called msvcrt.dll, getenv
Native: getenv("TEST") -> NULL // called ucrt.dll, getenv

Also fixed is the issue of DynamicLibrary::getPermanentLibrary(0,0) on Windows
not giving priority to the process' symbols as it did on Unix.

Reviewers: chapuni, v.g.vassilev, lhames

Reviewed By: lhames

Subscribers: danalbert, srhines, mgorny, vsk, llvm-commits

Differential Revision: https://reviews.llvm.org/D30107

llvm-svn: 301236
2017-04-24 19:55:16 +00:00
Krzysztof Parzyszek c8e8e2a046 Move value type list from TargetRegisterClass to TargetRegisterInfo
Differential Revision: https://reviews.llvm.org/D31937

llvm-svn: 301234
2017-04-24 19:51:12 +00:00
Krzysztof Parzyszek 98ab4c64c4 Revert r301231: Accidentally committed stale files
I forgot to commit local changes before commit.

llvm-svn: 301232
2017-04-24 19:48:51 +00:00
Krzysztof Parzyszek c0197066d7 Move value type list from TargetRegisterClass to TargetRegisterInfo
Differential Revision: https://reviews.llvm.org/D31937

llvm-svn: 301231
2017-04-24 19:43:45 +00:00
Matt Arsenault 0774ea267a AMDGPU: Select scratch mubuf offsets when pointer is a constant
In call sequence setups, there may not be a frame index base
and the pointer is a constant offset from the frame
pointer / scratch wave offset register.

llvm-svn: 301230
2017-04-24 19:40:59 +00:00
Matt Arsenault df6539f44b AMDGPU: Set StackGrowsUp in MCAsmInfo
Not sure what this does though.

llvm-svn: 301229
2017-04-24 19:40:51 +00:00
Stanislav Mekhanoshin bd5394be3d [AMDGPU] Merge M0 initializations
Merges equivalent initializations of M0 and hoists them into a common
dominator block. Technically the same code can be used with any
register, physical or virtual.

Differential Revision: https://reviews.llvm.org/D32279

llvm-svn: 301228
2017-04-24 19:37:54 +00:00
Piotr Padlewski 610c966a4e Handle invariant.group.barrier in BasicAA
Summary:
llvm.invariant.group.barrier returns pointer that mustalias
pointer it takes. It can't be marked with `returned` attribute,
because it would be remove easily. The other reason is that
only Alias Analysis can know about this, because if any other
pass would know it, then the result would be replaced with it's
argument, which would be invalid.

We can think about returned pointer as something that mustalias, but
it doesn't have to be bitwise the same as the argument.

Reviewers: dberlin, chandlerc, hfinkel, sanjoy

Subscribers: reames, nlewycky, rsmith, anna, amharc

Differential Revision: https://reviews.llvm.org/D31585

llvm-svn: 301227
2017-04-24 19:37:17 +00:00
Evgeniy Stepanov 9e536081fe [asan] Let the frontend disable gc-sections optimization for asan globals.
Also extend -asan-globals-live-support flag to all binary formats.

llvm-svn: 301226
2017-04-24 19:34:13 +00:00
Mandeep Singh Grang 799a2edb3d [SimplifyCFG] Fix for non-determinism in codegen
Summary: This patch fixes issues in codegen uncovered due to https://reviews.llvm.org/D26718

Reviewers: majnemer, chenli, davide

Reviewed By: davide

Subscribers: davide, arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D26726

llvm-svn: 301222
2017-04-24 19:20:45 +00:00
Krzysztof Parzyszek 44e25f37ae Move size and alignment information of regclass to TargetRegisterInfo
1. RegisterClass::getSize() is split into two functions:
   - TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const;
   - TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const;
2. RegisterClass::getAlignment() is replaced by:
   - TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const;

This will allow making those values depend on subtarget features in the
future.

Differential Revision: https://reviews.llvm.org/D31783

llvm-svn: 301221
2017-04-24 18:55:33 +00:00
Dimitry Andric 49e033f41d Don't test setting sticky bits on files for modern BSDs
Summary: In rL297945, jhenderson added methods for setting permissions
to sys::fs, but some of the unittests that attempt to set sticky bits
(01000) on files fail on modern BSDs, such as FreeBSD, NetBSD and
OpenBSD.  This is because those systems do not allow regular users to
set sticky bits on files, only on directories.  Fix it by disabling
these particular tests on modern BSDs.

Reviewers: emaste, brad, jhenderson

Reviewed By: jhenderson

Subscribers: joerg, krytarowski, llvm-commits

Differential Revision: https://reviews.llvm.org/D32120

llvm-svn: 301220
2017-04-24 18:54:48 +00:00
Adrian Prantl 083e6a5b5c Don't emit CFI instructions at the end of a function
When functions are terminated by unreachable instructions, the last
instruction might trigger a CFI instruction to be generated. However,
emitting it would be be illegal since the function (and thus the FDE
the CFI is in) has already ended with the previous instruction.

Darwin's dwarfdump --verify --eh-frame complains about this and the
specification supports this.
Relevant bits from the DWARF 5 standard (6.4 Call Frame Information):

"[The] address_range [field in an FDE]: The number of bytes of
 program instructions described by this entry."

"Row creation instructions: [...]
 The new location value is always greater than the current one."
The first quotation implies that a CFI cannot describe a target
address outside of the enclosing FDE's range.

rdar://problem/26244988

Differential Revision: https://reviews.llvm.org/D32246

llvm-svn: 301219
2017-04-24 18:45:59 +00:00
George Karpenkov 0d447d514a Updates documentation for a syntax sugar libfuzzer flag,
as implemented in https://reviews.llvm.org/D32193

llvm-svn: 301217
2017-04-24 18:39:52 +00:00
Yaxun Liu fd23a0c095 CodeGen: Add a hook for getFenceOperandTy
Currently the operand type for ATOMIC_FENCE assumes value type of a pointer in address space 0.
This is fine for most targets. However for amdgcn target, the size of pointer in address space 0
depends on triple environment. For amdgiz environment, it is 64 bit but for other environment it is
32 bit. On the other hand, amdgcn target expects 32 bit fence operands independent of the target
triple environment. Therefore a hook is need in target lowering for getting the fence operand type.

This patch has no effect on targets other than amdgcn.

Differential Revision: https://reviews.llvm.org/D32186

llvm-svn: 301215
2017-04-24 18:26:27 +00:00
Evgeniy Stepanov 58ccc0949a Revert "Compute safety information in a much finer granularity."
Use-after-free in llvm::isGuaranteedToExecute.

llvm-svn: 301214
2017-04-24 18:25:07 +00:00
Sanjay Patel 0889225f51 [InstSimplify] move (A & ~B) | (A ^ B) -> (A ^ B) from InstCombine
This is a straight cut and paste, but there's a bigger problem: if this
fold exists for simplifyOr, there should be a DeMorganized version for
simplifyAnd. But more than that, we have a patchwork of ad hoc logic
optimizations in InstCombine. There should be some structure to ensure 
that we're not missing sibling folds across and/or/xor.
 

llvm-svn: 301213
2017-04-24 18:24:36 +00:00
Matthias Braun f9796b76e9 X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC
Re-Commit of r300922 and r300923 with less aggressive assert (see
discussion at the end of https://reviews.llvm.org/D32205)

X86RegisterInfo::eliminateFrameIndex() and
X86FrameLowering::getFrameIndexReference() both had logic to compute the
base register. This consolidates the code.

Also use MachineInstr::isReturn instead of manually enumerating tail
call instructions (return instructions were not included in the previous
list because they never reference frame indexes).

Differential Revision: https://reviews.llvm.org/D32206

llvm-svn: 301211
2017-04-24 18:15:00 +00:00
Adrian Prantl f2c7997013 Use DW_OP_stack_value when reconstructing variable values with arithmetic.
When the location description of a source variable involves arithmetic
on the value itself, it needs to be marked with DW_OP_stack_value since it
is not describing the variable's location, but rather its value.

This is a follow-up to r297971 and fixes the source testcase quoted in
the comment in debuginfo-dce.ll.

rdar://problem/30725338

This reapplies r301093 without modifications.

llvm-svn: 301210
2017-04-24 18:11:42 +00:00
Adrian Prantl 283833d022 Add a testcase for DIExpression(DW_OP_stack_value)
and relax the assertion that prohibited its emission.

This fixes the assertion failure uncovered by r301093.

llvm-svn: 301209
2017-04-24 18:11:38 +00:00
Matt Arsenault 1c0ae3972f AMDGPU: Add StackPtr and FramePtr registers to MFI
These will be necessary for setting up call sequences.

llvm-svn: 301208
2017-04-24 18:05:16 +00:00
Matt Arsenault 3e02538a02 AMDGPU: Move trap lowering to DAG
Fixes traps in any block besides the entry block,
and fixes depending on a live-in physical register
by using a virtual register copy.

Also happens to stop emitting a nop in the case
debug trap is not supported.

llvm-svn: 301206
2017-04-24 17:49:13 +00:00
Davide Italiano ebd77645cc [DomPrinter] Add a way to programmatically dump a dot representation.
Differential Revision:  https://reviews.llvm.org/D32145

llvm-svn: 301205
2017-04-24 17:48:44 +00:00
Zachary Turner da949c1804 [llvm-pdbdump] Merge functionality of graphical and text dumpers.
The *real* difference between these two was that

a) The "graphical" dumper could recurse, while the text one could
   not.
b) The "text" dumper could display nested types and functions,
   while the graphical one could not.

Merge these two so that there is only one dumper that can recurse
arbitrarily deep and optionally display nested types or not.

llvm-svn: 301204
2017-04-24 17:47:52 +00:00
Zachary Turner 1690164cac [llvm-pdbdump] Re-write the record layout code to be more resilient.
This reworks the way virtual bases are handled, and also the way
padding is detected across multiple levels of aggregates, producing
a much more accurate result.

llvm-svn: 301203
2017-04-24 17:47:24 +00:00
Craig Topper 1dec281104 [APInt] Simplify the zext and sext methods
This replaces a hand written copy loop with a call to memcpy for both zext and sext.

For sext, it replaces multiple if/else blocks propagating sign information forward. Now we just do a copy, a sign extension on the last copied word, a memset, and clearUnusedBits.

Differential Revision: https://reviews.llvm.org/D32417

llvm-svn: 301201
2017-04-24 17:37:10 +00:00
George Karpenkov 0ab4f06bf1 Testing commit credentials
llvm-svn: 301200
2017-04-24 17:28:32 +00:00
Matt Arsenault 02907f3039 InstCombine: Fix assert when reassociating fsub with undef
There is logic to track the expected number of instructions
produced. It thought in this case an instruction would
be necessary to negate the result, but here it folded
into a ConstantExpr fneg when the non-undef value operand
was cancelled out by the second fsub.

I'm not sure why we don't fold constant FP ops with undef currently,
but I think that would also avoid this problem.

llvm-svn: 301199
2017-04-24 17:24:37 +00:00
Craig Topper 8b37326ae2 [APInt] Add ashrInPlace method and rewrite ashr to make a copy and then call ashrInPlace.
This patch adds an in place version of ashr to match lshr and shl which were recently added.

I've tried to make this similar to the lshr code with additions to handle the sign extension. I've also tried to do this with less if checks than the current ashr code by sign extending the original result to a word boundary before doing any of the shifting. This removes a lot of the complexity of determining where to fill in sign bits after the shifting.

Differential Revision: https://reviews.llvm.org/D32415

llvm-svn: 301198
2017-04-24 17:18:47 +00:00
Nicolai Haehnle 5dea645138 AMDGPU: Move v_readlane lane select from VGPR to SGPR
Summary:
Fix a compiler bug when the lane select happens to end up in a VGPR.

Clarify the semantic of the corresponding intrinsic to be that of
the corresponding GLSL: the lane select must be uniform across a
wave front, otherwise results are undefined.

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D32343

llvm-svn: 301197
2017-04-24 17:17:36 +00:00
Xin Tong a266923d57 Compute safety information in a much finer granularity.
Summary:
Instead of keeping a variable indicating whether there are early exits
in the loop.  We keep all the early exits. This improves LICM's ability to
move instructions out of the loop based on is-guaranteed-to-execute.

I am going to update compilation time as well soon.

Reviewers: hfinkel, sanjoy, efriedma, mkuper

Reviewed By: hfinkel

Subscribers: llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D32433

llvm-svn: 301196
2017-04-24 17:12:22 +00:00
Nicolai Haehnle 9c66185315 InstCombine/AMDGPU: Fix constant folding of llvm.amdgcn.{icmp,fcmp}
Summary:
The return value of these intrinsics should always have 0 bits for
inactive threads. This means that when all arguments are constant
and the comparison evaluates to true, the intrinsic should return
the current exec mask.

Fixes some GL_ARB_shader_ballot tests.

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D32344

llvm-svn: 301195
2017-04-24 17:08:43 +00:00
Igor Breger 87aafa073f [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.
Summary: [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.

Reviewers: zvi, t.p.northover, guyblank

Reviewed By: t.p.northover

Subscribers: dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32288

llvm-svn: 301194
2017-04-24 17:05:52 +00:00
Simon Pilgrim f60f57e6e8 [DAGCombiner] Updated bswap byte offset variable names to be more descriptive. NFC
As discussed on D32039, use MaskByteOffset to describe the variable and also pull out repeated getOpcode() calls.

llvm-svn: 301193
2017-04-24 17:05:14 +00:00
Craig Topper c6b05684c6 [APInt] Fix repeated word in comments. NFC
llvm-svn: 301192
2017-04-24 17:00:22 +00:00
Nicolai Haehnle ef449787d8 AMDGPU: Fix crash when scheduling non-memory SMRD instructions
Summary: Fixes piglit spec/arb_shader_clock/execution/*

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D32345

llvm-svn: 301191
2017-04-24 16:53:52 +00:00
Nirav Dave c799f3a809 [SDAG] Teach Chain Analysis about BaseIndexOffset addressing.
While we use BaseIndexOffset in FindBetterNeighborChains to
appropriately realize they're almost the same address and should be
improved concurrently we do not use it in isAlias using the non-index
understanding FindBaseOffset instead. Adding a BaseIndexOffset check
in isAlias like should allow indexed stores to be merged.

FindBaseOffset to be excised in subsequent patch.

Reviewers: jyknight, aditya_nandakumar, bogner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31987

llvm-svn: 301187
2017-04-24 15:37:20 +00:00
Simon Pilgrim 9111cd950d [X86][AVX] Add scheduling latency/throughput tests for missing AVX1 instructions
Had to split btver2/znver1 checks as only btver2 suppresses zeroupper

llvm-svn: 301181
2017-04-24 14:26:30 +00:00
Jonas Paulsson 1e8648577c [SystemZ] Update kill-flag in splitMove().
EarlierMI needs to clear the kill flag on the first operand in case of a store.

Review: Ulrich Weigand
llvm-svn: 301177
2017-04-24 12:40:28 +00:00
Renato Golin 54c736f833 [DWARF] Move test to x86 directory
llvm-svn: 301176
2017-04-24 12:37:11 +00:00
Philip Pfaffe f1200648bd [RegionInfo] Fix dangling references created by moving RegionInfo objects
Summary: Region objects capture the address of the creating RegionInfo instance. Because the RegionInfo class is movable, moving a RegionInfo object creates dangling references. This patch fixes these references by walking the Regions post-move, and updating references to the new parent.

Reviewers: Meinersbur, grosser

Reviewed By: Meinersbur, grosser

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31719

llvm-svn: 301175
2017-04-24 11:54:37 +00:00
Ismail Donmez 6dda31729c Add SUSE vendor
Summary: SUSE's ARM triples end with -gnueabi even though they are hard-float. This requires special handling of SUSE ARM triples. Hence we need a way to differentiate the SUSE as vendor. This CL adds that.

Reviewers: chandlerc, compnerd, echristo, rengolin

Reviewed By: rengolin

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D32426

llvm-svn: 301174
2017-04-24 11:18:29 +00:00
Nitesh Jain 0032fae179 [LLVM][MIPS] Fix different definition of off_t in LLDB and LLVM.
Reviewers: beanz

Subscribers: jaydeep, bhushan, lldb-commits, slthakur, llvm-commits, krytarowski, emaste

Differential Revision: https://reviews.llvm.org/D32125

llvm-svn: 301171
2017-04-24 10:36:46 +00:00
George Rimar ca53211beb [DWARF] - Take relocations in account when extracting ranges from .debug_ranges
I found this when investigated "Bug 32319 - .gdb_index is broken/incomplete" for LLD.

When we have object file with .debug_ranges section it may be filled with zeroes.
Relocations are exist in file to relocate this zeroes into real values later, but until that
a pair of zeroes is treated as terminator. And DWARF parser thinks there is no ranges at all
when I am trying to collect address ranges for building .gdb_index.

Solution implemented in this patch is to take relocations in account when parsing ranges.

Differential revision: https://reviews.llvm.org/D32228

llvm-svn: 301170
2017-04-24 10:19:45 +00:00
Diana Picus f53865daa4 [ARM] GlobalISel: Legalize s8 and s16 G_(S|U)DIV
We have to widen the operands to 32 bits and then we can either use
hardware division if it is available or lower to a libcall otherwise.

At the moment it is not enough to set the Legalizer action to
WidenScalar, since for libcalls it won't know what to do (it won't be
able to find what size to widen to, because it will find Libcall and not
Legal for 32 bits). To hack around this limitation, we request Custom
lowering, and as part of that we widen first and then we run another
legalizeInstrStep on the widened DIV.

llvm-svn: 301166
2017-04-24 09:12:19 +00:00
Sjoerd Meijer e5b8557d5b [Arch64AsmParser] better diagnostic for isb
Instruction isb takes as an operand either 'sy' or an immediate value. This
improves the diagnostic when the string is not 'sy' and adds a test case for
this which was missing. This also adds tests to check invalid inputs for dsb
and dmb.

Differential Revision: https://reviews.llvm.org/D32227

llvm-svn: 301165
2017-04-24 08:22:20 +00:00
Diana Picus b70e88bdec [ARM] GlobalISel: Support G_(S|U)DIV for s32
Add support for both targets with hardware division and without. For
hardware division we have to add support throughout the pipeline
(legalizer, reg bank select, instruction select). For targets without
hardware division, we only need to mark it as a libcall.

llvm-svn: 301164
2017-04-24 08:20:05 +00:00
Diana Picus e97822e1b7 [GlobalISel] Legalize G_(S|U)DIV libcalls
Treat them the same as the other binary operations that we have so far,
but on integers rather than floating point types. Extract the common
code into a helper.

This will be used in the ARM backend.

llvm-svn: 301163
2017-04-24 07:22:31 +00:00
Diana Picus 95a8aa93e2 [ARM] GlobalISel: Select G_CONSTANT with CImm operands
When selecting a G_CONSTANT to a MOVi, we need the value to be an Imm
operand. We used to just leave the G_CONSTANT operand unchanged, which
works in some cases (such as the GEP offsets that we create when
referring to stack slots). However, in many other places the G_CONSTANTs
are created with CImm operands. This patch makes sure to handle those as
well, and to error out gracefully if in the end we don't end up with an
Imm operand.

Thanks to Oliver Stannard for reporting this issue.

llvm-svn: 301162
2017-04-24 06:30:56 +00:00
Dean Michael Berris 01b880a954 [XRay][tools] Fixup for pedantic and permissive errors/warnings
Remove extraneous semicolons and fully qualify the Trace type.

Follow-up to D29320.

llvm-svn: 301161
2017-04-24 06:15:53 +00:00
Dean Michael Berris ca780b5a27 [XRay] A tool for Comparing xray function call graphs
Summary:
This is a tool for comparing the function graphs produced by the
llvm-xray graph too. It takes the form of a new subcommand of the
llvm-xray tool 'graph-diff'.

This initial version of the patch is very rough, but it is close to
feature complete.

Depends on D29363

Reviewers: dblaikie, dberris

Reviewed By: dberris

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D29320

llvm-svn: 301160
2017-04-24 05:54:33 +00:00
Craig Topper fc03d2d21f [APInt] Make behavior of ashr by BitWidth consistent between single and multi word.
Previously single word would always return 0 regardless of the original sign. Multi word would return all 0s or all 1s based on the original sign. Now single word takes into account the sign as well.

llvm-svn: 301159
2017-04-24 05:38:26 +00:00
Frederich Munch b8c236a6e4 Revert "Refactor DynamicLibrary so searching for a symbol will have a defined order.”
The changes are causing the i686-mingw32 build to fail.

This reverts commit r301153, and the changes for a separate warning on i686-mingw32 in r301155  and r301156.

llvm-svn: 301157
2017-04-24 03:33:30 +00:00
Frederich Munch 799259f320 Fix warning converting from boolean to pointer introduced in r301153.
This reverts commit r301155, which was incorrect.

llvm-svn: 301156
2017-04-24 03:12:16 +00:00
Frederich Munch c152a96350 Fix warning converting from void* to boolean introduced in r301153.
llvm-svn: 301155
2017-04-24 02:51:40 +00:00
Sanjoy Das 0cdcdf018e Revert "[SCEV] Enable SCEV verification by default in EXPENSIVE_CHECKS builds"
This reverts commit r301150.  It breaks CodeGen/Hexagon/hwloop-wrap2.ll, reverting
while I investigate.

llvm-svn: 301154
2017-04-24 02:35:19 +00:00
Frederich Munch 9f40457d61 Refactor DynamicLibrary so searching for a symbol will have a defined order and
libraries are properly unloaded when llvm_shutdown is called.

Summary:
This was mostly affecting usage of the JIT, where storing the library handles in
a set made iteration unordered/undefined. This lead to disagreement between the
JIT and native code as to what the address and implementation of particularly on
Windows with stdlib functions:

JIT: putenv_s("TEST", "VALUE") // called msvcrt.dll, putenv_s
JIT: getenv("TEST") -> "VALUE" // called msvcrt.dll, getenv
Native: getenv("TEST") -> NULL // called ucrt.dll, getenv

Also fixed is the issue of DynamicLibrary::getPermanentLibrary(0,0) on Windows
not giving priority to the process' symbols as it did on Unix.

Reviewers: chapuni, v.g.vassilev, lhames

Reviewed By: lhames

Subscribers: danalbert, srhines, mgorny, vsk, llvm-commits

Differential Revision: https://reviews.llvm.org/D30107

llvm-svn: 301153
2017-04-24 02:30:12 +00:00
Lang Hames fe3c21c879 [Orc] Fix a warning by removing an unused lambda capture.
llvm-svn: 301152
2017-04-24 01:21:23 +00:00
Sanjoy Das 25972aa82e Fix unused variables / fields warnings in release builds
llvm-svn: 301151
2017-04-24 00:46:40 +00:00
Sanjoy Das 8919303b0a [SCEV] Enable SCEV verification by default in EXPENSIVE_CHECKS builds
llvm-svn: 301150
2017-04-24 00:41:58 +00:00
Sanjoy Das bdbc4938f9 [SCEV] Fix exponential time complexity by caching
llvm-svn: 301149
2017-04-24 00:09:46 +00:00
Xinliang David Li db8d09b6c2 [PartialInine]: add triaging options
There are more bugs (runtime failures) triggered when partial
inlining is turned on. Add options to help triaging problems.

llvm-svn: 301148
2017-04-23 23:39:04 +00:00
Lang Hames 70eccdc727 [Orc] Use recursive mutexes for Error serialization.
Errors can be nested, so we need recursive locking for serialization /
deserialization.

llvm-svn: 301147
2017-04-23 23:36:13 +00:00
Sanjoy Das 148e49f3c8 [SCEV] Move towards a verifier without false positives
This change reboots SCEV's current (off by default) verification logic
to avoid false failures.  Instead of stringifying trip counts, it maps
old and new trip counts to the same ScalarEvolution "universe" and
asks ScalarEvolution to compute the difference between them.  If the
difference comes out to be a non-zero constant, then (barring some
corner cases) we *know* we messed up.

I've not yet enabled this by default since it hits an exponential time
issue in SCEV, but once I fix that, I'll flip it on by default in
EXPENSIVE_CHECKS builds.

llvm-svn: 301146
2017-04-23 23:04:45 +00:00
Simon Pilgrim 12df01c3c7 [X86][AVX] Add scheduling latency/throughput tests for some AVX1 instructions
More instructions will be added in future commits

llvm-svn: 301145
2017-04-23 22:08:17 +00:00
Sanjay Patel e0c26e0640 [InstCombine] add/move folds for [not]-xor
We handled all of the commuted variants for plain xor already,
although they were scattered around and sometimes folded less
efficiently using distributive laws. We had no folds for not-xor.

Handling all of these patterns consistently is part of trying to 
reinstate:
https://reviews.llvm.org/rL300977

llvm-svn: 301144
2017-04-23 22:00:02 +00:00
Xinliang David Li 15744ad87b [PartialInlining] Add optimization remark support
Differential Revision: http://reviews.llvm.org/D32387

llvm-svn: 301143
2017-04-23 21:40:58 +00:00
Simon Pilgrim 06d6263309 [X86][SSE] Add scheduler class support for SSE42 (PCMPGT) instructions
llvm-svn: 301142
2017-04-23 21:23:27 +00:00
Simon Pilgrim 7d71ed503d [X86][SSE] Add scheduling latency/throughput tests for (most) SSE42 instructions
llvm-svn: 301141
2017-04-23 21:00:25 +00:00
Sanjay Patel afa371fd1d [InstCombine] add tests for not-xor and remove redundant tests; NFC
llvm-svn: 301140
2017-04-23 20:59:00 +00:00
Xin Tong f98602a1ab [JumpThread] We want to fold (not thread) when all predecessor go to single BB's successor.
Summary:
In case all predecessor go to a single successor of current BB. We want to fold (not thread).

I failed to update the phi nodes properly in the last patch https://reviews.llvm.org/rL300657.

Phi nodes values are per predecessor in LLVM.

Reviewers: sanjoy

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32400

llvm-svn: 301139
2017-04-23 20:56:29 +00:00
Simon Pilgrim 19a173ac23 [X86][SSE] Add scheduling latency/throughput tests for (most) SSE41 instructions
llvm-svn: 301137
2017-04-23 20:05:21 +00:00
Simon Pilgrim 57fea6879b [X86][SSE] Add missing scheduling latency/throughput test for PINSRW
llvm-svn: 301136
2017-04-23 19:56:49 +00:00
Xin Tong b7b081262a Correct grammar. NFC
llvm-svn: 301135
2017-04-23 17:36:25 +00:00
Craig Topper 4e590e59a0 [APInt] Make clearUnusedBits branch free.
This makes the WordBits calculation calculate a value between 1 and 64 for the number of bits in the last word. Previously if the BitWidth was a multiple of 64 bits the WordBits value was 0 and we had to bail out early to avoid an undefined shift. Now with a value of 64 we no longer have an undefined shift issue.

This shows a 15-16k reduction in the size of the opt binary on my local x86-64 build.

llvm-svn: 301134
2017-04-23 17:16:26 +00:00
Craig Topper 652ca99622 [APInt] In sext single word case, use SignExtend64 and let the APInt constructor mask off any excess bits.
The current code is trying to be clever with shifts to avoid needing to clear unused bits. But it looks like the compiler is unable to optimize out the unused bit handling in the APInt constructor. Given this its better to just use SignExtend64 and have more readable code.

llvm-svn: 301133
2017-04-23 17:16:24 +00:00