Commit Graph

236039 Commits

Author SHA1 Message Date
Eric Christopher 2454a3b4e7 Rename argument for consistency.
llvm-svn: 274717
2016-07-07 01:08:23 +00:00
Eric Christopher e0d09ba443 Remove the plumbing for isDarwinABI from EmitTailCallLoadFPAndRetAddr.
llvm-svn: 274716
2016-07-07 01:08:21 +00:00
Eric Christopher 606a268bed Use the MachineFunction that we've already queried for in the function.
llvm-svn: 274715
2016-07-07 01:08:19 +00:00
Eric Christopher 327e440c6c Remove the plumbing for isDarwinABI from the PrepareTailCall hierarchy.
llvm-svn: 274714
2016-07-07 01:08:17 +00:00
Justin Lebar d9bc485cfe [CUDA] Fix "control reaches end of non-void function" warnings in Cuda.cpp.
Some compilers are too dumb to realize that the switch statement covers
all cases.

(Don't use a "default" label, because we explicitly want to get a warning
if our switch doesn't cover all the cases.)

llvm-svn: 274713
2016-07-07 01:06:59 +00:00
Sean Silva 284b0324e2 [PM] Avoid getResult on a higher level in LoopAccessAnalysis
Note that require<domtree> and require<loops> aren't needed because they
come in implicitly via the loop pass manager.

llvm-svn: 274712
2016-07-07 01:01:53 +00:00
Eric Christopher ade4eed8a7 Remove the plumbing of 64-bitness from PrepareTailCall and functions
called by it.

llvm-svn: 274711
2016-07-07 00:39:32 +00:00
Eric Christopher c16ccbe731 Sink call to get the MachineFunction into EmitTailCallStoreFPAndRetAddr
and remove the argument.

llvm-svn: 274710
2016-07-07 00:39:30 +00:00
Eric Christopher b976a392e5 Remove unnecessary subtarget parameters in PPCTargetLowering.
llvm-svn: 274709
2016-07-07 00:39:27 +00:00
Sean Silva 59fe82f4ce [PM] Port TailCallElim
llvm-svn: 274708
2016-07-06 23:48:41 +00:00
Matt Arsenault 3e96a709f1 Fix missing member initializers
This fixes the -Werror build with some combination of
warning flags.

llvm-svn: 274707
2016-07-06 23:30:54 +00:00
Adrian McCarthy 20128d94e5 Revert "Retry "Include debug info for nested structs and classes""
Reverting because it causes a test failure on build bots (Modules/ModuleDebugInfo.cpp).  Failure does not reproduce locally.

svn revision: rL274698

This reverts commit 3c5ed6599b086720aab5b8bd6941149d066806a6.

llvm-svn: 274706
2016-07-06 23:28:34 +00:00
Sean Silva b025d375a1 [PM] Port CorrelatedValuePropagation
llvm-svn: 274705
2016-07-06 23:26:29 +00:00
Junmo Park 384d376545 fix documentation comment. NFC.
llvm-svn: 274704
2016-07-06 23:18:58 +00:00
Greg Clayton df62e731ea "frame variable" and "target variable" shouldn't allow us to get the address of bitfields.
"frame variable" and "target variable" are trying to emulate the expression parser when doing things like:

(lldb) frame variable &my_struct.my_bitfield

And since the expression parser doesn't allow this, we shouldn't allow "frame variable" or "target variable" to succeed.

<rdar://problem/27208607> 

llvm-svn: 274703
2016-07-06 23:16:24 +00:00
Junmo Park 5e4bd2e7c4 Minor code cleanup. NFC.
llvm-svn: 274702
2016-07-06 23:15:18 +00:00
Greg Clayton 12261ecae4 LLDB reads incorrect memory ranges when displaying bitfields when reading bits from file memory.
Bitfields were not correctly describing their offsets within the integer that they are contained within. If we had a bitfield like:

struct MyStruct {
  uint32_t a:8;
  uint32_t b:8;
};
        
ClangASTContext::GetChildCompilerTypeAtIndex would say that child a and b had the following values in their respective ValueObjectChild objects:

name byte-size bit-size bit-offset byte-offset-from-parent
==== ========= ======== ========== =======================
"a"  4         8        0          0
"b"  4         8        0          1

So if we had a "MyStruct" at address 0x1000, we would end up reading 4 bytes from 0x1000 for "a", and 4 bytes from 0x1001 for "b". The fix for this is to fix the "child_byte_offset" and "child_bitfield_bit_offset" values returned by ClangASTContext::GetChildCompilerTypeAtIndex() so that now the table looks like:

name byte-size bit-size bit-offset byte-offset-from-parent
==== ========= ======== ========== =======================
"a"  4         8        0          0
"b"  4         8        8          0

Then we don't run into a problem when reading data from a file's section info using "target variable" before running. It will also stop us from not being able to display a bitfield values if the bitfield is in the last bit of memory before an unmapped region. (Like if address 0x1004 was unmapped and unreadable in the example above, if we tried to read 4 bytes from 0x1001, the memory read would fail and we wouldn't be able to display "b").

<rdar://problem/27208225> 

llvm-svn: 274701
2016-07-06 23:11:13 +00:00
Jason Molenda 0ecfe44092 Enhance FuncUnwinders::GetUnwindPlanAtNonCallSite to detect when we
may be in a function that is non-ABI conformant, and the eh_frame
instructions correctly describe how to unwind out of this function,
but the assembly parsing / arch default unwind plans would be 
incorrect.

This is to address a problem that Ravitheja Addepally reported in
http://reviews.llvm.org/D21221 - I wanted to try handling the problem
with this approach which I think may be more generally helpful, 
Ravitheja tested it and said it solves the problem on Linux/FreeBSD.
Ravi has a test case in http://reviews.llvm.org/D21221 that will
be committed separately.

Thanks for all the help on this one, Ravi.

llvm-svn: 274700
2016-07-06 23:06:19 +00:00
Peter Collingbourne d1d2614ee1 ThinLTO: Add test cases for promote+internalize.
This tests the effect of both promotion and internalization on a module,
and helps show that D21883 is NFC wrt promotion+internalization.

Differential Revision: http://reviews.llvm.org/D21915

llvm-svn: 274699
2016-07-06 22:53:02 +00:00
Adrian McCarthy 0a8cb648c9 Retry "Include debug info for nested structs and classes"
This should work now that the LLVM-side of the change has landed successfully.

Original Differential Revision: http://reviews.llvm.org/D21705

This reverts commit a30322e861c387e1088f47065d0438c6bb019879.

llvm-svn: 274698
2016-07-06 22:39:15 +00:00
Enrico Granata 14cb4f96a0 Fix the installation of the vector<bool> data formatters in order to restore functionality
llvm-svn: 274697
2016-07-06 22:35:34 +00:00
Sanjay Patel 65a51c25c1 [InstCombine] enhance (select X, C1, C2 --> ext X) to handle vectors
By replacing dyn_cast of ConstantInt with m_Zero/m_One/m_AllOnes, we
allow these transforms for splat vectors.

Differential Revision: http://reviews.llvm.org/D21899

llvm-svn: 274696
2016-07-06 22:23:01 +00:00
Aaron Ballman c1c6823976 Ensuring the bit-fields have the same type; MSVC will place the fields in different allocation units otherwise.
llvm-svn: 274695
2016-07-06 22:06:19 +00:00
Vedant Kumar af0dd931e6 Minor formatting change, NFC
The rest of llvm-cov does not use LLVM_ATTRIBUTE_UNUSED. Leave unused
params unnamed to be consistent.

llvm-svn: 274694
2016-07-06 22:02:55 +00:00
Manman Ren 524ca27b90 Add testing coverage for r274582.
llvm-svn: 274693
2016-07-06 22:01:28 +00:00
Michael Kuperstein 1ef6c59b1d [X86] Transform setcc + movzbl into xorl + setcc
xorl + setcc is generally the preferred sequence due to the partial register
stall setcc + movzbl suffers from. As a bonus, it also encodes one byte smaller.

This fixes PR28146.

Differential Revision: http://reviews.llvm.org/D21774

llvm-svn: 274692
2016-07-06 21:56:18 +00:00
Devin Coughlin 0a53fdf00c [analyzer] Suppress false positives in std::shared_ptr
The analyzer does not model C++ temporary destructors completely and so
reports false alarms about leaks of memory allocated by the internals of
shared_ptr:

  std::shared_ptr<int> p(new int(1));
  p = nullptr; // 'Potential leak of memory pointed to by field __cntrl_'

This patch suppresses all diagnostics where the end of the path is inside
a method in std::shared_ptr.

It also reorganizes the tests for suppressions in the C++ standard library
to use a separate simulated header for library functions with bugs
that were deliberately inserted to test suppression. This will prevent
other tests from using these as models.

rdar://problem/23652766

llvm-svn: 274691
2016-07-06 21:52:55 +00:00
Rafael Espindola 9639ec1e66 Read the implicit addend of R_386_GOT32X.
llvm-svn: 274690
2016-07-06 21:48:50 +00:00
Justin Lebar 4b926a29fd [CUDA] Add missing namespace qualification on CudaArch in Action.cpp.
Fix build breakage with MSVC.

llvm-svn: 274689
2016-07-06 21:45:44 +00:00
Vedant Kumar 4c01092a25 [llvm-cov] Add support for creating html reports
Based on a patch by Harlan Haskins!

Differential Revision: http://reviews.llvm.org/D18278

llvm-svn: 274688
2016-07-06 21:44:05 +00:00
Rafael Espindola d03e659140 Recognize R_386_GOT32X.
We don't relax it, but we at least recognize it.

llvm-svn: 274687
2016-07-06 21:41:39 +00:00
Matthias Braun ad0032a649 AArch64: Change modeling of zero cycle zeroing.
On CPUs with the zero cycle zeroing feature enabled "movi v.2d" should
be used to zero a vector register. This was previously done at
instruction selection time, however the register coalescer sometimes
widened multiple vregs to the Q width because of that leading to extra
spills. This patch leaves the decision on how to zero a register to the
AsmPrinter phase where it doesn't affect register allocation anymore.

This patch also sets isAsCheapAsAMove=1 on FMOVS0, FMOVD0.

This fixes http://llvm.org/PR27454, rdar://25866262

Differential Revision: http://reviews.llvm.org/D21826

llvm-svn: 274686
2016-07-06 21:39:33 +00:00
Matthias Braun 332bb5c236 AArch64: Replace a RegScavenger instance with LivePhysRegs
findScratchNonCalleeSaveRegister() just needs a simple liveness
analysis, use LivePhysRegs for that as it is simpler and does not depend
on the kill flags.

This commit adds a convenience function available() to LivePhysRegs:
This function returns true if the given register is not reserved and
neither the register nor any of its aliases are alive.

Differential Revision: http://reviews.llvm.org/D21865

llvm-svn: 274685
2016-07-06 21:31:27 +00:00
Davide Italiano f296a7eeae [ELF] Introduce a flag to parse response files according to windows rules.
Differential Revision:  http://reviews.llvm/org/D22015

llvm-svn: 274684
2016-07-06 21:24:34 +00:00
Enrico Granata 106aae5108 Because of our lifetime rules w.r.t. ValueObjects and ClusterManagers, synthetic children caching is a tricky area:
- if a synthetic child comes from the same hierarchy as its parent object, then it can't be cached by SharedPointer inside the synthetic provider, or it will cause a reference loop;
- but, if a synthetic child is made from whole cloth (e.g. from an expression, a memory region, ...), then it better be cached by SharedPointer, or it will be cleared out and cause an assert() to fail if used at a later point

For most cases of self-rooted synthetic children, we have a flag we set "IsSyntheticChildrenGenerated", but we were not using it to track caching. So, what ended up happening is each provider would set up its own cache, and if it got it wrong, a hard to diagnose crash would ensue

This patch fixes that by centralizing caching in ValueObjectSynthetic - if a provider returns a self-rooted child (as per the flag), then it gets cached centrally by the ValueObject itself
This cache is used only for lifetime management and not later retrieval of child values - a different cache handles that (because we might have a mix of self-rooted and properly nested child values for the same parent, we can't trivially use this lifetime cache for retrieval)

Fixes rdar://26480007

llvm-svn: 274683
2016-07-06 21:24:28 +00:00
Justin Lebar 710c13167f [CUDA] Rename member variables in CudaInstallationDetector.
Summary:
Remove the "Cuda" prefix from these variables -- it's clear that they
related to CUDA given their containing type.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D21868

llvm-svn: 274682
2016-07-06 21:21:43 +00:00
Justin Lebar 629076178a [CUDA] Add utility functions for dealing with CUDA versions / architectures.
Summary:
Currently our handling of CUDA architectures is scattered all around
clang.  This patch centralizes it.

A key advantage of this centralization is that you can now write a C++
switch on e.g. CudaArch and get a compile error if you don't handle one
of the enum values.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D21867

llvm-svn: 274681
2016-07-06 21:21:39 +00:00
Justin Lebar ef1aaac3cc [CUDA] Add support for CUDA 8 and sm_60-62.
Summary: Also add sm_32, which was missing.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D21778

llvm-svn: 274680
2016-07-06 21:21:14 +00:00
Chad Rosier 232e29ebea [MemorySSA] Reinstate the legacy printer and verifier.
Differential Revision: http://reviews.llvm.org/D22058

llvm-svn: 274679
2016-07-06 21:20:47 +00:00
Rafael Espindola a29971faeb Add initial support for R_386_GOT32X.
This adds it only for movl mov@GOT(%reg), %reg.

llvm-svn: 274678
2016-07-06 21:19:11 +00:00
David Majnemer 36a6e00d6e [CodeGen, DebugInfo] Use hasLocalLinkage instead of hasInternalLinkage
For the purpose of emitting debug info, entities with private linkage
should be treated the same as internal linkage.  While this doesn't
change anything in practice, it makes the code a little less confusing.

llvm-svn: 274677
2016-07-06 21:07:53 +00:00
David Majnemer 7abd269aa9 [CodeView] Emit an appropriate symbol kind for globals
We emitted debug info for globals/functions as if they all had external
linkage.  Instead, emit local symbol records when appropriate.

llvm-svn: 274676
2016-07-06 21:07:47 +00:00
David Majnemer e1e7372e93 [CodeView] Unions are always sealed
It is impossible to inherit from a union.  We are missing a way to
represent this in IR for classes/structs...

llvm-svn: 274675
2016-07-06 21:07:42 +00:00
Justin Lebar 6f9d01bbd5 [NVPTX] Add sm_60, sm_61, sm_62 targets to LLVM.
Reviewers: tra

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D22068

llvm-svn: 274674
2016-07-06 21:06:10 +00:00
Haicheng Wu a95cd1267f [LIR] Fix mis-compilation with unwinding.
To fix PR27859, bail out if there is an instruction may throw.

Differential Revision: http://reviews.llvm.org/D20638

llvm-svn: 274673
2016-07-06 21:05:40 +00:00
Derek Bruening 34913f3beb [esan|wset] Ensure SIGSEGV is not blocked
Summary:
Adds interception of sigprocmask and pthread_sigmask to esan so that the
working set tool can prevent SIGSEGV from being blocked.  A blocked SIGSEGV
results in crashes due to our lazy shadow page allocation scheme.

Adds new sanitizer helper functions internal_sigemptyset and
internal_sigismember.

Adds a test to workingset-signal-posix.cpp.

Reviewers: aizatsky

Subscribers: vitalybuka, zhaoqin, kcc, eugenis, llvm-commits, kubabrecka

Differential Revision: http://reviews.llvm.org/D22063

llvm-svn: 274672
2016-07-06 21:04:48 +00:00
Etienne Bergeron 01e8082418 Fix cmake generation on Apple for interception unittests
llvm-svn: 274671
2016-07-06 21:02:32 +00:00
Sanjay Patel ea23436638 [InstCombine] use more specific pattern matchers; NFCI
Follow-up from r274465: we don't need to capture the value in these cases, 
so just match the constant that we're looking for. m_One/m_Zero work with
vector splats as well as scalars.

llvm-svn: 274670
2016-07-06 21:01:26 +00:00
Derek Bruening 24fe829825 [esan|wset] Further reduce flakiness of sampling test
Enhances the sampling test to try and reduce flakiness further by
increasing the workload to ensure a few samples are gathered.

llvm-svn: 274669
2016-07-06 20:27:44 +00:00
Piotr Padlewski 6deaa6afae Add 'thinlto_src_module' metadata to imported function
Added metadata to be able to make statistics on how many functions
that have been imported have been removed. Also module name might
be helpfull when debugging.

Reviewers: tejohnson, eraman

Subscribers: mehdi_amini, llvm-commits

Differential Revision: http://reviews.llvm.org/D21943

llvm-svn: 274668
2016-07-06 20:26:25 +00:00