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4 Commits

Author SHA1 Message Date
Andrew Trick 8523b16ff5 Instruction scheduling itinerary for Intel Atom. 
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.

Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.

Adds a test to verify that the scheduler is working.

Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.

Patch by Preston Gurd!

llvm-svn: 149558
 2012-02-01 23:20:51 +00:00
Dan Gohman 40503396da Eliminate more uses of llvm-as and llvm-dis. 
llvm-svn: 81290
 2009-09-08 23:54:48 +00:00
Dan Gohman 54ec4bfa5f Change the x86 assembly output to use tab characters to separate the 
mnemonics from their operands instead of single spaces. This makes the
assembly output a little more consistent with various other compilers
(f.e. GCC), and slightly easier to read. Also, update the regression
tests accordingly.

llvm-svn: 40648
 2007-07-31 20:11:57 +00:00
Evan Cheng dcc3451f8a New test. 
llvm-svn: 40020
 2007-07-18 21:39:16 +00:00