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31048 Commits

Author SHA1 Message Date
Reid Spencer a962d18774 For PR1205: 
Convert some calls to ConstantInt::getZExtValue() into getValue() and
use APInt facilities in the subsequent computations.

llvm-svn: 35294
 2007-03-24 00:42:08 +00:00
Evan Cheng b7051f596a Adjust offset to compensate for big endian machines. 
llvm-svn: 35293
 2007-03-24 00:02:43 +00:00
Anton Korobeynikov 8aae2d7e1c Autodetect MMX & SSE stuff for AMD processors 
llvm-svn: 35292
 2007-03-23 23:46:48 +00:00
Bill Wendling 3ab6e72143 This is dead. DEAD I tells you!! 
llvm-svn: 35291
 2007-03-23 22:42:04 +00:00
Bill Wendling 871c77cda1 PR1260: 
Add final support to get the QT example to compile.

llvm-svn: 35290
 2007-03-23 22:35:46 +00:00
Evan Cheng a883b58caf Make sure SEXTLOAD of the specific type is supported on the target. 
llvm-svn: 35289
 2007-03-23 22:13:36 +00:00
Reid Spencer 562b715dd1 Add more test cases for APIntified InstCombine. 
llvm-svn: 35288
 2007-03-23 21:57:47 +00:00
Reid Spencer 959a21d3dc For PR1205: 
* APIntify visitAdd and visitSelectInst
* Remove unused uint64_t versions of utility functions that have been
  replaced with APInt versions.
This completes most of the changes for APIntification of InstCombine. This
passes llvm-test and llvm/test/Transforms/InstCombine/APInt.

Patch by Zhou Sheng.

llvm-svn: 35287
 2007-03-23 21:24:59 +00:00
Evan Cheng e2f5f24e8e Also replace uses of SRL if that's also folded during ReduceLoadWidth(). 
llvm-svn: 35286
 2007-03-23 20:55:21 +00:00
Reid Spencer ea8b07ee6b Add test case for testing InstCombine with arbitrary precision integer 
types. These tests mimic the integer test cases in the normal InstCombine
test suite but use "strange" integer bit widths.

Most tests written by Zhou Sheng, a few by me.

llvm-svn: 35284
 2007-03-23 20:48:34 +00:00
Reid Spencer 6d39206bc2 For PR1205: 
APIntify visitDiv, visitMul and visitRem.

Patch by Zhou Sheng.

llvm-svn: 35283
 2007-03-23 20:05:17 +00:00
Chris Lattner 12b89cc148 switch AddReachableCodeToWorklist from being recursive to being iterative. 
llvm-svn: 35282
 2007-03-23 19:17:18 +00:00
Reid Spencer 6274c72ee1 For PR1205: 
APIntify several utility functions supporting logical operators and shift
operators.

Patch by Zhou Sheng.

llvm-svn: 35281
 2007-03-23 18:46:34 +00:00
Dan Gohman ac8fe43024 Add the 'explicit' keyword to several constructors that accept one 
argument that don't appear intended as implicit-conversion operators.

llvm-svn: 35280
 2007-03-23 18:44:11 +00:00
Duncan Sands 96719d1667 Test handling of switches with wide case ranges. 
llvm-svn: 35279
 2007-03-23 07:17:52 +00:00
Reid Spencer d96dc9020a Fix constant fold of div by zero and rem by zero to match IEEE 754 
requirements. We must return NaN in some cases and correctly signed
infinity in other cases. Passes CFP2006 (not that that says much).

llvm-svn: 35277
 2007-03-23 05:33:23 +00:00
Zhou Sheng 0900993ebc Make the "KnownZero ^ TypeMask" computation just once. 
llvm-svn: 35276
 2007-03-23 03:13:21 +00:00
Zhou Sheng 755f04b5d7 Simplify the code. 
llvm-svn: 35275
 2007-03-23 02:39:25 +00:00
Evan Cheng a824e79f06 A couple of bug fixes for reducing load width xform: 
1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.

llvm-svn: 35274
 2007-03-23 02:16:52 +00:00
Reid Spencer b722f2b110 For PR1205: 
APInt support for logical operators in visitAnd, visitOr, and visitXor.

Patch by Zhou Sheng.

llvm-svn: 35273
 2007-03-22 22:19:58 +00:00
Duncan Sands 14b191c687 The -funcresolve and -raise options no longer exist. 
llvm-svn: 35272
 2007-03-22 21:06:50 +00:00
Reid Spencer 4154e732e6 For PR1205: 
* APIntify commonIntCastTransforms
* APIntify visitTrunc
* APIntify visitZExt

Patch by Zhou Sheng.

llvm-svn: 35271
 2007-03-22 20:56:53 +00:00
Reid Spencer c3e3b8a32f For PR1205: 
* Re-enable the APInt version of MaskedValueIsZero.
* APIntify the Comput{Un}SignedMinMaxValuesFromKnownBits functions
* APIntify visitICmpInst.

llvm-svn: 35270
 2007-03-22 20:36:03 +00:00
Bill Wendling 7c17fbc5b7 We generate a shufflevector instruction, so we don't need the builtin 
intrinsic.

llvm-svn: 35269
 2007-03-22 20:29:26 +00:00
Jeff Cohen 17a19c917f Cleanup obsolete stuff. 
llvm-svn: 35268
 2007-03-22 19:13:29 +00:00
Jeff Cohen d530a17cef Be more explicit concerning argument sizes. 
Use VC++ byteswap intrinsics.

llvm-svn: 35267
 2007-03-22 19:11:57 +00:00
Bill Wendling d551a18783 Support added for shifts and unpacking MMX instructions. 
llvm-svn: 35266
 2007-03-22 18:42:45 +00:00
Dan Gohman dcb291faa4 Change uses of Function::front to Function::getEntryBlock for readability. 
llvm-svn: 35265
 2007-03-22 16:38:57 +00:00
Evan Cheng 085b8d7ae2 Unbreak non-debug builds. 
llvm-svn: 35264
 2007-03-22 07:43:51 +00:00
Reid Spencer 02b0b57101 Make this test actually match the generated code. 
llvm-svn: 35263
 2007-03-22 02:53:05 +00:00
Reid Spencer 9d1700e188 Add noreturn function attribute. 
llvm-svn: 35262
 2007-03-22 02:18:56 +00:00
Reid Spencer 8f0bcc6b89 Add tests for nounwind and noreturn function attributes. 
llvm-svn: 35261
 2007-03-22 02:15:17 +00:00
Reid Spencer 478dcd0239 Add the NoUnwind function attribute. 
llvm-svn: 35260
 2007-03-22 02:14:48 +00:00
Reid Spencer 32096786f1 Regenerate. 
llvm-svn: 35259
 2007-03-22 02:14:08 +00:00
Reid Spencer a483577d21 Add support for the noreturn and nounwind function attributes. 
llvm-svn: 35258
 2007-03-22 02:13:23 +00:00
Nick Lewycky b0da7ed9c8 Fix broken optimization disabled by a logic bug. 
Analyze GEPs. If the indices are all zero, transfer whether the pointer is
known to be not null through the GEP.

Add a few more cases for xor and shift instructions.

llvm-svn: 35257
 2007-03-22 02:02:51 +00:00
Reid Spencer 05dbb9d002 Preview nounwind function attribute. 
llvm-svn: 35256
 2007-03-22 02:02:11 +00:00
Evan Cheng 9a95c6e7db Another test case. 
llvm-svn: 35255
 2007-03-22 01:55:16 +00:00
Evan Cheng 464dc9b74c More opportunities to reduce load size. 
llvm-svn: 35254
 2007-03-22 01:54:19 +00:00
Evan Cheng 51ace3b1f6 Test case for PR1257 
llvm-svn: 35253
 2007-03-22 01:52:57 +00:00
Evan Cheng a20815e157 Fix for PR1257. Bug in live range shortening as a result of copy coalescing 
where the destination is dead.

llvm-svn: 35252
 2007-03-22 01:26:05 +00:00
Reid Spencer fa9925e263 Test case for PR1248 
llvm-svn: 35251
 2007-03-22 00:49:40 +00:00
Reid Spencer be7e9bc494 For PR1145: 
Add the NoUnwindAttribute to allow explicit marking of functions that do
not unwind the stack via the unwind instruction. This is akin to gcc's
NoThrow attribute and used for optimizing exception handling.

llvm-svn: 35250
 2007-03-22 00:32:02 +00:00
Anton Korobeynikov be9c93c79c More LangRef fixes. Corrected names of intrinsics. 
llvm-svn: 35249
 2007-03-22 00:02:17 +00:00
Anton Korobeynikov 640bbe0a15 Fixed va_arg example. Reported by Roman Samoilov 
llvm-svn: 35248
 2007-03-21 23:58:04 +00:00
Reid Spencer f40711637f For PR1248: 
* Fix some indentation and comments in InsertRangeTest
* Add an "IsSigned" parameter to AddWithOverflow and make it handle signed
  additions. Also, APIntify this function so it works with any bitwidth.
* For the icmp pred ([us]div %X, C1), C2 transforms, exit early if the
  div instruction's RHS is zero.
* Finally, for icmp pred (sdiv %X, C1), -C2, fix an off-by-one error. The
  HiBound needs to be incremented in order to get the range test correct.

llvm-svn: 35247
 2007-03-21 23:19:50 +00:00
Reid Spencer 925e8aa370 Fix a comment. 
llvm-svn: 35246
 2007-03-21 22:22:19 +00:00
Dale Johannesen 0c6bb5eab7 repair x86 performance, dejagnu problems from previous change 
llvm-svn: 35245
 2007-03-21 21:51:52 +00:00
Anton Korobeynikov 4ad4bcdc2d Add TODO list for MSIL backend 
llvm-svn: 35244
 2007-03-21 21:48:59 +00:00
Anton Korobeynikov 91549cef78 Add Roman to credits 
llvm-svn: 35243
 2007-03-21 21:45:25 +00:00
Anton Korobeynikov aa3090d815 Let the new backend begin! 
llvm-svn: 35242
 2007-03-21 21:38:25 +00:00
Dale Johannesen a827d03154 add generation of unnecessary push/pop around calls 
llvm-svn: 35241
 2007-03-21 21:16:39 +00:00
Evan Cheng a7f81f29ce New test case. 
llvm-svn: 35240
 2007-03-21 20:14:56 +00:00
Evan Cheng d63baead9b fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits)) 
llvm-svn: 35239
 2007-03-21 20:14:05 +00:00
Reid Spencer 2f8fa50bb3 Regenerate. 
llvm-svn: 35237
 2007-03-21 17:27:53 +00:00
Reid Spencer 20337a5e76 For PR1243: 
Okay, really fix it this time. Make sure the CurFun.Linkage is set early
and consolidate some duplicate code.

llvm-svn: 35236
 2007-03-21 17:26:41 +00:00
Reid Spencer 77e0bba30c Regenerate. 
llvm-svn: 35235
 2007-03-21 17:15:50 +00:00
Reid Spencer 6ae04faffb For PR1256: 
Make Signedness information pervasive throughout all types and values.
There is no easy way to get around this. Because the GEP instruction can
index through an arbitrarily complex value structure, it is necessary to
keep track of signedness information throughout that structure. This change
makes Signedness a full class, capable of representing Signedness in
arbitrarily shaped types. The class is then used throughout llvm-upgrade to
track signedness and differentiate between globals, locals, and functions
based on their signedness.

For PR1243:
This patch also removes bogus warnings about renaming internal globals. It
now only emits such warnings when renaming non-internal globals because
they may affect linkage.

llvm-svn: 35234
 2007-03-21 17:14:36 +00:00
Nicolas Geoffray 4ea5217880 Protect R31's frame offset from being used by callee-saved registers, when R31 
is the frame pointer.

llvm-svn: 35233
 2007-03-21 16:44:14 +00:00
Zhou Sheng 0458c1db71 Fix a bug in getAllOnesValue() which broke 
some test cases for bitwidth > 64.

llvm-svn: 35232
 2007-03-21 04:34:37 +00:00
Evan Cheng 61eee86487 Mark re-materializable instructions. 
llvm-svn: 35230
 2007-03-21 00:16:56 +00:00
Evan Cheng cba9538499 Updated. 
llvm-svn: 35229
 2007-03-20 22:32:39 +00:00
Evan Cheng 3578dd61c6 Potential spiller improvement. 
llvm-svn: 35228
 2007-03-20 22:22:38 +00:00
Dale Johannesen bacf4acf65 do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)

llvm-svn: 35227
 2007-03-20 21:54:54 +00:00
Dale Johannesen d05a1a2ade maintain LiveIn when splitting blocks (register scavenging needs it) 
llvm-svn: 35226
 2007-03-20 21:35:06 +00:00
Devang Patel eb5d241d00 DominanceFrontier::calculate(). 
Avoid recursion, Use iterative algorithm.

llvm-svn: 35225
 2007-03-20 21:25:31 +00:00
Jeff Cohen 1baf5c84ab Fix some VC++ warnings. 
llvm-svn: 35224
 2007-03-20 20:43:18 +00:00
Jeff Cohen e06855e684 Fix (and simplify) 48-bit byte swap. 
Get pos/neg infinity the correct way.

llvm-svn: 35223
 2007-03-20 20:42:36 +00:00
Devang Patel b39885d23d LoopSimplify::FindPHIToPartitionLoops() 
Use ETForest instead of DominatorSet.

llvm-svn: 35222
 2007-03-20 20:19:48 +00:00
Devang Patel 1758cb50de LoopSimplify::FindPHIToPartitionLoops() 
Use ETForest instead of DominatorSet.

llvm-svn: 35221
 2007-03-20 20:18:12 +00:00
Lauro Ramos Venancio 971aa18867 Code clean up. 
llvm-svn: 35220
 2007-03-20 20:09:03 +00:00
Evan Cheng 550cf0369c Minor bug. 
llvm-svn: 35219
 2007-03-20 19:32:11 +00:00
Lauro Ramos Venancio a88c4a74f3 bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted: 
mov lr, pc
    bx lr
So, the function was not called.

llvm-svn: 35218
 2007-03-20 17:57:23 +00:00
Chris Lattner cdf6823e10 llvm-gcc now requires -fnested-functions to enable them in C. 
llvm-svn: 35217
 2007-03-20 17:34:31 +00:00
Reid Spencer 98f0709618 Break up huge line so that this file is almost readable. 
llvm-svn: 35216
 2007-03-20 17:27:19 +00:00
Reid Spencer 8d364d0e17 Regenerate. 
llvm-svn: 35215
 2007-03-20 17:19:31 +00:00
Reid Spencer 0ad5cebb09 Don't delete things before their last use (avoids bad reads). 
llvm-svn: 35214
 2007-03-20 17:18:33 +00:00
Lauro Ramos Venancio 25878b45f5 CopyToReg source operand can be a physical register. 
llvm-svn: 35213
 2007-03-20 16:46:44 +00:00
Duncan Sands 76e4fdf879 Test handling of structs with multiple variable-sized fields. 
llvm-svn: 35212
 2007-03-20 14:13:20 +00:00
Zhou Sheng b3949340c8 Simplify isHighOnes(). 
llvm-svn: 35211
 2007-03-20 12:49:06 +00:00
Duncan Sands dd066c34a9 Ada testcase for structs with multiple variable sized fields. 
llvm-svn: 35210
 2007-03-20 09:54:02 +00:00
Duncan Sands 2fd6a4bef5 Test that ARRAY_RANGE_REF returns an array not an element. 
llvm-svn: 35209
 2007-03-20 09:50:42 +00:00
Evan Cheng 0e3278e505 First cut trivial re-materialization support. 
llvm-svn: 35208
 2007-03-20 08:13:50 +00:00
Evan Cheng 9e7b838469 Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool. 
llvm-svn: 35207
 2007-03-20 08:11:30 +00:00
Evan Cheng 39eb62ea3b New entry. 
llvm-svn: 35206
 2007-03-20 08:10:17 +00:00
Evan Cheng 61f39d186c Added MRegisterInfo hook to re-materialize an instruction. 
llvm-svn: 35205
 2007-03-20 08:09:38 +00:00
Chris Lattner 3e1d917e80 Two changes: 
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll

llvm-svn: 35204
 2007-03-20 06:08:29 +00:00
Chris Lattner d95d748a4d These functions should use shll, not lea. 
llvm-svn: 35203
 2007-03-20 06:01:41 +00:00
Chris Lattner f806e1cdbc fix indentation 
llvm-svn: 35202
 2007-03-20 02:25:53 +00:00
Zhou Sheng 4852dc1cd5 Correct the name: isStrictPositive --> isStrictlyPositive. 
llvm-svn: 35201
 2007-03-20 02:18:16 +00:00
Chris Lattner cc411d66d0 Add a dtor to fix leaks from all clients of BitVector. 
llvm-svn: 35200
 2007-03-20 02:10:56 +00:00
Reid Spencer 6fb989c5cd Regenerate. 
llvm-svn: 35199
 2007-03-20 01:13:36 +00:00
Reid Spencer d05bc52fec Plug some PATypeHolder memory leaks. 
llvm-svn: 35198
 2007-03-20 01:13:00 +00:00
Dale Johannesen e3a02be5f1 use types of loads and stores, not address, in CheckForIVReuse 
llvm-svn: 35197
 2007-03-20 00:47:50 +00:00
Dale Johannesen 8447d34903 fix obvious comment bug 
llvm-svn: 35196
 2007-03-20 00:30:56 +00:00
Chris Lattner af867a3937 Fix a nasty memory leak, caused by my revamp of the value symbol table. 
llvm-svn: 35195
 2007-03-20 00:18:10 +00:00
Reid Spencer 6682721316 Make isOneBitSet faster by using APInt::isPowerOf2. Thanks Chris. 
llvm-svn: 35194
 2007-03-20 00:16:52 +00:00
Reid Spencer 09f4eb1098 Make this test a little simpler/faster. 
llvm-svn: 35193
 2007-03-19 23:36:19 +00:00
Reid Spencer eb0a221186 Add test case for PR1261, currently XFAILed. 
llvm-svn: 35192
 2007-03-19 23:28:16 +00:00
Devang Patel 1d3bb03aa1 Document LoopPass. 
llvm-svn: 35191
 2007-03-19 22:21:25 +00:00
Reid Spencer cc031a43aa APIntify the isHighOnes utility function. 
llvm-svn: 35190
 2007-03-19 21:29:50 +00:00
Reid Spencer b1ec2e8ec7 Fix coding standards violation. 
llvm-svn: 35189
 2007-03-19 21:19:02 +00:00
Reid Spencer ef599b0786 Implement isMaxValueMinusOne in terms of APInt instead of uint64_t. 
Patch by Sheng Zhou.

llvm-svn: 35188
 2007-03-19 21:10:28 +00:00
Reid Spencer 3b93db72b4 Implement isMinValuePlusOne using facilities of APInt instead of uint64_t 
Patch by Zhou Sheng.

llvm-svn: 35187
 2007-03-19 21:08:07 +00:00
Reid Spencer 129a86792d Implement isOneBitSet in terms of APInt::countPopulation. 
llvm-svn: 35186
 2007-03-19 21:04:43 +00:00
Reid Spencer 450434ed65 1. Use APInt::getSignBit to reduce clutter (patch by Sheng Zhou) 
2. Replace uses of the "isPositive" utility function with APInt::isPositive

llvm-svn: 35185
 2007-03-19 20:58:18 +00:00
Reid Spencer 03c31d5bb0 Remove a redundant clause in an if statement. 
Patch by Sheng Zhou.

llvm-svn: 35184
 2007-03-19 20:47:50 +00:00
Reid Spencer a7bed60ab3 Regenerate. 
llvm-svn: 35183
 2007-03-19 20:40:51 +00:00
Reid Spencer 363fd46199 Fix test/Assembler/2007-03-19-NegValue.ll by using the new "isSigned" 
parameter on ConstantInt::get to indicate the signedness of the intended
value.

llvm-svn: 35182
 2007-03-19 20:40:22 +00:00
Reid Spencer 362fb29d80 Allow ConstantInt::get(Ty, uint64_t) to interpret the 64-bit values as a 
negative number. This is needed to fix test/Assembler/2007-03-19-NegValue.ll

llvm-svn: 35181
 2007-03-19 20:39:08 +00:00
Reid Spencer 6fae35acd3 Implement extension of sign bits for negative values in the uint64_t 
constructor. This helps to fix test/Assembler/2007-03-19-NegValue.ll

llvm-svn: 35180
 2007-03-19 20:37:47 +00:00
Reid Spencer 568b8b54dc Add an indication of signedness to the uint64_t constructor so sign bits 
can be extended. This helps fix test/Assembler/2007-03-19-NegValue.ll

llvm-svn: 35179
 2007-03-19 20:36:48 +00:00
Reid Spencer 732f0a838e Test case noticed by Sheng that fails because negative values that are 
greater than 64-bits don't have the sign bits extended on construction of
the APInt.

llvm-svn: 35178
 2007-03-19 20:35:26 +00:00
Anton Korobeynikov 2946e07557 Fix mingw32 build 
llvm-svn: 35177
 2007-03-19 20:19:08 +00:00
Duncan Sands cbf49a803c Test handling of ARRAY_REF when the component type is of unknown size. 
llvm-svn: 35176
 2007-03-19 19:56:18 +00:00
Reid Spencer 37f629a953 For PR1258: 
Test that invalid numbered value references get an error message.

llvm-svn: 35175
 2007-03-19 18:41:37 +00:00
Reid Spencer d0e8d382db Regenerate. 
llvm-svn: 35174
 2007-03-19 18:40:50 +00:00
Reid Spencer fe65ae88fe For PR1248: 
Eliminate support for type planes in numbered values. This simplifies the
data structures involved in managing forward definitions, etc. Instead of
requiring maps from type to value, we can now just use a vector of values.
These changes also required rewrites of some support functions such as
InsertValue, getBBVal, and ResolveDefinitions. Some other cosmetic changes
were made as well.

llvm-svn: 35173
 2007-03-19 18:39:36 +00:00
Reid Spencer 49bd921f08 Add and Operator== method to ValID so equality can be done properly for 
named or numbered ValIDs.

llvm-svn: 35172
 2007-03-19 18:34:28 +00:00
Reid Spencer 508167861d For PR1258: 
Radically simplify the SlotMachine. There is no need to keep Value planes
around any more. This change causes slot numbering to number all un-named,
non-void values starting at 0 and incrementing monotonically through the
function, regardless of type (including BasicBlocks). Getting slot numbers
is now a single lookup operation instead of a double lookup.

llvm-svn: 35171
 2007-03-19 18:32:53 +00:00
Reid Spencer 7953b683fc For PR1258: 
Revise numeric value references to accommodate collapsed type planes.

llvm-svn: 35170
 2007-03-19 18:27:35 +00:00
Chris Lattner 9c62db7c8c fix ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll 
llvm-svn: 35169
 2007-03-19 18:25:57 +00:00
Reid Spencer 175296cd1b Use opt instead of gccas. 
llvm-svn: 35168
 2007-03-19 18:25:55 +00:00
Chris Lattner 50fce05a21 add a testcase the resent patches fail on. 
llvm-svn: 35167
 2007-03-19 18:25:48 +00:00
Reid Spencer 104b47041a Don't upgrade these. 
llvm-svn: 35166
 2007-03-19 18:08:42 +00:00
Evan Cheng 25d00d545d Remove -reduce-joining-phys-regs options. Make it on by default. 
llvm-svn: 35165
 2007-03-19 18:08:26 +00:00
Duncan Sands 5a040c510b Fix obvious typo in comment. 
llvm-svn: 35164
 2007-03-19 14:25:02 +00:00
Evan Cheng 9bb01c9f4f Fix naming inconsistencies. 
llvm-svn: 35163
 2007-03-19 07:48:02 +00:00
Evan Cheng ee2763f76f Special LDR instructions to load from non-pc-relative constantpools. These are 
rematerializable. Only used for constant generation for now.

llvm-svn: 35162
 2007-03-19 07:20:03 +00:00
Evan Cheng 5be3e09a30 Constant generation instructions are re-materializable. 
llvm-svn: 35161
 2007-03-19 07:09:02 +00:00
Evan Cheng 461c964d3d Added isReMaterializable. 
llvm-svn: 35160
 2007-03-19 06:22:07 +00:00
Evan Cheng 9d7d130835 Recognize target instruction flag 'isReMaterializable'. 
llvm-svn: 35159
 2007-03-19 06:20:37 +00:00
Evan Cheng 0420161130 Add a TargetInstrDescriptor flag to mark an instruction as "re-materializable". 
It means the instruction can be easily re-materialized at any point. e.g.
constant generation, load from constantpool.

llvm-svn: 35158
 2007-03-19 06:19:16 +00:00
Zhou Sheng f89ea5068f Add isStrictPositive() to APInt to determine if this APInt Value > 0. 
llvm-svn: 35156
 2007-03-19 05:22:18 +00:00
Evan Cheng c5e74f6404 Minor bug fix. 
llvm-svn: 35153
 2007-03-19 04:22:35 +00:00
Chris Lattner f01f87bc63 fix a warning 
llvm-svn: 35152
 2007-03-19 00:39:32 +00:00
Chris Lattner 23dd31a3af add PR# 
llvm-svn: 35151
 2007-03-19 00:17:19 +00:00
Chris Lattner 877a3b424d implement the next chunk of SROA with memset/memcpy's of aggregates. This 
implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll

llvm-svn: 35150
 2007-03-19 00:16:43 +00:00
Chris Lattner dcd44dbbb0 add pr# 
llvm-svn: 35149
 2007-03-19 00:15:43 +00:00
Chris Lattner ee3c5d1b78 new testcase 
llvm-svn: 35148
 2007-03-19 00:11:30 +00:00
Chris Lattner 2c0f36bc39 testcase for SROA with memset etc 
llvm-svn: 35147
 2007-03-19 00:09:00 +00:00
Nick Lewycky db204ecfbc Clean up this code and fix subtract miscompile. 
llvm-svn: 35146
 2007-03-18 22:58:46 +00:00
Chris Lattner 0741842b3b Implement InstCombine/and-xor-merge.ll:test[12]. 
Rearrange some code to simplify it now that shifts are binops

llvm-svn: 35145
 2007-03-18 22:51:34 +00:00
Chris Lattner 1ada0693ab new testcase 
llvm-svn: 35144
 2007-03-18 22:50:57 +00:00
Chris Lattner 9b3e2b4ad9 minor updates 
llvm-svn: 35143
 2007-03-18 22:41:33 +00:00
Nick Lewycky f764441977 This is implemented. We now generate: 
entry:
        icmp ugt i32 %x, 4              ; <i1>:0 [#uses=1]
        br i1 %0, label %cond_true, label %cond_false

cond_true:              ; preds = %entry
        %tmp1 = tail call i32 (...)* @bar( i32 12 )             ; <i32> [#uses=0]
        ret void

cond_false:             ; preds = %entry
        switch i32 %x, label %cond_true15 [
                 i32 4, label %cond_true3
                 i32 3, label %cond_true7
                 i32 2, label %cond_true11
                 i32 0, label %cond_false17
        ]

...

llvm-svn: 35142
 2007-03-18 14:37:20 +00:00
Evan Cheng d8f2e4fe4c - Merge UsedBlocks info after two virtual registers are coalesced. 
- Use distance to closest use to determine whether to abort coalescing.

llvm-svn: 35141
 2007-03-18 09:05:55 +00:00
Evan Cheng 5382426577 Keep UsedBlocks info accurate. 
llvm-svn: 35140
 2007-03-18 09:02:31 +00:00
Evan Cheng fd43be8532 Fix comment. 
llvm-svn: 35139
 2007-03-18 03:26:04 +00:00
Nick Lewycky 17d20fd41e Propagate ValueRanges across equality. 
Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0.

llvm-svn: 35138
 2007-03-18 01:09:32 +00:00
Anton Korobeynikov 22f436da42 Silence warning 
llvm-svn: 35137
 2007-03-17 14:48:06 +00:00
Evan Cheng f6f043332f Track the BB's where each virtual register is used. 
llvm-svn: 35135
 2007-03-17 09:29:54 +00:00
Evan Cheng 7b2a001669 Joining a live interval of a physical register with a virtual one can turn out 
to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!

Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.

llvm-svn: 35134
 2007-03-17 09:27:35 +00:00
Evan Cheng a2465dfc07 Use SmallSet instead of std::set. 
llvm-svn: 35133
 2007-03-17 08:53:30 +00:00
Evan Cheng be22235790 If sdisel has decided to sink GEP index expression into any BB. Replace all uses 
in that BB.

llvm-svn: 35132
 2007-03-17 08:22:49 +00:00
Evan Cheng bbe11722e2 GEP index sink test case. 
llvm-svn: 35131
 2007-03-17 03:18:32 +00:00
Devang Patel ac1f488548 Test case for X86 inline asm constraint 'I' 
llvm-svn: 35130
 2007-03-17 00:14:52 +00:00
Devang Patel b38c2ec89c Support 'I' inline asm constraint. 
llvm-svn: 35129
 2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio 25d4052af6 Only ARMv6 has BSWAP. 
Fix MultiSource/Applications/aha test.

llvm-svn: 35128
 2007-03-16 22:54:16 +00:00
Evan Cheng c5bc763f50 Turn on GEP index sinking by default. 
llvm-svn: 35127
 2007-03-16 18:32:30 +00:00
Evan Cheng 0a9d0cabaf Stupid bug. 
llvm-svn: 35126
 2007-03-16 17:50:20 +00:00
Bill Wendling 144b8bbf17 And now support for MMX logical operations. 
llvm-svn: 35125
 2007-03-16 09:44:46 +00:00
Evan Cheng 009ea54262 Sink a binary expression into its use blocks if it is a loop invariant 
computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.

llvm-svn: 35123
 2007-03-16 08:46:27 +00:00
Evan Cheng 0e34d6af6b Added isLegalAddressExpression(). Only allows X +/- C for now. 
llvm-svn: 35122
 2007-03-16 08:43:56 +00:00
Evan Cheng a2a2fd1e55 Added isLegalAddressExpression hook to test if the given expression can be 
folded into target addressing mode for the given type.

llvm-svn: 35121
 2007-03-16 08:42:32 +00:00
Evan Cheng 2ae53613ca These forward declarations are not needed. 
llvm-svn: 35120
 2007-03-16 08:41:06 +00:00
Nick Lewycky 4f73de2b4e Add more comments and update to new asm syntax. 
Add new micro-optimizations.

Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.

llvm-svn: 35119
 2007-03-16 02:37:39 +00:00
Bill Wendling e31034125c Multiplication support for MMX. 
llvm-svn: 35118
 2007-03-15 21:24:36 +00:00
Evan Cheng 88de94a4fb Debugging output stuff. 
llvm-svn: 35117
 2007-03-15 21:19:28 +00:00
Reid Spencer 17e9e8b9af Regenerate. 
llvm-svn: 35116
 2007-03-15 03:26:42 +00:00
Reid Spencer 74d4d172bd Revert last changes as they introduced other problems. 
llvm-svn: 35115
 2007-03-15 03:25:34 +00:00
Evan Cheng 70e16d5e17 ARM isel should match ldr x +/- x * (2^n) to ldr [x, +/- x, lsl #log2(n)]. 
llvm-svn: 35114
 2007-03-14 23:26:40 +00:00
Reid Spencer 2ece31b4ce Regenerate. 
llvm-svn: 35113
 2007-03-14 23:13:06 +00:00
Reid Spencer c2dd8280e2 The sign information was not propagating into the rename map so only the 
last entry stored in the map could be retrieved for a given integer type.
Propagating the sign information required an invasive change to ensure that
all ValueRef (ValID) instances get the right sign information as well. Also,
put in some assertions to ensure the RenameMap always gives us out the type
that is expected.

This fixes PR1256 and
test/Assembler/2007-03-14-UgpradeLocalSignless.ll

llvm-svn: 35112
 2007-03-14 23:11:45 +00:00
Reid Spencer 4040130a86 For PR1256: 
Carry sign with ValID and make TypeInfo sortable (useful in a map).

llvm-svn: 35111
 2007-03-14 23:08:04 +00:00
Reid Spencer dca9687de6 Test case for PR1256. 
llvm-svn: 35110
 2007-03-14 23:07:24 +00:00
Evan Cheng b9e3db67fb Estimate a cost using the possible number of scratch registers required and use 
it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.

llvm-svn: 35109
 2007-03-14 22:43:40 +00:00
Evan Cheng a1779b9739 Under X86-64 large code model, do not emit 32-bit pc relative calls. 
llvm-svn: 35108
 2007-03-14 22:11:11 +00:00
Evan Cheng 71face25ef Notes about codegen issues. 
llvm-svn: 35107
 2007-03-14 21:03:53 +00:00
Duncan Sands a413e0825f Test that the size of a view converted object is determined by the target 
type, not the source type.

llvm-svn: 35106
 2007-03-14 20:24:53 +00:00
Evan Cheng e278f30a52 Clean up. 
llvm-svn: 35105
 2007-03-14 20:20:19 +00:00
Evan Cheng eb76f7c6fd Oops. 
llvm-svn: 35104
 2007-03-14 19:44:58 +00:00
Jim Laskey 6e8a2f4738 Change e-mail address. 
llvm-svn: 35103
 2007-03-14 19:32:21 +00:00
Jim Laskey 2211f496ff Add link to exception handling. 
llvm-svn: 35102
 2007-03-14 19:31:19 +00:00
Jim Laskey 7248e711bd Adding credit for PPC changes. 
llvm-svn: 35101
 2007-03-14 19:30:33 +00:00
Jim Laskey 6956773583 First draft of exception handling doc. 
llvm-svn: 35100
 2007-03-14 19:29:42 +00:00
Jeff Cohen eb9dccf63d Make older versions of bison happy. 
llvm-svn: 35099
 2007-03-14 15:27:17 +00:00
Jeff Cohen 137a16ea95 Fix for VS 2005 problem supplied by Morten Ofstad. 
llvm-svn: 35098
 2007-03-14 15:25:21 +00:00
Evan Cheng dda4c32db3 X86-64 JIT is in large code model. Need stubs for direct calls. 
llvm-svn: 35097
 2007-03-14 10:51:55 +00:00
Evan Cheng 386dfc9251 x86-64 JIT stub codegen. 
llvm-svn: 35096
 2007-03-14 10:48:08 +00:00
Evan Cheng e1a95206e3 Preliminary support for X86-64 JIT stub codegen. 
llvm-svn: 35095
 2007-03-14 10:44:30 +00:00
Zhou Sheng d8c645b0ba ShiftAmt might equal to zero. Handle this situation. 
llvm-svn: 35094
 2007-03-14 09:07:33 +00:00
Zhou Sheng b912844554 Enable KnownZero/One.clear(). 
llvm-svn: 35093
 2007-03-14 03:21:24 +00:00
Evan Cheng b59d60da40 New test. 
llvm-svn: 35091
 2007-03-13 23:31:47 +00:00
Evan Cheng ca6fab953f This got better. 
llvm-svn: 35090
 2007-03-13 23:26:41 +00:00
Evan Cheng 2874855302 Try schedule def + use closer whne Sethi-Ullman numbers are the same. 
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4

Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2

This creates more short live intervals which work better with the register
allocator.

llvm-svn: 35089
 2007-03-13 23:25:11 +00:00
Evan Cheng 72a8bcf238 AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2] 
llvm-svn: 35088
 2007-03-13 21:05:54 +00:00
Evan Cheng 507eefa757 Zero is always a legal AM immediate. 
llvm-svn: 35087
 2007-03-13 20:37:59 +00:00
Evan Cheng b5eb932c93 Correct type info for isLegalAddressImmediate() check. 
llvm-svn: 35086
 2007-03-13 20:34:37 +00:00
Duncan Sands 3240cdb339 Test support for arrays with non-zero first index. 
llvm-svn: 35084
 2007-03-13 15:12:35 +00:00
Nicolas Geoffray 7aad92868c Stack and register alignment of call arguments in the ELF ABI 
llvm-svn: 35083
 2007-03-13 15:02:46 +00:00
Chris Lattner d1bce956b4 ifdef out some dead code. 
Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll

llvm-svn: 35082
 2007-03-13 14:27:42 +00:00
Chris Lattner 091e75bbde testcase for PR1244 
llvm-svn: 35081
 2007-03-13 14:25:35 +00:00
Zhou Sheng ebe634e662 For expression like 
"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().

llvm-svn: 35080
 2007-03-13 06:40:59 +00:00
Zhou Sheng b9c3707e97 Add zextOrCopy() into APInt for convenience. 
llvm-svn: 35079
 2007-03-13 06:16:26 +00:00
Zhou Sheng af4341d441 In APInt version ComputeMaskedBits(): 
1. Ensure VTy, KnownOne and KnownZero have same bitwidth.
  2. Make code more efficient.

llvm-svn: 35078
 2007-03-13 02:23:10 +00:00
Evan Cheng 818242bbaf Implement getTargetLowering() or else LSR won't be using ARM specific hooks. 
llvm-svn: 35077
 2007-03-13 01:20:42 +00:00
Evan Cheng b7004fd889 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
llvm-svn: 35076
 2007-03-12 23:37:10 +00:00
Evan Cheng 2150b9286f Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. 
llvm-svn: 35075
 2007-03-12 23:30:29 +00:00
Evan Cheng b9dce9db85 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
llvm-svn: 35074
 2007-03-12 23:29:01 +00:00
Evan Cheng 3ab7ea7965 More flexible TargetLowering LSR hooks for testing whether an immediate is 
a legal target address immediate or scale.

llvm-svn: 35073
 2007-03-12 23:28:50 +00:00
Evan Cheng 720acdfb31 Use new TargetLowering addressing modes hooks. 
llvm-svn: 35072
 2007-03-12 23:27:37 +00:00
Evan Cheng 6486974e8d More flexible TargetLowering LSR hooks for testing whether an immediate is 
a legal target address immediate or scale.

llvm-svn: 35071
 2007-03-12 23:26:27 +00:00
Evan Cheng 57f261b13a Stupid bug: SSE2 supports v2i64 add / sub. 
llvm-svn: 35070
 2007-03-12 22:58:52 +00:00
Reid Spencer 6223c05805 Revert the last patch as it violates the conditions of sext/zext. 
llvm-svn: 35068
 2007-03-12 18:37:25 +00:00
Jeff Cohen 72ac14ed29 Unbreak C++ build. 
llvm-svn: 35067
 2007-03-12 17:57:00 +00:00
Jeff Cohen 00227417d2 Unbreak VC++ build. Do not use identifiers starting with _ as they are reserved and 
can collide with system defined names.  Windows defines _BB, for example.

llvm-svn: 35066
 2007-03-12 17:56:27 +00:00
Zhou Sheng 3999ffa0c8 For APInt::z/sext(width), if width == BitWidth, just return *this. 
llvm-svn: 35065
 2007-03-12 17:47:45 +00:00
Reid Spencer 1791f23803 Add an APInt version of SimplifyDemandedBits. 
Patch by Zhou Sheng.

llvm-svn: 35064
 2007-03-12 17:25:59 +00:00
Reid Spencer d9281784be Add an APInt version of ShrinkDemandedConstant. 
Patch by Zhou Sheng.

llvm-svn: 35063
 2007-03-12 17:15:10 +00:00
Zhou Sheng be171ee5cd Avoid to assert on "(KnownZero & KnownOne) == 0". 
llvm-svn: 35062
 2007-03-12 16:54:56 +00:00
Zhou Sheng b3e00c4656 In function ComputeMaskedBits(): 
1. Replace getSignedMinValue() with getSignBit() for better code readability.
  2. Replace APIntOps::shl() with operator<<= for convenience.
  3. Make APInt construction more effective.

llvm-svn: 35060
 2007-03-12 05:44:52 +00:00
Zhou Sheng e8e618a6ff Add getSignBit() and operator<<= into APInt for convenience. 
llvm-svn: 35059
 2007-03-11 07:16:10 +00:00
Nick Lewycky d9bd0bc3e2 Add value ranges. Currently inefficient in both execution time and 
optimization power.

llvm-svn: 35058
 2007-03-10 18:12:48 +00:00
Anton Korobeynikov 8a6dc102d3 Use range tests in LowerSwitch, where possible 
llvm-svn: 35057
 2007-03-10 16:46:28 +00:00
Nick Lewycky e455937fae Add getter methods for the extremes of a ConstantRange. 
llvm-svn: 35056
 2007-03-10 15:54:12 +00:00
Bill Wendling e9b81f5366 Adding more arithmetic operators to MMX. This is an almost exact copy of 
the addition. Please let me know if you have suggestions.

llvm-svn: 35055
 2007-03-10 09:57:05 +00:00
Devang Patel 5f50e61d52 Remove dead comments. 
llvm-svn: 35053
 2007-03-09 23:41:03 +00:00
Devang Patel bda1250624 Avoid recursion. Use iterative algorithm for RenamePass(). 
llvm-svn: 35052
 2007-03-09 23:39:14 +00:00
Devang Patel 58818c530f Increment iterator now because IVUseShouldUsePostIncValue may remove 
User from the list of I users.

llvm-svn: 35051
 2007-03-09 21:19:53 +00:00
Reid Spencer ad3618a33d Regenerate. 
llvm-svn: 35050
 2007-03-09 21:19:09 +00:00
Evan Cheng 09663aeac7 Minor stuff. 
llvm-svn: 35049
 2007-03-09 19:46:06 +00:00
Evan Cheng 31ef0ab7cf Add comments about LSR / ARM. 
llvm-svn: 35048
 2007-03-09 19:35:33 +00:00
Evan Cheng 603f3094eb Unfinished work and ideas related to register scavenger. 
llvm-svn: 35047
 2007-03-09 19:34:51 +00:00
Reid Spencer 3fcf0c24a9 For PR1245: 
Account for the sign bit when computing the number of bits required for
a negative integer literal constant.

llvm-svn: 35046
 2007-03-09 19:26:52 +00:00
Dale Johannesen 368faf9acd apply comments from review of last patch 
llvm-svn: 35045
 2007-03-09 19:18:59 +00:00
Dale Johannesen af0cff2671 Add some observations from CoreGraphics benchmark. Remove register 
scavenging todo item, since it is now implemented.

llvm-svn: 35044
 2007-03-09 17:58:17 +00:00
Anton Korobeynikov 2f4ae5306e Unbreak mingw32 build 
llvm-svn: 35042
 2007-03-09 11:53:34 +00:00
Evan Cheng df7949a8d0 If a virtual register is already marked alive in this block, that means it is 
alive in one of the successor block. Do not add it to the kill list.

llvm-svn: 35041
 2007-03-09 09:48:56 +00:00
Evan Cheng 9bc8d4b6f2 Print preds / succs BB numbers. 
llvm-svn: 35040
 2007-03-09 08:29:08 +00:00
Evan Cheng 91b0790297 Avoid variable shadowing. 
llvm-svn: 35039
 2007-03-09 06:02:17 +00:00
Bill Wendling 16574a72e1 Don't use std::hex. 
llvm-svn: 35038
 2007-03-08 23:37:24 +00:00
Bill Wendling 61a2773977 Don't use a cast. It causes an error on some platforms. 
llvm-svn: 35037
 2007-03-08 23:26:50 +00:00
Evan Cheng fe7b8a7c68 Test inline asm modifier 'c'. 
llvm-svn: 35036
 2007-03-08 22:45:31 +00:00
Evan Cheng ea28fc5dc4 Implement inline asm modifier c. 
llvm-svn: 35035
 2007-03-08 22:42:46 +00:00
Chris Lattner 577e8b4ed8 upgrade this testcase, add test for fp immediate to memory operand. 
llvm-svn: 35034
 2007-03-08 22:33:06 +00:00
Chris Lattner ce8aba03ee implement support for floating point constants used as inline asm memory operands. 
llvm-svn: 35033
 2007-03-08 22:29:47 +00:00
Bill Wendling c8eb6b1b15 Add MMX arithmetic testcase. 
llvm-svn: 35032
 2007-03-08 22:14:51 +00:00
Bill Wendling 6092ce25cf Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.

llvm-svn: 35031
 2007-03-08 22:09:11 +00:00
Evan Cheng 63170b6959 Fix a typo. 
llvm-svn: 35030
 2007-03-08 21:59:30 +00:00