Commit Graph

359206 Commits

Author SHA1 Message Date
Sam Parker 0724153bbe [CostModel] Fix cast crash
Don't presume instruction operands while matching reductions.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46430

Differential Revision: https://reviews.llvm.org/D82453
2020-07-03 07:53:45 +01:00
Kai Luo 03828e38c3 [PowerPC] Implement probing for dynamic stack allocation
This patch is part of supporting `-fstack-clash-protection`. Mainly do
such things compared to existing `lowerDynamicAlloc`

- Added a new pseudo instruction PPC::PREPARE_PROBED_ALLOC to get
  actual frame pointer and final stack pointer.
- Synthesize a loop to probe by blocks.
- Use DYNAREAOFFSET to get MaxCallFrameSize which is calculated in
  prologepilog.

Differential Revision: https://reviews.llvm.org/D81358
2020-07-03 05:36:40 +00:00
Craig Topper 52855ed099 [X86] Add back support for matching VPTERNLOG from back to back logic ops.
I think this mostly looks ok. The only weird thing I noticed was
a couple rotate vXi8 tests picked up an extra logic op where we have

(and (or (and), (andn)), X). Previously we matched the (or (and), (andn))
to vpternlog, but now we match the (and (or), X) and leave the and/andn
unmatched.
2020-07-02 22:11:52 -07:00
Carl Ritson 42ca2070d7 [AMDGPU] Insert PS early exit at end of control flow
Exit early if the exec mask is zero at the end of control flow.
Mark the ends of control flow during control flow lowering and
convert these to exits during the insert skips pass.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D82737
2020-07-03 14:04:34 +09:00
Kai Luo d8921a8005 [PowerPC][NFC] Prevent unused error when assertion is disabled. 2020-07-03 04:23:19 +00:00
Jez Ng 53eb7fda51 [lld-macho] Support binding dysyms to any section
Previously, we only supported binding dysyms to the GOT. This
diff adds support for binding them to any arbitrary section. C++
programs appear to use this, I believe for vtables and type_info.

This diff also makes our bind opcode encoding a bit smarter -- we now
encode just the differences between bindings, which will make things
more compact.

I was initially concerned about the performance overhead of iterating
over these relocations, but it turns out that the number of such
relocations is small. A quick analysis of my llvm-project build
directory showed that < 1.3% out of ~7M relocations are RELOC_UNSIGNED
bindings to symbols (including both dynamic and static symbols).

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D83103
2020-07-02 21:21:01 -07:00
Carl Ritson 7ec6927bad Revert "[AMDGPU] Insert PS early exit at end of control flow"
This reverts commit 2bfcacf0ad.

There appears to be an issue to analysis preservation.
2020-07-03 13:03:33 +09:00
Kai Luo 40e9e0826b [PowerPC][NFC] Refactor lowerDynamicAlloc
When performing dynamic stack allocation, calculation of frame pointer
and actual negsize can be separated. This patch refactors
`lowerDynamicAlloc` in preparation of supporting
`-fstack-clash-protection` which also has to calculate actual frame
pointer and negsize.

Differential Revision: https://reviews.llvm.org/D81354
2020-07-03 03:33:24 +00:00
Carl Ritson 2bfcacf0ad [AMDGPU] Insert PS early exit at end of control flow
Exit early if the exec mask is zero at the end of control flow.
Mark the ends of control flow during control flow lowering and
convert these to exits during the insert skips pass.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D82737
2020-07-03 12:26:28 +09:00
Carl Ritson a3daa3f75a [AMDGPU] Unify early PS termination blocks
Generate a single early exit block out-of-line and branch to this
if all lanes are killed. This avoids branching if lanes are active.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D82641
2020-07-03 09:58:05 +09:00
peter klausler 4e958c1748 [flang] External I/O runtime work, repackaged (part 2)
Clean up the input editing path so external input works better
when combined with further changes.  List-directed input needed
to allow for advancement to following records.

Reviewed By: tskeith, sscalpone

Differential Revision: https://reviews.llvm.org/D83104
2020-07-02 17:44:51 -07:00
Roman Lebedev e98030a55f
[NFC][Scalarizer] Also scalarize loads in newly-added tests
Should help better showcase improvements
2020-07-03 02:37:29 +03:00
Roman Lebedev 739c7a0a04
[NFC][Scalarizer] Add some insertelement/extractelement tests
See D82961/D82970/D83101/D83102.
2020-07-03 02:04:47 +03:00
Nico Weber 39f4b1c86e [gn build] get everything to build when llvm_targets_to_build is just AArch64 2020-07-02 18:52:05 -04:00
Craig Topper acf6c94a38 [X86] Teach lower512BitShuffle to try bitmask and bitblend before splitting v32i16/v64i8 on av512f only targets.
We consider v32i16/v64i8 to be legal types on avx512f, but we
don't have most operations until avx512bw. But we can use
and/or/xor operations. So try those before splitting.

This is especially helpful since we turn some ands with constant
masks into shuffles in early DAG combines. So we should make sure
we recover those back to AND.
2020-07-02 15:35:48 -07:00
peter klausler 37f98f6f4c [flang] External I/O runtime work, repackaged (part 1)
Add a isFixedRecordLength flag member to Connection to
disambiguate the state of "record has known variable length"
from "record has fixed length".  Code that sets and tests this
flag will appear in later patches.  Rearrange data members to
reduce storage requirements, since Connection might indirectly
end up on a program stack frame.  Add a utility member function
BeginRecord(); use it in internal I/O processing.

Reviewed By: tskeith, sscalpone

Differential Revision: https://reviews.llvm.org/D83098
2020-07-02 15:17:26 -07:00
Biplob Mishra ca464639a1 [PowerPC] Implement Vector Blend Builtins in LLVM/Clang
Implements vec_blendv()

Differential Revision: https://reviews.llvm.org/D82774
2020-07-02 16:52:52 -05:00
Sameer Arora 0fd383e656 Fix typo and check commit access. 2020-07-02 14:49:47 -07:00
Sanjay Patel 4585e3509c [x86] remove redundant tests with no check lines; NFC
These were accidentally included with:
rGb93e6650c8ac
2020-07-02 17:45:57 -04:00
Sanjay Patel bc110de78a [SelectionDAG] don't split branch on logic-of-vector-compares
SelectionDAGBuilder converts logic-of-compares into multiple branches based
on a boolean TLI setting in isJumpExpensive(). But that probably never
considered the pattern of extracted bools from a vector compare - it seems
unlikely that we would want to turn vector logic into control-flow.

The motivating x86 reduction case is shown in PR44565:
https://bugs.llvm.org/show_bug.cgi?id=44565
...and that test shows the expected improvement from using pmovmsk codegen.

For AArch64, I modified the test to include an extra op because the simpler
test gets transformed by a codegen invocation of SimplifyCFG.

Differential Revision: https://reviews.llvm.org/D82602
2020-07-02 17:05:24 -04:00
Amy Kwan 6076fc698d [PowerPC]Add Vector Insert Instruction Definitions and MC Test
Adds td definitions and asm/disasm tests for the following instructions:

  VINSBVLX
  VINSBVRX
  VINSHVLX
  VINSHVRX
  VINSWVLX
  VINSWVRX
  VINSBLX
  VINSBRX
  VINSHLX
  VINSHRX
  VINSWLX
  VINSWRX
  VINSDLX
  VINSDRX
  VINSW
  VINSD

Differential Revision: https://reviews.llvm.org/D83052
2020-07-02 15:49:16 -05:00
Craig Topper 912cd8a37f [X86] Add vpternlog to the broadcast unfolding table. 2020-07-02 13:43:44 -07:00
Craig Topper e87a95b5c2 [X86] Add test case for unfolding broadcast load from vpternlog. 2020-07-02 13:43:43 -07:00
Vedant Kumar 47481cbffb [test] Deflake test/profile/ContinuousSyncMode/online-merging.c
This test spawns 32 child processes which race to update counters on
shared memory pages. On some Apple-internal machines, two processes race
to perform an update in approximately 0.5% of the test runs, leading to
dropped counter updates. Deflake the test by using atomic increments.

Tested with:

```
$ for I in $(seq 1 1000); do echo ":: Test run $I..."; ./bin/llvm-lit projects/compiler-rt/test/profile/Profile-x86_64h/ContinuousSyncMode/online-merging.c -av || break; done
```

rdar://64956774
2020-07-02 13:31:56 -07:00
Nikita Popov 359345d609 [InstSimplify] Add test for sext/zext comparisons (NFC) 2020-07-02 22:21:59 +02:00
aartbik ee01c7a740 [mlir] [VectorOps] Add choice between dot and axpy lowering of vector.contract
Default vector.contract lowering essentially yields a series of sdot/ddot
operations. However, for some layouts a series of saxpy/daxpy operations,
chained through fma are more efficient. This CL introduces a choice between
the two lowering paths. A default heuristic is to follow.

Some preliminary avx2 performance numbers for matrix-times-vector.
Here, dot performs best for 64x64 A x b and saxpy for 64x64 A^T x b.

```
------------------------------------------------------------
            A x b                          A^T x b
------------------------------------------------------------
GFLOPS    sdot (reassoc)    saxpy    sdot (reassoc)    saxpy
------------------------------------------------------------
1x1        0.6               0.9       0.6             0.9
2x2        2.5               3.2       2.4             3.5
4x4        6.4               8.4       4.9             11.8
8x8       11.7               6.1       5.0             29.6
16x16     20.7              10.8       7.3             43.3
32x32     29.3               7.9       6.4             51.8
64x64     38.9                                         79.3
128x128   32.4                                         40.7
------------------------------------------------------------
```

Reviewed By: nicolasvasilache, ftynse

Differential Revision: https://reviews.llvm.org/D83012
2020-07-02 13:21:17 -07:00
Sanjay Patel b93e6650c8 [x86] add tests for vector select with bit-test condition; NFC 2020-07-02 16:10:08 -04:00
Craig Topper 204a21317a [X86] Modify the conditions for when we stop making v16i8/v32i8 rotate Custom based on having avx512 features.
The comments here indicate that we prefer to promote the shifts
instead of allowing rotate to be pattern matched. But we weren't
taking into account whether 512-bit registers are enabled or
whethever we have vpsllvw/vpsrlvw instructions.

splatvar_rotate_v32i8 is a slight regrssion, but the other cases
are neutral or improved.
2020-07-02 13:07:51 -07:00
Craig Topper cdf84c7b6b [X86] Add test cases for v32i8 rotate with min-legal-vector-width=256
We currently don't mark ROTL as custom when avx512bw is enabled
under the assumption we'll be able to promote the shifts in the
rotate idiom. But if we don't have 512-bit registers enabled we
can't promote.
2020-07-02 13:07:50 -07:00
Lei Zhang 08679af900 Revert "[MLIR][SPIRV] Support two memory access attributes in OpCopyMemory."
This reverts commit ef2f46e1f6, which
likely triggers a compiler internal error for MSVC.

Differential Revision: https://reviews.llvm.org/D83075
2020-07-02 15:57:25 -04:00
Biplob Mishra 286073484f [PowerPC]Implement Vector Permute Extended Builtin
Implements vector permute builtin: vec_permx()

Differential Revision: https://reviews.llvm.org/D82869
2020-07-02 14:53:18 -05:00
Nico Weber 425fb21e03 ld64.lld: Make janky support for tbd files actually work sometimes
Also fix a bug in the test input that made the test miss this issue.
2020-07-02 15:31:21 -04:00
peter klausler 7cccd49a55 [flang] Clean up binary dependences of runtime libraries
There were dependences upon LLVM libraries in the Fortran
runtime support library binaries due to some indirect #includes
of llvm/Support/raw_ostream.h, which caused some kind of internal
ABI version consistency checking to get pulled in.  Fixed by
cleaning up some includes.

Reviewed By: tskeith, PeteSteinfeld, sscalpone

Differential Revision: https://reviews.llvm.org/D83060
2020-07-02 12:27:01 -07:00
Tim Keith 70f2bcc197 [flang] Fix bug determining alternate return
The arguments have been moved out of the analyzer so we can't get the
expected number there. Instead use the argument count from the newly
built callee.

Differential Revision: https://reviews.llvm.org/D83063
2020-07-02 12:24:35 -07:00
Bruno Ricci fcf4d5e449
Revert "[clang][NFC] Store a pointer to the ASTContext in ASTDumper and TextNodeDumper"
This reverts commit aa7fd905e4.

I missed some dump() functions.
2020-07-02 19:40:09 +01:00
David Tenty 670dbad473 [DebugInfo] Fix LineTest byteswap for cross-targeting builds
Summary:
The byte swap fix for big endian hosts in 9782c922cb (for D81570)
swaps based on the host endianess,  but for cross-targeting builds (i.e.
big endian host targeting little endian) the host-endianess won't
necessarily match the generated DWARF. This change updates the test
to use symmetrical constants so the results aren't endian dependent.

Reviewers: jhenderson, hubert.reinterpretcast, stevewan, ikudrin

Reviewed By: ikudrin

Subscribers: ikudrin, aprantl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82827
2020-07-02 14:39:42 -04:00
Bruno Ricci aa7fd905e4
[clang][NFC] Store a pointer to the ASTContext in ASTDumper and TextNodeDumper
In general there is no way to get to the ASTContext from most AST nodes
(Decls are one of the exception). This will be a problem when implementing
the rest of APValue::dump since we need the ASTContext to dump some kinds of
APValues.

The ASTContext* in ASTDumper and TextNodeDumper is not always
non-null. This is because we still want to be able to use the various
dump() functions in a debugger.

No functional changes intended.
2020-07-02 19:29:02 +01:00
Arthur Eubanks 0059f6ffe8 [NewPM] Add -basic-aa to pr33196.ll
The legacy pass manager implicitly adds BasicAA, but the new PM does
not. This causes pr33196.ll to fail under NPM.

There are almost certainly lots of other failures like this, wanted to
get some input on if adding -basic-aa to tests makes sense at scale.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D82915
2020-07-02 11:27:52 -07:00
George Mitenkov 1cfaaf6455 [MLIR][SPIRVToLLVM] Convert spv.constant scalars and vectors
This patch introduces conversion pattern for `spv.constant` with scalar
and vector types. There is a special case when the constant value is a
signed/unsigned integer (vector of integers). Since LLVM dialect does not
have signedness semantics, the types had to be converted to signless ints.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82936
2020-07-02 14:26:58 -04:00
Nico Weber 5416fc014a [gn build] make building on an arm mac work
Currently requires `llvm_targets_to_build = [ "X86", "AArch64" ]`:
building just the host arch (i.e. aarch64) causes some linker errors.
2020-07-02 14:22:33 -04:00
Arthur Eubanks 3d12e79094 [NewPM][LSR] Rename strength-reduce -> loop-reduce
The legacy pass was called "loop-reduce".

This lowers the number of check-llvm failures under NPM by 83.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D82925
2020-07-02 11:15:29 -07:00
sstefan1 61238d2690 [OpenMPOpt][Fix] Remove double initialization of omp::types. 2020-07-02 19:51:54 +02:00
Jonas Hahnfeld 0e0483bf5c [OpenMP][CMake] Fix version detection of testing compiler
When configuring in-tree, the correct names are LLVM_VERSION_MAJOR
and LLVM_VERSION_MINOR. This has been wrong since the code was added
in commits fc473dee98 and 821649229e.
2020-07-02 19:39:30 +02:00
Nemanja Ivanovic 16989f6f5c [LLD] Add required dependency after shared libs break due to ba5087f130
The dependency on TextAPI was not added and is required for shared
libs builds.
2020-07-02 12:28:17 -05:00
Nemanja Ivanovic a701dc5510 [PowerPC] Remove undefs from splat input when changing shuffle mask
As of 1fed131660, we have code that
changes shuffle masks so that we can put the shuffle in a canonical
form that can be matched to a single instruction. However, it
does not properly account for undef elements in the BUILD_VECTOR
that is the RHS splat so we can end up with undefs where they
shouldn't be. This patch converts the splat input with undefs to
one without.
2020-07-02 12:26:56 -05:00
ergawy ef2f46e1f6 [MLIR][SPIRV] Support two memory access attributes in OpCopyMemory.
This commit augments spv.CopyMemory's implementation to support 2 memory
access operands. Hence, more closely following the spec. The following
changes are introduces:

- Customize logic for spv.CopyMemory serialization and deserialization.
- Add 2 additional attributes for source memory access operand.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82710
2020-07-02 13:17:22 -04:00
George Mitenkov 8119a374bc [MLIR][SPIRVToLLVM] SPIR-V function call conversion pattern
Added conversion pattern for SPIR-V `FunctionCallOp`. Based on
specification, it returns no results or a single result, so
can be mapped directly to LLVM dialect's `llvm.call`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D83030
2020-07-02 12:38:27 -04:00
George Mitenkov 03fe7eb16f [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldInsert pattern
This patch introduces conversion pattern for `spv.BitFiledInsert` op,
as well as some utility functions to facilitate code reading.
Since `spv.BitFiledInsert` may take both vector and integer operands,
this case was specifically handled by broadcasting values (`count`
and `offset` here) to vectors. Moreover, the types had to be converted
to same bitwidth in order to conform with LLVM dialect rules.
This was done with `zext` when extending (Note that `count` and
`offset` are treated as unsigned) and `trunc` in the opposite case.
For the latter one, truncation is safe since the op is defined only when
`count`/`offset`/their sum is less than the bitwidth of the result.
This introduces a natural bound of the value of 64, which can be
expressed as `i8`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D82639
2020-07-02 12:19:12 -04:00
Simon Pilgrim 50b25e0679 [InstCombine] Add some sext/trunc tests to show missing support for non-uniform vectors 2020-07-02 17:11:56 +01:00
Pavel Labath b725142c8d [lldb] Fix type conversion in the Scalar getters
Summary:
The Scalar class claims to follow the C type conversion rules. This is
true for the Promote function, but it is not true for the implicit
conversions done in the getter methods.

These functions had a subtle bug: when extending the type, they used the
signedness of the *target* type in order to determine whether to do
sign-extension or zero-extension. This is not how things work in C,
which uses the signedness of the *source* type. I.e., C does
(sign-)extension before it does signed->unsigned conversion, and not the
other way around.

This means that: (unsigned long)(int)-1
      is equal to (unsigned long)0xffffffffffffffff
      and not (unsigned long)0x00000000ffffffff

Unsurprisingly, we have accumulated code which depended on this
inconsistent behavior. It mainly manifested itself as code calling
"ULongLong/SLongLong" as a way to get the value of the Scalar object in
a primitive type that is "large enough". Previously, the ULongLong
conversion did not do sign-extension, but now it does.

This patch makes the Scalar getters consistent with the declared
semantics, and fixes the couple of call sites that were using it
incorrectly.

Reviewers: teemperor, JDevlieghere

Subscribers: lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D82772
2020-07-02 18:02:57 +02:00