ae6000e86d
Replace more uses of sse41 with sse4.1.
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llc using the host cpu features and *waning* on unknown features is probably
not a good thing :-(
llvm-svn: 189144
2013-08-23 20:39:19 +00:00
d24ab20e9b
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
...
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
llvm-svn: 186280
2013-07-14 06:24:09 +00:00
e57b49ee16
Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge after r155618.
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llvm-svn: 155696
2012-04-27 07:11:58 +00:00
d0271b27cb
Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer instructions.
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llvm-svn: 154580
2012-04-12 07:23:00 +00:00
9edf3f50bf
improve the setcc -> setcc_carry optimization to happen more
...
consistently by moving it out of lowering into dag combine.
Add some missing patterns for matching away extended versions of setcc_c.
llvm-svn: 122201
2010-12-19 22:08:31 +00:00
94656b1c8c
fix the buildvector->insertp[sd] logic to not always create a redundant
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insertp[sd] $0, which is a noop. Before:
_f32: ## @f32
pshufd $1, %xmm1, %xmm2
pshufd $1, %xmm0, %xmm3
addss %xmm2, %xmm3
addss %xmm1, %xmm0
## kill: XMM0<def> XMM0<kill> XMM0<def>
insertps $0, %xmm0, %xmm0
insertps $16, %xmm3, %xmm0
ret
after:
_f32: ## @f32
movdqa %xmm0, %xmm2
addss %xmm1, %xmm2
pshufd $1, %xmm1, %xmm1
pshufd $1, %xmm0, %xmm3
addss %xmm1, %xmm3
movdqa %xmm2, %xmm0
insertps $16, %xmm3, %xmm0
ret
The extra movs are due to a random (poor) scheduling decision.
llvm-svn: 112379
2010-08-28 17:59:08 +00:00
4fee6f3bdd
Start function numbering at 0.
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llvm-svn: 101638
2010-04-17 16:29:15 +00:00
40503396da
Eliminate more uses of llvm-as and llvm-dis.
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llvm-svn: 81290
2009-09-08 23:54:48 +00:00
dce1e4949e
Add a couple more tests for the ptest intrinsics to make sure we're
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grabbing them all correctly.
llvm-svn: 77413
2009-07-29 00:51:15 +00:00
f7802a33ce
Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower
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to ptest instruction plus setcc. Revamp ptest instruction. Add test.
llvm-svn: 77407
2009-07-29 00:28:05 +00:00
fae639c9ad
Move insertps tests to sse41 combo test file, convert to filecheck
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format and add an extract/insert test.
llvm-svn: 76994
2009-07-24 19:24:26 +00:00
dc13b7c637
merge one more sse41 test into sse41.ll
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llvm-svn: 76853
2009-07-23 04:49:39 +00:00
70d5783535
merge another sse41 test into sse41.ll
...
llvm-svn: 76852
2009-07-23 04:43:48 +00:00
08fc6e6e40
merge sse41-pmovx.ll into sse41.ll
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llvm-svn: 76850
2009-07-23 04:39:09 +00:00
b9cdd3153c
change a test to run in filecheck style. Rename it to be a general
...
dumping ground of various SSE4.1 tests, since filecheck can reasonably
handle them all in one file. Generalize it to check x86-64 stuff as
well since it has a different ABI (a convenient way to test both the
reg and mem forms of these instructions).
llvm-svn: 76848
2009-07-23 04:33:02 +00:00
Rafael Espindola