Commit Graph

297494 Commits

Author SHA1 Message Date
Chandler Carruth 698fbe7b59 [IR] Sink `isExceptional` predicate to `Instruction`, rename it to
`isExceptionalTermiantor` and implement it for opcodes as well following
the common pattern in `Instruction`.

Part of removing `TerminatorInst` from the `Instruction` type hierarchy
to make it easier to share logic and interfaces between instructions
that are both terminators and not terminators.

llvm-svn: 340699
2018-08-26 08:56:42 +00:00
Chandler Carruth 96fc1de77d [IR] Begin removal of TerminatorInst by removing successor manipulation.
The core get and set routines move to the `Instruction` class. These
routines are only valid to call on instructions which are terminators.

The iterator and *generic* range based access move to `CFG.h` where all
the other generic successor and predecessor access lives. While moving
the iterator here, simplify it using the iterator utilities LLVM
provides and updates coding style as much as reasonable. The APIs remain
pointer-heavy when they could better use references, and retain the odd
behavior of `operator*` and `operator->` that is common in LLVM
iterators. Adjusting this API, if desired, should be a follow-up step.

Non-generic range iteration is added for the two instructions where
there is an especially easy mechanism and where there was code
attempting to use the range accessor from a specific subclass:
`indirectbr` and `br`. In both cases, the successors are contiguous
operands and can be easily iterated via the operand list.

This is the first major patch in removing the `TerminatorInst` type from
the IR's instruction type hierarchy. This change was discussed in an RFC
here and was pretty clearly positive:
http://lists.llvm.org/pipermail/llvm-dev/2018-May/123407.html

There will be a series of much more mechanical changes following this
one to complete this move.

Differential Revision: https://reviews.llvm.org/D47467

llvm-svn: 340698
2018-08-26 08:41:15 +00:00
Petar Jovanovic 1fa5051bad [MIPS GlobalISel] Legalize i8 and i16 add
Legalize G_ADD for types smaller than i32.
LegalizationArtifactCombiner replaces extend instructions with appropriate
bitwise instructions.

Patch by Petar Avramovic.

Differential Revision: https://reviews.llvm.org/D51213

llvm-svn: 340697
2018-08-26 07:25:33 +00:00
Argyrios Kyrtzidis 7c3a12ff42 [index] Introduce 'ProtocolInterface' as part of SymbolPropertySet
This is useful to directly infer that a method or property is from a protocol interface
at the point of the symbol occurrences.

llvm-svn: 340696
2018-08-26 06:27:23 +00:00
Craig Topper 4240ecb909 [X86] Fix typo in comment, expect->except. NFC
llvm-svn: 340695
2018-08-26 03:43:23 +00:00
Craig Topper 7ef643ef17 [X86] Add test cases for D50952, paddus patterns involving constants. NFC
llvm-svn: 340694
2018-08-26 00:22:07 +00:00
Sid Manning 2c3d4b37b6 [ELF][HEXAGON] Add R_HEX_B13_PCREL relocation support
Differential Revision: https://reviews.llvm.org/D51166

llvm-svn: 340693
2018-08-25 23:16:37 +00:00
Sid Manning 6d0415e098 [ELF][HEXAGON] Add R_HEX_B9_PCREL and R_HEX_B9_PCREL_X relocation support
Differential Revision: https://reviews.llvm.org/D51045

llvm-svn: 340692
2018-08-25 21:25:35 +00:00
Robert Widmann 106eab0292 [C-API][DIBuilder] Use NameLen in LLVMDIBuilderCreateParameterVariable
Summary: NameLen wasn't being used and caused the parameters in gdb to very long, in my case, crashes in others. Please also perform the correct magical incarnations to have this be applied to the LLVM 7 branch.

Reviewers: whitequark, CodaFi

Reviewed By: CodaFi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51141

llvm-svn: 340691
2018-08-25 19:54:39 +00:00
Craig Topper ebec2793d1 [X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MULHS/MULHU support instead.
Summary:
The only time vector SMUL_LOHI/UMUL_LOHI nodes are created is during division/remainder lowering. If its created before op legalization, generic DAGCombine immediately turns that SMUL_LOHI/UMUL_LOHI into a MULHS/MULHU since only the upper half is used. That node will stick around through vector op legalization and will be turned back into UMUL_LOHI/SMUL_LOHI during op legalization. It will then be custom lowered by the X86 backend. Due to this two step lowering the vector shuffles created by the custom lowering get legalized after their inputs rather than before. This prevents the shuffles from being combined with any build_vector of constants.

This patch uses changes vXi32 to use MULHS/MULHU instead. This is what the later DAG combine did anyway. But by skipping the change back to UMUL_LOHI/SMUL_LOHI we lower it before any constant BUILD_VECTORS. This allows the vector_shuffle creation to constant fold with the build_vectors. This accounts for the test changes here.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51254

llvm-svn: 340690
2018-08-25 18:01:24 +00:00
Craig Topper a11a3b3818 [SelectionDAG][X86] Reorder the operands the MaskedStoreSDNode to put the value first.
Summary:
Previously the value being stored is the last operand in SDNode. This causes the type legalizer to visit the mask operand before the value operand. The type legalizer was more complicated because of this since we want the type of the value to drive the decisions.

This patch moves the value to be the first operand so we visit it first during type legalization. It also simplifies the type legalization code accordingly.

X86 is currently the only in tree target that uses this SDNode. Not sure if there are any users out of tree.

Reviewers: RKSimon, delena, hfinkel, eli.friedman

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D50402

llvm-svn: 340689
2018-08-25 17:48:17 +00:00
Craig Topper bce8680605 [X86] Make sure type is a vector before calling VT.getVectorNumElements() in combineLoopMAddPattern
Fixes PR38700.

llvm-svn: 340688
2018-08-25 17:23:43 +00:00
Simon Pilgrim ef467acc2c Fix -Wunused-function warning. NFCI.
llvm-svn: 340687
2018-08-25 17:11:11 +00:00
Simon Pilgrim 9894733b68 Remove superfluous semicolon. NFCI.
llvm-svn: 340686
2018-08-25 16:49:35 +00:00
Sanjay Patel 8a84c747d2 [x86] try harder to use broadcast to load a scalar into vector reg
This is a preliminary step for a preliminary step for D50992. 
I noticed that x86 often misses chances to load a scalar directly 
into a vector register.

So this patch is just allowing more of those cases to match a 
broadcast op in lowerBuildVectorAsBroadcast(). The old code comment 
said it doesn't make sense to use a broadcast when we're loading a 
single element and everything else is undef, but I think that's the 
best case in the improved tests in insert-loaded-scalar.ll. We avoid 
scalar-to-vector-register move and/or less efficient shuffling.

Note that there are some existing types that were already producing 
a broadcast, but that happens semi-accidentally. Ie, it's not 
happening as part of lowerBuildVectorAsBroadcast(). The build vector 
gets expanded into load + shuffle, and then shuffle lowering produces 
the broadcast.

Description of the other test diffs:
1. avx-basic.ll - replacing load+shufle is a win.
2. sse3-avx-addsub-2.ll - vmovddup vs. vbroadcastss is neutral
3. sse41.ll - don't care - we convert that intrinsic to generic IR now, so this test is deprecated
4. vector-shuffle-128-v8.ll / vector-shuffle-256-v16.ll - pshufb alternatives with an extra instruction are not obviously bad

Differential Revision: https://reviews.llvm.org/D51125

llvm-svn: 340685
2018-08-25 14:56:05 +00:00
Tim Renouf 904343f879 [AMDGPU] Add support for multi-dword s.buffer.load intrinsic
Summary:
Patch by Marek Olsak and David Stuttard, both of AMD.

This adds a new amdgcn intrinsic supporting s.buffer.load, in particular
multiple dword variants. These are convenient to use from some front-end
implementations.

Also modified the existing llvm.SI.load.const intrinsic to common up the
underlying implementation.

This modification also requires that we can lower to non-uniform loads correctly
by splitting larger dword variants into sizes supported by the non-uniform
versions of the load.

V2: Addressed minor review comments.
V3: i1 glc is now i32 cachepolicy for consistency with buffer and
    tbuffer intrinsics, plus fixed formatting issue.
V4: Added glc test.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D51098

Change-Id: I83a6e00681158bb243591a94a51c7baa445f169b
llvm-svn: 340684
2018-08-25 14:53:17 +00:00
Sanjay Patel 57a0b4edd7 [InstCombine] add tests for shuffle+binop transform; NFC
llvm-svn: 340683
2018-08-25 14:37:08 +00:00
Simon Pilgrim eb6a3cbb28 [X86] Make requested test changes from D50636
The tests were relying on X / X -> 1 and X % X -> 0 combines not happening in the DAG.

llvm-svn: 340682
2018-08-25 14:16:03 +00:00
Jonas Hahnfeld 931939bf92 [CUDA/OpenMP] Define only some host macros during device compilation
When compiling CUDA or OpenMP device code Clang parses header files
that expect certain predefined macros from the host architecture. To
make this work the compiler passes the host triple via the -aux-triple
argument and (until now) pulls in all macros for that "auxiliary triple"
unconditionally.

However this results in defines like __SSE_MATH__ that will trigger
inline assembly making use of the "advertised" target features. See
the discussion of D47849 and PR38464 for a detailed explanation of
the encountered problems.

Instead of blacklisting "known bad" examples this patch starts adding
defines that are needed for certain headers like bits/wordsize.h and
bits/mathinline.h.
The disadvantage of this approach is that it decouples the definitions
from their target toolchain. However in my opinion it's more important
to keep definitions for one header close together. For one this will
include a clear documentation why these particular defines are needed.
Furthermore it simplifies maintenance because adding defines for a new
header or support for a new aux-triple only needs to touch one piece
of code.

Differential Revision: https://reviews.llvm.org/D50845

llvm-svn: 340681
2018-08-25 13:42:40 +00:00
Bjorn Pettersson 7ded6a909b [CodeGen] Set FrameSetup/FrameDestroy on BUNDLE instructions
Summary:
If any of the bundled instructions are marked as FrameSetup
or FrameDestroy, then that property is set on the BUNDLE
instruction as well.

As long as the scheduler/packetizer aren't mixing
prologue/epilogue instructions (i.e. all the bundled
instructions have the same property) then this simply gives
the bundle the correct property (so when using a bundle
iterator in late passes a bundle will be correctly identified
as FrameSetup/FrameDestroy).

When for example bundling a mix of FrameSetup instructions
with non-FrameSetup instructions it could be discussed if
the bundle should have the property or not. The choice here
has been to set these properties on the BUNDLE instruction if
any of the bundled instructions have the property set.

Reviewers: #debug-info, kparzysz

Reviewed By: kparzysz

Subscribers: vsk, thegameg, llvm-commits

Differential Revision: https://reviews.llvm.org/D50637

llvm-svn: 340680
2018-08-25 11:26:17 +00:00
Bjorn Pettersson 8483004723 [LiveDebugVariables] Avoid faulty addDefsFromCopies in computeIntervals
Summary:
When computeIntervals is looking through COPY instruction to
extend the location mapping for a debug variable it did not
handle subregisters correctly.

For example
    DBG_VALUE debug-use %0.sub_8bit_hi, ...
    %1:gr16 = COPY %0
was transformed into
    DBG_VALUE debug-use %0.sub_8bit_hi, ...
    %1:gr16 = COPY %0
    DBG_VALUE debug-use %1, ...
So the subregister index was missing in the added DBG_VALUE.

As long as the subreg refered to the least significant bits
of the superreg, then I guess we could get the correct
result in a debugger even when referring to the superreg.
But as in the example above when the subreg refers to other
parts of the superreg, then debuginfo would be incorrect.

I'm not sure exactly how to fix this properly, so this patch
just avoids looking through the COPY when there is a subreg
involved (for more info, see the FIXME added in the code).

Reviewers: rnk, aprantl

Reviewed By: aprantl

Subscribers: JDevlieghere, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D50788

llvm-svn: 340679
2018-08-25 10:02:03 +00:00
Ana Pazos 353f67a741 [MC, RISCV] Fixed StringRef Assertion `Index < Length && "Invalid index!"'
Summary:
Handle the case IDVal is an empty string.

This bug was uncovered by a LLVM MC Assembler Protocol Buffer
Fuzzer  for the RISC-V assembly language.

Reviewers: rnk

Reviewed By: rnk

Subscribers: rnk, niravd, pcc, peter.smith, asb, grosbach, llvm-commits, bcain, kito-cheng, shiva0217, rogfer01, PkmX

Differential Revision: https://reviews.llvm.org/D50808

llvm-svn: 340678
2018-08-25 01:34:32 +00:00
Kuba Mracek a2e0c2462a [llvm] Document "%T" as deprecated in CommandGuide/lit.rst
Differential Revision: https://reviews.llvm.org/D48842

llvm-svn: 340677
2018-08-25 01:27:48 +00:00
Frederic Riss 314614ad4f Disable exceptions for TestDataFormatterLibcxxOptional.py
On macOS, some of the <optional> APIs used by the test are available only
starting on macOS 10.14 when using exceptions. Build the test with
-fno-exceptions so that the test builds on older systems too.

rdar://problem/43700544

llvm-svn: 340676
2018-08-25 01:25:24 +00:00
Eric Christopher 2ab82347a3 This patch adds support to LLVM for writing HermitCore (https://hermitcore.org) ELF binaries.
HermitCore is a POSIX-compatible kernel for running a single application in an isolated environment to get maximum performance and predictable runtime behavior. It can either be used bare-metal on hardware or a VM (Unikernel) or side by side to an existing Linux system (Multikernel).
Due to the latter feature, HermitCore binaries are marked with ELFOSABI_STANDALONE to let the Linux ELF loader distinguish them from regular Unix/Linux binaries and load them using the HermitCore "proxy" tool.

Patch by Colin Finck!

llvm-svn: 340675
2018-08-25 01:08:18 +00:00
Ana Pazos ecc65eddec [RISCV] Fixed Assertion`Kind == Immediate && "Invalid type access!"' failed.
Summary:
Missing check for isImm() in some Immediate classes.

This bug was uncovered by a LLVM MC Assembler Protocol Buffer Fuzzer
for the RISC-V assembly language.

Reviewers: hiraditya, asb

Reviewed By: hiraditya, asb

Subscribers: llvm-commits, hiraditya, kito-cheng, shiva0217, rkruppe, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei

Differential Revision: https://reviews.llvm.org/D50797

llvm-svn: 340674
2018-08-24 23:47:49 +00:00
Adrian Prantl 4ddd059635 Prevent DILocation::getMergedLocation() from creating invalid metadata.
The function's new implementation from r340583 had a bug in it that
could cause an invalid scope to be generated when merging two
DILocations with no common ancestor scope.

This patch detects this situation and picks the scope of the first
location. This is not perfect, because the scope is misleading, but on
the other hand, this will be a line 0 location.

rdar://problem/43687474

Differential Revision: https://reviews.llvm.org/D51238

llvm-svn: 340672
2018-08-24 23:30:57 +00:00
Richard Smith 2b1dc39d18 Port my recent changes from LLVM copy of the demangler:
r340663 - Allow Allocator::make to make a node of a different type than that
          requested.
r340664 - Add documentation comment to ForwardTemplateReference.
r340665 - Fix ExpandedSpecialSubstitution demangling for Sa and Sb.
r340670 - Allow demangler's node allocator to fail, and bail out of the entire
          demangling process when it does.

llvm-svn: 340671
2018-08-24 23:30:26 +00:00
Richard Smith 9c2e4f39bc Allow demangler's node allocator to fail, and bail out of the entire
demangling process when it does.

Use this to support a "lookup" query for the mangling canonicalizer that
does not create new nodes. This could also be used to implement
demangling with a fixed-size temporary storage buffer.

Reviewers: erik.pilkington

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51003

llvm-svn: 340670
2018-08-24 23:26:05 +00:00
Ana Pazos 61b28ede75 [RISCV] Fix std::advance slowness
Summary:
It seems std::advance template is treating "-MFI.getCalleeSavedInfo().size()"
as a large unsigned value", causing slowness.

Thanks to Henrik Gustafsson for reporting the issue.

Reviewers: asb

Reviewed By: asb

Subscribers: llvm-commits, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, asb

Differential Revision: https://reviews.llvm.org/D51148

llvm-svn: 340669
2018-08-24 23:13:59 +00:00
Matt Davis 673412e3fa [llvm-mca] Move ResourceManager from Scheduler into its own file. NFC.
This time I should be preserving history of the ResourceManager changes.

llvm-svn: 340668
2018-08-24 22:59:13 +00:00
Hans Wennborg b4278895a4 Revert r323281 "Adjust MaxAtomicInlineWidth for i386/i486 targets."
As reported on http://lists.llvm.org/pipermail/cfe-dev/2018-August/058760.html,
this broke i386-freebsd11 due to its lack of atomic 64 bit primitives.

While that's not really this commit's fault, let's revert back to the old
behaviour until this can be fixed. This means generating cmpxchg8b etc for i386
and i486 which don't technically support those, but that's been the behaviour
for a long time, so a little longer probably doesn't hurt that much.

> Adjust MaxAtomicInlineWidth for i386/i486 targets.
>
> This is to fix the bug reported in https://bugs.llvm.org/show_bug.cgi?id=34347#c6.
> Currently, all  MaxAtomicInlineWidth of x86-32 targets are set to 64. However,
> i386 doesn't support any cmpxchg related instructions. i486 only supports cmpxchg.
> So in this patch MaxAtomicInlineWidth is reset as follows:
> For i386, the MaxAtomicInlineWidth should be 0 because no cmpxchg is supported.
> For i486, the MaxAtomicInlineWidth should be 32 because it supports cmpxchg.
> For others 32 bits x86 cpu, the MaxAtomicInlineWidth should be 64 because of cmpxchg8b.
>
> Differential Revision: https://reviews.llvm.org/D42154

llvm-svn: 340666
2018-08-24 22:46:33 +00:00
Richard Smith 3aca4811c8 Fix ExpandedSpecialSubstitution demangling for Sa and Sb.
No functionality change: we never actually create these forms currently.

llvm-svn: 340665
2018-08-24 22:34:20 +00:00
Richard Smith 55857c5bed Add documentation comment to ForwardTemplateReference.
This node doesn't directly correspond to a mangled name fragment, so
it's useful to explicitly describe when it's created and what it's for.

llvm-svn: 340664
2018-08-24 22:33:53 +00:00
Richard Smith 2ae8468bd1 Add data structure to form equivalence classes of mangled names.
Summary:
Given a set of equivalent name fragments, this mechanism determines whether two
mangled names are equivalent. The intent is to use this for fuzzy matching of
profile data against the program after certain refactorings are performed.

Reviewers: erik.pilkington, dlj

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D50935

llvm-svn: 340663
2018-08-24 22:31:51 +00:00
Matt Davis e442a8701f [llvm-mca] Revert r340659. NFC.
Choosing to revert the change and do it again, hopefully preserving the history
of the changes by using svn copy instead of simply creating a new file from the
contents within Scheduler.

llvm-svn: 340661
2018-08-24 22:05:14 +00:00
Philip Reames 006bdad692 [CVP] Extend tests to illustrate an old patch isn't needed
Back in https://reviews.llvm.org/D19559, I tried to teach CVP about range facts implied by value/value icmps (i.e. no constants.)  In the meantime, we've implemented the optimization, but I couldn't find tests checked in, so adding them.

llvm-svn: 340660
2018-08-24 21:56:43 +00:00
Matt Davis 220271acde [llvm-mca] Move the ResourceManger from the Scheduler into its own file. NFC.
llvm-svn: 340659
2018-08-24 21:53:12 +00:00
Stella Stamenova 04acc99db8 [vscode] Skip some of the vscode tests on Linux and fix one
Summary: These are already skipped on Darwin because they cause build bot failures. Both on the build bots as well as in our testing we have seen a number of these tests fail and hang. This change skips the failing/hanging tests on Linux and also fixes one of the test - the test needs the thread library to build.

Reviewers: asmith, clayborg, aprantl

Subscribers: teemperor, lldb-commits

Differential Revision: https://reviews.llvm.org/D51227

llvm-svn: 340658
2018-08-24 21:42:53 +00:00
Xinliang David Li bcf726a32d [PGO] add target md5sum in warning message for icall
Differential revision: http://reviews.llvm.org/D51193

llvm-svn: 340657
2018-08-24 21:38:24 +00:00
Jonathan Peyton 2a966e84ce [OpenMP] Remove deprecated/obsolete MIC attributes from headers
llvm-svn: 340656
2018-08-24 21:34:10 +00:00
Matt Arsenault 5b9ef39bdd DAG: Allow matching fminnum/fmaxnum from vselect
llvm-svn: 340655
2018-08-24 21:24:18 +00:00
Vitaly Buka 96cbeffa7b Use unique_ptr to hold MCInstrInfo
llvm-svn: 340654
2018-08-24 21:03:35 +00:00
Adrian Prantl 3807217d02 Verifier: verify that a DILocation's scope is a DILocalScope.
This fixes an assertion failure(!) in the Verifier.

rdar://problem/43687474

llvm-svn: 340653
2018-08-24 21:01:58 +00:00
Raphael Isemann 6328ccc14c Fixed windows bots that were failing because of PATH_MAX
As we only use PATH_MAX for an assert in a unit test that is supposed
to catch the random failures on the Swift CI bots, we might as well
just ifdef this assert out on Windows.

llvm-svn: 340652
2018-08-24 20:55:23 +00:00
Eli Friedman 59de37ba6c [SafeStack] Set debug location for calls to __safestack_pointer_address.
Otherwise, the debug info is incorrect.  On its own, this is mostly
harmless, but the safe-stack also later inlines the call to
__safestack_pointer_address, which leads to debug info with the wrong
scope, which eventually causes an assertion failure (and incorrect debug
info in release mode).

Differential Revision: https://reviews.llvm.org/D51075

llvm-svn: 340651
2018-08-24 20:42:32 +00:00
Adrian Prantl 29729f1529 Reduce the memory footprint of dsymutil. (NFC)
This (partially) fixes a regression introduced by
https://reviews.llvm.org/D43945 / r327399, which parallelized
DwarfLinker. This patch avoids parsing and allocating the memory for
all input DIEs up front and instead only allocates them in the
concurrent loop in the AnalyzeLambda. At the end of the loop the
memory from the LinkContext is cleared again.

This reduces the peak memory needed to link the debug info of a
non-modular build of the Swift compiler by >3GB.

rdar://problem/43444464

Differential Revision: https://reviews.llvm.org/D51078

llvm-svn: 340650
2018-08-24 20:41:08 +00:00
Peter Collingbourne faf300f069 Reland r340552, "Driver: Enable address-significance tables by default when targeting COFF." which was reverted in r340579.
The underlying problem that caused the revert was fixed in r340648.

Differential Revision: https://reviews.llvm.org/D51049

llvm-svn: 340649
2018-08-24 20:38:15 +00:00
Peter Collingbourne 3f792230cb CodeGen: Add two more conditions for adding symbols to the address-significance table.
Firstly, require the symbol to be used within the module. If a
symbol is unused within a module, then by definition it cannot be
address-significant within that module. This condition is useful on all
platforms because it could make symbol tables smaller -- without this
change, emitting an address-significance table could cause otherwise
unused undefined symbols to be added to the object file.

But this change is necessary with COFF specifically in order to
preserve the property that an unreferenced undefined symbol in an IR
module does not result in a link failure. This is already the case for
ELF because ELF linkers only reject links with unresolved symbols if
there is a relocation to that symbol, but COFF linkers require all
undefined symbols to be resolved regardless of relocations. So if
a module contains an unreferenced undefined symbol, we need to make
sure not to add it to the address-significance table (and thus the
symbol table) in case it doesn't end up resolved at link time.

Secondly, do not add dllimport symbols to the table. These symbols
won't be able to be resolved because their definitions live in another
module and are accessed via the IAT, and the address-significance
table has no effect on other modules anyway. It wouldn't make sense
to add the IAT entry symbol to the address-significance table either
because the IAT entry isn't address-significant -- the generated code
never takes its address.

Differential Revision: https://reviews.llvm.org/D51199

llvm-svn: 340648
2018-08-24 20:37:09 +00:00
Jonathan Peyton 2c3e5d82b4 [OpenMP] Fixed affinity verbose double printing for balanced type.
llvm-svn: 340647
2018-08-24 20:35:42 +00:00