Commit Graph

424946 Commits

Author SHA1 Message Date
Florian Hahn 6af5f5697c
[SCEV] Collect conditions from assumes same way as for branches.
Also collect conditions from assume up-front in applyLoopGuards.
This allows re-using the logic to handle logical ANDs as assume
conditions.

It should should pave the road for a fix for #55645.
2022-05-26 18:17:13 +01:00
David Penry 917dc0749b [ARM] Recognize t2LoopEnd for software pipelining
- Add t2LoopEnd to TargetInstrInfo::analyzeBranch and
  related functions.  As there are many side effects of
  analyzing a branch, only do so if software pipelining
  is enabled to maintain previous behavior when pipelining
  is not desired.
- Make sure that t2LoopEndDec is immediately followed by
  a t2B when it is synthesized from a t2LoopEnd. This is
  done because the t2LoopEnd might have acquired a
  fall-through path, but IfConversion assumes that
  fall-through are only possible on analyzable branches.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D126322
2022-05-26 09:55:42 -07:00
Mike Rice 0a5cfbf7b2 [OpenMP] Use the align clause value from 'omp allocate' for globals
Refactor the code that handles the align clause of 'omp allocate' so
it can be used with globals as well as local variables.

Differential Revision: https://reviews.llvm.org/D126426
2022-05-26 09:51:48 -07:00
Owen Anderson 939a43461b Revert "Replace the custom linked list in LeaderTableEntry with TinyPtrVector."
This reverts commit 1e91149844.

Pending further discussion.
2022-05-26 09:50:36 -07:00
Philip Reames d58cc0839e [RISCV] reorganize getFrameIndexReference to reduce code duplication [nfc]
This change reorganizes the majority of frame index resolution into a two strep process.

    Step 1 - Select which base register we're going to use.
    Step 2 - Compute the offset from that base register.

The key point is that this allows us to share the step 2 logic for the SP case. This reduces the code duplication, and (I think) makes the code much easier to follow.

I also went ahead and added assertions into phase 2 to catch errors where we select an illegal base pointer. In general, we can't index from a base register to a stack location if that requires crossing a variable and unknown region. In practice, we have two such cases: dynamic stack realign and var sized objects. Note that crossing the scalable region is fine since while variable, it's a known variability which can be expressed in the offset.

Differential Revision: https://reviews.llvm.org/D126403
2022-05-26 09:44:58 -07:00
Shoaib Meenai a831ce528f Revert "[runtimes] Detect changes to Tests.cmake"
This reverts commit ec10ac750a.

See https://discourse.llvm.org/t/cmake-regeneration-is-broken/62788.
This change caused Ninja's CMake regeneration to depend on the build,
which prevented CMake regeneration from functioning properly and caused
spurious build failures on incremental builds when a CMake change
occurred.
2022-05-26 09:34:18 -07:00
Shoaib Meenai 0be0a53df6 [libunwind] Use process_vm_readv to avoid potential segfaults
We've observed segfaults in libunwind when attempting to check for the
Linux aarch64 sigreturn frame, presumably because of bad unwind info
leading to an incorrect PC that we attempt to read from. Use
process_vm_readv to read the memory safely instead.

The s390x code path should likely follow suit, but I don't have the
hardware to be able to test that, so I didn't modify it here either.

Reviewed By: MaskRay, rprichard, #libunwind

Differential Revision: https://reviews.llvm.org/D126343
2022-05-26 09:12:51 -07:00
Shoaib Meenai 3d2b5b7b87 [libunwind] Factor out sigreturn check condition. NFC
Create a macro for this instead of duplicating the architecture checks
everywhere. (It's a little redundant to use it when we're checking for a
specific architecture, but I'm also applying it there for consistency.)

Reviewed By: rprichard, MaskRay, #libunwind

Differential Revision: https://reviews.llvm.org/D126342
2022-05-26 09:12:50 -07:00
Nikita Popov c8eb83f2d0 [ControlHeightReduction] Use logical and
Use logical instead of bitwise and to combine conditions, to avoid
propagating poison from a later condition if an earlier one is
already false. This avoids introducing branch on poison.

Differential Revision: https://reviews.llvm.org/D125898
2022-05-26 18:03:35 +02:00
Philip Reames afe49934a6 [RISCV] Allow compatible VTYPE in AVL Reg Forward cases
During insertion of VSETVLI, we have two related bits of code which decide whether we can reuse a previous vsetvli result. As was pointed out in the original review, these cases can allow any prior state for which we know that VL is the same for any value of AVL.

This was originally separated out of a desire for separate tests and review. As it turns out, finding a test case for this has been quite challenging. Most of the cases I tried, we manage to already get through other chains of logic. We do have one correct test change, but that only exercises one of the two changes.

Differential Revision: https://reviews.llvm.org/D126400
2022-05-26 08:50:35 -07:00
Alexey Bataev 7b809c30b9 [SLP]Improve compile time, NFC.
Patch improves compile time. For function calls, which cannot be
vectorized, create a unique group for each such a call instead of
subgroup. It prevents them from being grouped by a subgroups and
attempts for their vectorization.

Also, looks through casts operand to try to check their
groups/subgroups.

Reduces number of vectorization attempts. No changes in the statistics
for SPEC2017/2006/llvm-test-suite.

Differential Revision: https://reviews.llvm.org/D126476
2022-05-26 08:40:59 -07:00
Alexey Bataev 120d52b0ef [SLP]Fix PR55653: emit undefs where required, not poison.
Need to handle a corner case correctly, if all elements are Undefs/Poisons,
need to emit actual values, not just poisons.

Differential Revision: https://reviews.llvm.org/D126298
2022-05-26 08:38:50 -07:00
Alex Zhikhartsev 8b0d763474 [DFAJumpThreading] Relax analysis to handle unpredictable initial values
Responding to a feature request from the Rust community:

https://github.com/rust-lang/rust/issues/80630

    void foo(X) {
      for (...)
	switch (X)
	  case A
	    X = B
	  case B
	    X = C
    }

Even though the initial switch value is non-constant, the switch
statement can still be threaded: the initial value will hit the switch
statement but the rest of the state changes will proceed by jumping
unconditionally.

The early predictability check is relaxed to allow unpredictable values
anywhere, but later, after the paths through the switch statement have
been enumerated, no non-constant state values are allowed along the
paths. Any state value not along a path will be an initial switch value,
which can be safely ignored.

Differential Revision: https://reviews.llvm.org/D124394
2022-05-26 11:29:54 -04:00
Florian Hahn 9c66ed9b73
[SCEV] Add test with loop guarded by assume with an AND condition.
Show a missed case where the AND is currently blocks applying the
information from the assume.
2022-05-26 16:08:32 +01:00
Krzysztof Parzyszek aee6b8efd0 [ADT] Explicitly delete copy/move constructors and operator= in IntervalMap
The default implementations will perform a shallow copy instead of a deep
copy, causing some internal data structures to be shared between different
objects. Disable these operations so they don't get accidentally used.

Differential Revision: https://reviews.llvm.org/D126401
2022-05-26 07:58:18 -07:00
Anastasia Stulova 3087afb421 [OpenCL][Doc] Misc improvements related to SPIR-V support. 2022-05-26 15:54:33 +01:00
LLVM GN Syncbot ec0ef6809a [gn build] Port 0e3dc1a52f 2022-05-26 14:50:15 +00:00
Nikolas Klauser 0e3dc1a52f [libc++] Implement ranges::{all, any, none}_of
Reviewed By: ldionne, var-const, #libc

Spies: libcxx-commits, mgorny

Differential Revision: https://reviews.llvm.org/D123016
2022-05-26 16:50:08 +02:00
Simon Pilgrim 14258d6fb5 [SLP] Move canVectorizeLoads implementation to simplify the diff in D105986. NFC. 2022-05-26 15:23:58 +01:00
Stefan Pintilie 610eb39c68 [PowerPC][Future] Add an ISA Future to go with mcpu=future.
On Power PC we have ISA3.0 for Power 9, ISA3.1 for Power 10.
This patchs adds an ISA for mcpu=future. The idea is to have a placeholder ISA
for work that is experimental and may not be supported by existing ISAs.

Reviewed By: lei

Differential Revision: https://reviews.llvm.org/D126075
2022-05-26 09:19:58 -05:00
Paul Robinson 634c8ef69a [PS5] Allow dllimport/dllexport same as PS4 2022-05-26 07:01:30 -07:00
Tyler Chatow 8f70d16c9a [clang-format] Handle attributes in enum declaration.
Fixes https://github.com/llvm/llvm-project/issues/55457

Ensures that attributes in the enum declaration are interpreted
correctly, for instance:

```
enum class [[nodiscard]] E {
  a,
  b
};
```

Reviewed By: MyDeveloperDay, curdeius

Differential Revision: https://reviews.llvm.org/D125848
2022-05-26 15:43:57 +02:00
Nathan Sidwell 6b8c6f15fd [clang][PR55406] CFG for coroutine
CoreturnStmt needs to keep the operand value distinct from its use in
any return_value call, so that instantiation may rebuild the latter.
But it also needs to keep the operand value separate in the case of
calling return_void.  Code generation checks the operand value form to
determine whether it is a distincte entity to the promise call.  This
adds the same logic to CFG generation.

Reviewed By: bruno

Differential Revision: https://reviews.llvm.org/D126399
2022-05-26 06:40:43 -07:00
NAKAMURA Takumi 6f434776da [bazel] Introduce "VE" CodeGen in LLVM. 2022-05-26 22:39:49 +09:00
Louis Dionne f8c8bda965 [libc++] Remove temporary workaround for existing CMake caches
If you are broken by this change, you should remove your CMake cache and
re-run the CMake generation step.
2022-05-26 09:36:15 -04:00
Alexey Bataev 9139d484d4 [SLP]Fix crash on reordering of ScatterVectorize nodes.
ScatterVectorize nodes should be handled same way as gathers in
reorderBottomToTop function, since we can simple reorder the loads in
this node. Because of that need to include such nodes to the list of
gathered nodes to fix compiler crash.

Differential Revision: https://reviews.llvm.org/D126378
2022-05-26 06:25:58 -07:00
Emil Kieri 4c549a0b59 [flang][NFC] Make semantics test dosemantics03.f90 warning-correct
This is a preparation for D125804, which makes test_errors.py test
warnings the same way it already tests errors, i.e., assert that the
emitted and expected errors are identical. The following changes are
made to the test:

 - Add the WARNING directive where warnings are expected.
 - Remove -Werror in the RUN line. It does not serve much purpose here:
   with -Werror flang makes compilation fail in the presence of
   warnings, but warnings are still printed as warnings and not as
   errors. And I anyway find it better to test the warnings as warnings
   instead of promoting them and test both warnings and errors as
   errors.
 - Update the header comment describing the test case, mostly in
   response to the removal of -Werror.
 - Remove the reference to 'issue 458', referring to
   https://github.com/flang-compiler/f18/issues/458, from the header.
   I think the relevant reference here is to C1120 of the standard,
   and references to bug trackers from other projects (from before
   upstreaming) can be confusing.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D126176
2022-05-26 15:22:51 +02:00
Joseph Huber 1bae02b773 [Cuda] Use fallback method to mangle externalized decls if no CUID given
CUDA requires that static variables be visible to the host when
offloading. However, The standard semantics of a stiatc variable dictate
that it should not be visible outside of the current file. In order to
access it from the host we need to perform "externalization" on the
static variable on the device. This requires generating a semi-unique
name that can be affixed to the variable as to not cause linker errors.

This is currently done using the CUID functionality, an MD5 hash value
set up by the clang driver. This allows us to achieve is mostly unique
ID that is unique even between multiple compilations of the same file.
However, this is not always availible. Instead, this patch uses the
unique ID from the file to generate a unique symbol name. This will
create a unique name that is consistent between the host and device side
compilations without requiring the CUID to be entered by the driver. The
one downside to this is that we are no longer stable under multiple
compilations of the same file. However, this is a very niche use-case
and is not supported by Nvidia's CUDA compiler so it likely to be good
enough.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D125904
2022-05-26 09:18:22 -04:00
Sanjay Patel 3952c905ef [InstCombine] fold icmp equality with udiv and large constant
With large compare constant:
(X u/ Y) == C --> (X == C) && (Y == 1)
(X u/ Y) != C --> (X != C) || (Y != 1)

https://alive2.llvm.org/ce/z/EhKwh6

There are various potential missing icmp (div) transforms shown here:
https://github.com/llvm/llvm-project/issues/55695

This is a generalization for part of the udiv + equality.
I didn't check in detail, but some of those may only make sense as
codegen transforms.

This results in one extra instruction in IR, but it is better for
analysis, and looks much better in codegen on all targets that I tried.

Differential Revision: https://reviews.llvm.org/D126410
2022-05-26 09:08:47 -04:00
Sanjay Patel ea6171c108 [InstCombine] add tests for icmp with udiv operand; NFC
This covers a generalization of one of the transforms
suggested in #55695.
2022-05-26 09:08:47 -04:00
Louis Dionne 851bfc07c8 [libc++abi] Use from-scratch testing configs for libc++abi by default
Like we have been doing for libc++ for a while now, start using
from-scratch testing configurations for libc++abi.

As a fly-by fix, remove the LIBCXXABI_NO_TIMER macro, which was defined
but never used.

Differential Revision: https://reviews.llvm.org/D125242
2022-05-26 09:08:31 -04:00
Simon Pilgrim f366acdbf6 [DAG] Generalize (sra (trunc (sra x, c1)), c2) -> (trunc (sra x, c1 + c2)) constant folding
Remove local (uniform) constant folding and rely on getNode() to perform it

Minor cleanup step toward adding non-uniform shift amount support
2022-05-26 14:05:09 +01:00
Marek Kurdej d4d28f2ace [clang-format] Fix QualifierAlignment with global namespace qualified types.
Fixes https://github.com/llvm/llvm-project/issues/55610.

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D126096
2022-05-26 15:02:33 +02:00
Aaron Ballman 605651135b Fix failing test case with strict prototype changes
Amends 681c50c62e and hopefully fixes:

https://lab.llvm.org/buildbot/#/builders/109/builds/39347
https://lab.llvm.org/buildbot/#/builders/188/builds/14634
and others
2022-05-26 08:46:11 -04:00
Aaron Ballman 681c50c62e Improve the strict prototype diagnostic behavior
Post-commit feedback on https://reviews.llvm.org/D122895 pointed out
that the diagnostic wording for some code was using "declaration" in a
confusing way, such as:

int foo(); // warning: a function declaration without a prototype is deprecated in all versions of C and is not supported in C2x

int foo(int arg) { // warning: a function declaration without a prototype is deprecated in all versions of C and is not supported in C2x
  return 5;
}

And that we had other minor issues with the diagnostics being somewhat
confusing.

This patch addresses the confusion by reworking the implementation to
be a bit more simple and a bit less chatty. Specifically, it changes
the warning and note diagnostics to be able to specify "declaration" or
"definition" as appropriate, and it changes the function merging logic
so that the function without a prototype is always what gets warned on,
and the function with a prototype is sometimes what gets noted.
Additionally, when diagnosing a K&R C definition that is preceded by a
function without a prototype, we don't note the prior declaration, we
warn on it because it will also be changing behavior in C2x.

Differential Revision: https://reviews.llvm.org/D125814
2022-05-26 08:35:56 -04:00
Gabor Marton cd5783d3e8 [analyzer][solver] Handle UnarySymExpr in SMTConv
Dependent patch adds UnarySymExpr, now I'd like to handle that for SMT
conversions like refutation.

Differential Revision: https://reviews.llvm.org/D125547
2022-05-26 14:14:10 +02:00
Gabor Marton 88abc50398 [analyzer][solver] Handle UnarySymExpr in RangeConstraintSolver
Fixes https://github.com/llvm/llvm-project/issues/55241

Differential Revision: https://reviews.llvm.org/D125395
2022-05-26 14:09:46 +02:00
Gabor Marton b5b2aec1ff [analyzer] Add UnarySymExpr
This patch adds a new descendant to the SymExpr hierarchy. This way, now
we can assign constraints to symbolic unary expressions. Only the unary
minus and bitwise negation are handled.

Differential Revision: https://reviews.llvm.org/D125318
2022-05-26 14:00:27 +02:00
Gabor Marton ca3d962548 [analyzer] Return from reAssume if State is posteriorly overconstrained
Depends on D124758. That patch introduced serious regression in the run-time in
some special cases. This fixes that.

Differential Revision: https://reviews.llvm.org/D126406
2022-05-26 13:50:40 +02:00
Ivan Kosarev b0ccf38b01 [AMDGPU][GFX9] Support base+soffset+offset SMEM loads.
Resolves part of
https://github.com/llvm/llvm-project/issues/38652

Reviewed By: dp

Differential Revision: https://reviews.llvm.org/D125700
2022-05-26 12:42:33 +01:00
Aaron Ballman 85750de685 Use the canonical type when matching a generic selection association
This ensures that a deduced type like __auto_type matches the correct
association instead of matching all associations.

This addresses a regression from e4a42c5b64

Fixes #55702
2022-05-26 07:42:13 -04:00
Simon Pilgrim 7b617eef80 [DAG] Cleanup "and/or of cmp with single bit diff" fold to use ISD::matchBinaryPredicate
Prep work as I'm investigating some cases where TLI::convertSetCCLogicToBitwiseLogic should accept vectors.
2022-05-26 12:34:09 +01:00
Ivan Kosarev 8894c05b0d [FileCheck] GetCheckTypeAbbreviation() to handle the misspelled case.
Also fix directives not covered by D125604.
2022-05-26 12:20:15 +01:00
Chen Zheng d79275238f [MachineSink] replace MachineLoop with MachineCycle
reapply 62a9b36fcf and fix module build
failue:
1: remove MachineCycleInfoWrapperPass in MachinePassRegistry.def
   MachineCycleInfoWrapperPass is a anylysis pass, should not be there.
2: move the definition for MachineCycleInfoPrinterPass to cpp file.

Otherwise, there are module conflicit for MachineCycleInfoWrapperPass
in MachinePassRegistry.def and MachineCycleAnalysis.h after
62a9b36fcf.

MachineCycle can handle irreducible loop. Natural loop
analysis (MachineLoop) can not return correct loop depth if
the loop is irreducible loop. And MachineSink is sensitive
to the loop depth, see MachineSinking::isProfitableToSinkTo().

This patch tries to use MachineCycle so that we can handle
irreducible loop better.

Reviewed By: sameerds, MatzeB

Differential Revision: https://reviews.llvm.org/D123995
2022-05-26 06:45:23 -04:00
Ivan Kosarev ad1d60c3be [FileCheck] Catch missspelled directives.
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D125604
2022-05-26 11:37:19 +01:00
Alex Zinenko 73c3dff1b3 [mlir] Use-after-free checker for the Transform dialect
The Transform dialect uses the side effect modeling mechanism to record the
effects of the transform ops on the mapping between Transform IR values and
Payload IR ops. Introduce a checker pass that warns if a Transform IR value is
used after it has been freed (consumed). This pass is mostly intended as a
debugging aid in addition to the verification/assertion mechanisms in the
transform interpreter. It reports all potential use-after-free situations.
The implementation makes a series of simplifying assumptions to be simple and
conservative. A more advanced implementation would rely on the data flow-like
analysis associated with a side-effect resource rather than a value, which is
currently not supported by the analysis infrastructure.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D126381
2022-05-26 12:28:41 +02:00
Simon Pilgrim b45e046858 [X86] Add non-uniform vector tests for 'one bit diff' comparison fold 2022-05-26 11:13:20 +01:00
Florian Hahn a9a012086a
[AArch64] Add additional tests for sinking free shuffles for FMAs. 2022-05-26 10:35:38 +01:00
David Spickett 38eb4fe74b [llvm][DWARF] Move test using X86 triple into X86 tests
Fixes failure seen when building without X86 backend:
https://lab.llvm.org/buildbot/#/builders/171/builds/15124
2022-05-26 09:27:23 +00:00
David Green 75631438e3 [AArch64] Costmodel tests for llvm.vscale intrinsics. NFC
These shows that the cost of a @llvm.vscale is indeed 1, not 10.
2022-05-26 10:16:21 +01:00