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109 Commits

Author SHA1 Message Date
Colin LeMahieu b580d7d8c8 [Hexagon] Adding word combine dot-new form and replacing old combine opcode. 
llvm-svn: 223815
 2014-12-09 19:23:45 +00:00
Colin LeMahieu 30dcb232b0 [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings. 
llvm-svn: 223800
 2014-12-09 18:16:49 +00:00
Colin LeMahieu 5cf5632696 [Hexagon] Removing old def versions and replacing usages with versions that have encodings. 
llvm-svn: 223720
 2014-12-08 23:55:43 +00:00
Colin LeMahieu f5b4d655d2 [Hexagon] Adding any8, all8, and/or/xor/andn/orn/not predicate register forms, mask, and vitpack instructions and patterns. 
llvm-svn: 223710
 2014-12-08 23:07:59 +00:00
Colin LeMahieu b6c4dd96f9 [Hexagon] Adding xtype doubleword add, sub, and, or, xor and patterns. 
llvm-svn: 223702
 2014-12-08 22:19:14 +00:00
Colin LeMahieu 9bfe5473da [Hexagon] Adding xtype doubleword comparisons. Removing unused multiclass. 
llvm-svn: 223701
 2014-12-08 21:56:47 +00:00
Colin LeMahieu 025f860638 [Hexagon] Adding xtype parity, min, minu, max, maxu instructions. 
llvm-svn: 223693
 2014-12-08 21:19:18 +00:00
Colin LeMahieu 8d1376c60e [Hexagon] Adding xtype halfword add/sub ll/hl/lh/hh/sat/<<16 instructions. 
llvm-svn: 223692
 2014-12-08 20:33:01 +00:00
Colin LeMahieu cc46cd8eec [Hexagon] Adding add/sub with saturation. Removing unused def. Cleaning up shift patterns. 
llvm-svn: 223680
 2014-12-08 18:33:49 +00:00
Colin LeMahieu b56e6cd9b9 [Hexagon] Adding combine reg, reg with predicated forms. 
llvm-svn: 223667
 2014-12-08 17:33:06 +00:00
Colin LeMahieu a55070dbdd [Hexagon] Adding packhl instruction. 
llvm-svn: 223664
 2014-12-08 17:01:18 +00:00
Colin LeMahieu d8b766072b [Hexagon] Relocating logical instructions and templates later in the td file. 
llvm-svn: 223523
 2014-12-05 21:51:12 +00:00
Colin LeMahieu 2c77a35e6e [Hexagon] Adding sub/and/or reg, imm forms 
llvm-svn: 223522
 2014-12-05 21:38:29 +00:00
Colin LeMahieu 9665f98c10 [Hexagon] Updating mux_ir/ri/ii/rr with encoding bits 
llvm-svn: 223515
 2014-12-05 21:09:27 +00:00
Colin LeMahieu 19985e9a8d [Hexagon] Adding tfrih/l instructions. 
llvm-svn: 223506
 2014-12-05 20:07:19 +00:00
Colin LeMahieu a4ab58101a [Hexagon] Adding add reg, imm form with encoding bits and test. 
llvm-svn: 223504
 2014-12-05 19:51:23 +00:00
Colin LeMahieu 383c36e3a8 [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combine imm-imm form. 
llvm-svn: 223494
 2014-12-05 18:24:06 +00:00
Colin LeMahieu 63035ebee1 [Hexagon] [NFC] Rearranging patterns and mux instruction. 
llvm-svn: 223488
 2014-12-05 17:58:06 +00:00
Colin LeMahieu 7358593e34 [Hexagon] [NFC] Rearranging def order. 
llvm-svn: 223487
 2014-12-05 17:55:51 +00:00
Colin LeMahieu 7f0a430c7d [Hexagon] Adding combine reg-reg forms. 
llvm-svn: 223485
 2014-12-05 17:38:36 +00:00
Colin LeMahieu 01785bb063 [Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions. 
llvm-svn: 223482
 2014-12-05 17:27:39 +00:00
Colin LeMahieu 5d6f03bd5a [Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly tests. 
llvm-svn: 223334
 2014-12-04 03:41:21 +00:00
Colin LeMahieu 6e0f9f8d61 [Hexagon] Adding cmp* immediate form instructions. 
llvm-svn: 222849
 2014-11-26 19:43:12 +00:00
Colin LeMahieu 31abe33726 [Hexagon] Adding and64, or64, and xor64 instructions. 
llvm-svn: 222846
 2014-11-26 18:55:59 +00:00
Craig Topper c50d64b07b Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files. 
llvm-svn: 222801
 2014-11-26 00:46:26 +00:00
Colin LeMahieu b3d08bb44b [Hexagon] Adding add64 and sub64 instructions. 
llvm-svn: 222795
 2014-11-25 22:15:44 +00:00
Colin LeMahieu 6f6c4ff1fc Reverting 222792 
llvm-svn: 222793
 2014-11-25 21:39:57 +00:00
Colin LeMahieu aaf33928ee [Hexagon] Adding compare with immediate instructions. 
llvm-svn: 222792
 2014-11-25 21:30:28 +00:00
Colin LeMahieu 6f352b03a4 [Hexagon] Adding NOP encoding bits. 
llvm-svn: 222791
 2014-11-25 21:23:07 +00:00
Colin LeMahieu e83bc7476f [Hexagon] Adding C2_mux instruction. 
llvm-svn: 222784
 2014-11-25 20:20:09 +00:00
Colin LeMahieu 902157c249 [Hexagon] Replacing cmp* instructions with ones that contain encoding bits. 
llvm-svn: 222771
 2014-11-25 18:20:52 +00:00
Colin LeMahieu 397a25e7cd [Hexagon] Adding asrh instruction, removing unused multiclasses. 
llvm-svn: 222670
 2014-11-24 18:04:42 +00:00
Colin LeMahieu 3b3197ef95 [Hexagon] Adding aslh instruction. 
llvm-svn: 222668
 2014-11-24 17:44:19 +00:00
Colin LeMahieu 098256c5e6 [Hexagon] Adding zxth instruction. 
llvm-svn: 222662
 2014-11-24 17:11:34 +00:00
Colin LeMahieu bb7d6f5514 [Hexagon] Adding zxtb instruction. 
llvm-svn: 222660
 2014-11-24 16:48:43 +00:00
Colin LeMahieu 310991c66f [Hexagon] Adding sxth instruction. 
llvm-svn: 222577
 2014-11-21 21:54:59 +00:00
Colin LeMahieu 91ffec908f [Hexagon] Adding sxtb instruction. Renaming some identically named classes that will be removed after converting referencing defs. 
llvm-svn: 222575
 2014-11-21 21:35:52 +00:00
Colin LeMahieu e88447d8de [Hexagon] Removing SUB_rr and replacing with A2_sub. 
llvm-svn: 222571
 2014-11-21 21:19:18 +00:00
Colin LeMahieu ac00643603 [Hexagon] Adding A2_xor instruction with IR selection pattern and test. 
llvm-svn: 222399
 2014-11-19 23:22:23 +00:00
Colin LeMahieu 21866546ae [Hexagon] Adding A2_or instruction with IR selection pattern and test. 
llvm-svn: 222396
 2014-11-19 22:58:04 +00:00
Colin LeMahieu 44fd1c8bdf [Hexagon] Adding A2_and instruction. 
llvm-svn: 222274
 2014-11-18 22:45:47 +00:00
Colin LeMahieu 38765e6d89 [Hexagon] Adding A2_sub instruction 
Renaming test files.

llvm-svn: 222263
 2014-11-18 21:51:51 +00:00
Colin LeMahieu efa74e0280 [Hexagon] Converting from ADD_rr to A2_add which has encoding bits. 
Adding test to show correct instruction selection and encoding.

llvm-svn: 222249
 2014-11-18 20:28:11 +00:00
Colin LeMahieu 5241881bbc [Hexagon] Reverting 220584 to address ASAN errors. 
llvm-svn: 221210
 2014-11-04 00:14:36 +00:00
Colin LeMahieu 838307b31f [Hexagon] Resubmission of 220427 
Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst.
Adding encoding bits for add opcode.
Adding llvm-mc tests.
Removing unit tests.

http://reviews.llvm.org/D5624

llvm-svn: 220584
 2014-10-24 19:00:32 +00:00
NAKAMURA Takumi 504bbf91cd Revert r220427, "[Hexagon] Adding encoding bits for add opcode." 
It brought cyclic dependecy between HexagonAsmPrinter and HexagonDesc.

llvm-svn: 220478
 2014-10-23 11:31:22 +00:00
Colin LeMahieu 73a51a1a68 [Hexagon] Adding encoding bits for add opcode. 
Adding llvm-mc tests.
Removing unit tests.

http://reviews.llvm.org/D5624

llvm-svn: 220427
 2014-10-22 20:58:35 +00:00
Colin LeMahieu 88ebb9e2da [Hexagon] Adding basic disassembler. 
Marking all instructions as CodeGenOnly since encoding bits are not set yet.
http://reviews.llvm.org/D5829?vs=on&id=15023&whitespace=ignore-all#toc

llvm-svn: 220393
 2014-10-22 16:49:14 +00:00
Jyotsna Verma f98a1eca6e [Hexagon] Add New TSFlags to be used in the upcoming patches. 
llvm-svn: 208239
 2014-05-07 19:07:34 +00:00
Jyotsna Verma 803e506fec Hexagon: Pass to replace tranfer/copy instructions into combine instruction 
where possible.

llvm-svn: 181817
 2013-05-14 18:54:06 +00:00