Chris Lattner
0548f50501
add a method
...
llvm-svn: 22955
2005-08-21 19:48:59 +00:00
Chris Lattner
433390fba2
ADd a method
...
llvm-svn: 22954
2005-08-21 19:48:53 +00:00
Chris Lattner
968aeb18b0
Don't print out the MBB label for the entry mbb
...
llvm-svn: 22953
2005-08-21 19:09:33 +00:00
Chris Lattner
519acbfb76
Simplify the logic for BRTWOWAY_CC handling. The isel code already
...
simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.
llvm-svn: 22952
2005-08-21 19:03:28 +00:00
Chris Lattner
2a1823d178
Implement selection for branches.
...
llvm-svn: 22951
2005-08-21 18:50:37 +00:00
Chris Lattner
46059044c6
Add 5-operand version of SelectNodeTo
...
llvm-svn: 22950
2005-08-21 18:49:58 +00:00
Chris Lattner
707b39fb8c
add a method
...
llvm-svn: 22949
2005-08-21 18:49:33 +00:00
Chris Lattner
154b2bc59b
Add support for basic blocks, fix a bug in result # computation
...
llvm-svn: 22948
2005-08-21 18:49:29 +00:00
Chris Lattner
539c3fa863
When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
...
the old condition to a one bit value. The incoming value must have been
promoted, and the top bits are undefined. This causes us to generate:
_test:
rlwinm r2, r3, 0, 31, 31
li r3, 17
cmpwi cr0, r2, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r3, 1
.LBB_test_2: ;
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
for:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
llvm-svn: 22947
2005-08-21 18:03:09 +00:00
Chris Lattner
0500e362bf
If the false value for a select_cc is really simple (has no inputs), evaluate
...
it in the block. This codegens:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
as:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
li r4, 1
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r2, r4, r4
.LBB_test_2: ;
or r3, r2, r2
blr
... which is one fewer instruction. The savings are more significant for
global address and constantfp nodes.
llvm-svn: 22946
2005-08-21 17:41:11 +00:00
Chris Lattner
7b6b326b2c
Fix a bug in the RUN line
...
llvm-svn: 22945
2005-08-21 16:37:36 +00:00
Duraid Madina
3588ea9bf5
reenable collapse of loadimm+AND -> dep.z (thanks guys)
...
llvm-svn: 22944
2005-08-21 15:43:53 +00:00
Chris Lattner
4b08ba26d8
fix bogus warning
...
llvm-svn: 22943
2005-08-20 18:07:27 +00:00
Jim Laskey
9b0a275f04
Repair an out by one error for IA64.
...
llvm-svn: 22942
2005-08-20 11:05:23 +00:00
Chris Lattner
4564039498
add support for global address, including PIC support.
...
This REALLY should be lowered by the legalizer!
llvm-svn: 22941
2005-08-19 22:38:53 +00:00
Chris Lattner
319e65696d
Add support for global address nodes
...
llvm-svn: 22940
2005-08-19 22:38:24 +00:00
Chris Lattner
7f618f4982
ADd support for TargetGlobalAddress nodes
...
llvm-svn: 22939
2005-08-19 22:31:34 +00:00
Chris Lattner
1be7eddecf
Add support for TargetGlobalAddress nodes
...
llvm-svn: 22938
2005-08-19 22:31:04 +00:00
Chris Lattner
6d7f814b01
Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows
...
us to compile stuff like this:
double %test(double %A, double %B, double %C, double %E) {
%F = mul double %A, %A
%G = add double %F, %B
%H = sub double -0.0, %G
%I = mul double %H, %C
%J = add double %I, %E
ret double %J
}
to:
_test:
fnmadd f0, f1, f1, f2
fmadd f1, f0, f3, f4
blr
woot!
llvm-svn: 22937
2005-08-19 21:43:53 +00:00
Chris Lattner
0875d1ab89
Fix a bug in previous commit
...
llvm-svn: 22936
2005-08-19 21:34:13 +00:00
Chris Lattner
65d66797a5
Fix a typeo, no wonder all tokenfactor edges were the same!
...
llvm-svn: 22935
2005-08-19 21:33:02 +00:00
Chris Lattner
4990335eb8
Print physreg register nodes with target names (e.g. F1) instead of numbers
...
llvm-svn: 22934
2005-08-19 21:21:16 +00:00
Chris Lattner
78b200eb74
Before implementing copyfromreg, we'll implement copytoreg correctly.
...
This gets us this for the previous testcase:
_test:
lis r2, 0
ori r3, r2, 65535
blr
Note that we actually write to r3 (the return reg) correctly now :)
llvm-svn: 22933
2005-08-19 20:50:53 +00:00
Chris Lattner
cc3035e989
Now that we have operand info for machine instructions, use it to create
...
temporary registers for things that define a register. This allows dag->dag
isel to compile this:
int %test() { ret int 65535 }
into:
_test:
lis r2, 0
ori r2, r2, 65535
blr
Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.
llvm-svn: 22932
2005-08-19 20:45:43 +00:00
Chris Lattner
96d0234845
Emit this:
...
static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, };
instead of this:
static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, };
For operand information, which does not require dynamic (startup-time)
initialization.
llvm-svn: 22931
2005-08-19 20:29:14 +00:00
Chris Lattner
8ed3d0a0ce
Expose the derived register classes to the public header, allowing them
...
to be accessed.
llvm-svn: 22930
2005-08-19 20:23:42 +00:00
Chris Lattner
bd26a82051
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
...
llvm-svn: 22929
2005-08-19 19:13:20 +00:00
Chris Lattner
73ec2cb0f5
Split register class "Methods" into MethodProtos and MethodBodies
...
llvm-svn: 22928
2005-08-19 19:12:51 +00:00
Chris Lattner
248933eb39
put reg classes into namespace
...
llvm-svn: 22927
2005-08-19 18:53:43 +00:00
Chris Lattner
1dee9b1685
Put reg classes into namespaces
...
llvm-svn: 22926
2005-08-19 18:52:55 +00:00
Chris Lattner
757a770a57
Put register classes into namespaces
...
llvm-svn: 22925
2005-08-19 18:51:57 +00:00
Chris Lattner
8975de187f
Put register classes in namespaces
...
llvm-svn: 22924
2005-08-19 18:50:46 +00:00
Chris Lattner
dc89d6be04
Fix code that assumes the register info will be dumped into a target
...
namespace instead of the reg class namespace. Update getRegClassForType()
to use modified names due to tblgen change.
llvm-svn: 22923
2005-08-19 18:50:11 +00:00
Chris Lattner
cca0503c24
put reg classes in namespaces
...
llvm-svn: 22922
2005-08-19 18:49:22 +00:00
Chris Lattner
3fb85f2702
Require that targets specify a namespace for their register classes.
...
llvm-svn: 22921
2005-08-19 18:48:48 +00:00
Chris Lattner
74f60c306d
Refactor to use Target.getRegisterClasses consistently, which provides
...
anonymous regclass definition renaming.
Change the generated code to emit register classes as properly namespace
qualified entities like everything else.
expose the actual class definition as an object, though this isn't quite
usable yet.
llvm-svn: 22920
2005-08-19 18:47:59 +00:00
Chris Lattner
d02bd5bb05
Emit real operand info for instructions. This currently works but is bad
...
in one way: the generated tables require dynamic initialization for the
register classes. This will be fixed in a future patch.
llvm-svn: 22919
2005-08-19 18:46:26 +00:00
Chris Lattner
418d8cfcfe
Read the namespace field from register classes
...
llvm-svn: 22918
2005-08-19 18:45:20 +00:00
Chris Lattner
3262673610
The skeleton target has never had an isel
...
llvm-svn: 22917
2005-08-19 18:35:41 +00:00
Chris Lattner
f391f286d7
This code has always been dead on itanium
...
llvm-svn: 22916
2005-08-19 18:34:37 +00:00
Chris Lattner
0faf0b7313
This code has always been dead for alpha
...
llvm-svn: 22915
2005-08-19 18:33:26 +00:00
Chris Lattner
8ad3700a3e
The simple isel being gone makes this dead!
...
llvm-svn: 22914
2005-08-19 18:32:03 +00:00
Chris Lattner
ef6d8d8e94
Now that the simple isels are dead, so is this.
...
llvm-svn: 22913
2005-08-19 18:30:39 +00:00
Chris Lattner
f9b2edb91f
add a setName method to record
...
llvm-svn: 22912
2005-08-19 17:58:49 +00:00
Chris Lattner
ac284259ac
Add a setName method to Record.
...
llvm-svn: 22911
2005-08-19 17:58:11 +00:00
Chris Lattner
220d00109b
For now, just emit empty operand info structures.
...
llvm-svn: 22910
2005-08-19 16:57:28 +00:00
Chris Lattner
63143a0609
Sparcv9 gets no operand info
...
llvm-svn: 22909
2005-08-19 16:56:56 +00:00
Chris Lattner
fa7c66bcea
Add a new field to TargetInstrDescriptor for tracking information about
...
operands.
llvm-svn: 22908
2005-08-19 16:56:26 +00:00
Jeff Cohen
486e36cfde
Fix VC++ constant truncation warning.
...
llvm-svn: 22907
2005-08-19 16:19:21 +00:00
Jeff Cohen
91e218fb1d
Update Visual Studio projects for removed file.
...
llvm-svn: 22905
2005-08-19 13:51:22 +00:00