26070c5cff
when previous scratch register is killed, flag the value as no longer tracking
...
llvm-svn: 83653
2009-10-09 17:33:33 +00:00
dc4893abfe
Revert r83606 and add comments explaining why it isn't safe.
...
llvm-svn: 83649
2009-10-09 16:35:06 +00:00
7ddb844a2d
Give Dan and my recent changes, machine LICM is now code size neutral.
...
llvm-svn: 83624
2009-10-09 06:31:25 +00:00
ccd4545ecb
Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop.
...
llvm-svn: 83622
2009-10-09 06:21:52 +00:00
be27d61cbc
Reset kill markers after live interval is reconstructed.
...
llvm-svn: 83608
2009-10-09 01:17:11 +00:00
d65387a49f
Preserve HasNSW and HasNUW when constructing SCEVs for Add and Mul
...
instructions.
llvm-svn: 83606
2009-10-09 00:41:22 +00:00
3059924bdd
When considering whether to inline Callee into Caller,
...
and that will make Caller too big to inline, see if it
might be better to inline Caller into its callers instead.
This situation is described in PR 2973, although I haven't
tried the specific case in SPASS.
llvm-svn: 83602
2009-10-09 00:11:32 +00:00
816fe0a4aa
Add the ability to track HasNSW and HasNUW on more kinds of SCEV expressions.
...
llvm-svn: 83601
2009-10-09 00:10:36 +00:00
84e7967fae
Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.
...
llvm-svn: 83600
2009-10-09 00:01:36 +00:00
c409030838
Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.
...
llvm-svn: 83598
2009-10-08 23:51:31 +00:00
b851eb356a
Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.
...
llvm-svn: 83596
2009-10-08 23:38:24 +00:00
38ba47225a
Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.
...
Also fix some copy-and-paste errors in previous changes.
llvm-svn: 83590
2009-10-08 22:53:57 +00:00
e23984fbbe
Remove code that makes no sense.
...
llvm-svn: 83589
2009-10-08 22:42:35 +00:00
cf54e934f8
Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.
...
llvm-svn: 83585
2009-10-08 22:27:33 +00:00
da3c79698c
Update CMake build yet again after a source file was removed
...
llvm-svn: 83575
2009-10-08 21:24:34 +00:00
3dc625cdce
It's possible for a global variable to be optimized out of a metadata object. So
...
we should allow a "null" with this dyn_cast.
llvm-svn: 83573
2009-10-08 20:52:51 +00:00
222b86cd54
Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair.
...
llvm-svn: 83572
2009-10-08 20:43:22 +00:00
e1969dcd11
Clear variable debug info map at the end of the function.
...
llvm-svn: 83571
2009-10-08 20:41:17 +00:00
c2728f44a9
Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
...
llvm-svn: 83568
2009-10-08 18:56:10 +00:00
fac9476589
Clean up some unnecessary initializations.
...
llvm-svn: 83566
2009-10-08 18:52:56 +00:00
4facd965bd
Clean up a comment (indentation was wrong).
...
llvm-svn: 83565
2009-10-08 18:51:31 +00:00
2a45a65511
Add a SelectionDAG getTargetInsertSubreg convenience function,
...
similar to getTargetExtractSubreg.
llvm-svn: 83564
2009-10-08 18:49:46 +00:00
20b2a77765
Do not record line number to implicitly mark start of function if function has arguments. Extra line number entries trip gdb in some cases.
...
llvm-svn: 83563
2009-10-08 18:48:03 +00:00
02fda54e8f
Add missing names for the XCore specific LADD and LSUB nodes.
...
llvm-svn: 83556
2009-10-08 17:14:57 +00:00
09984279fd
Add a form of addPreserved which takes a string argument, to allow passes
...
to declare that they preserve other passes without needing to pull in
additional header file or library dependencies. Convert MachineFunctionPass
and CodeGenLICM to make use of this.
llvm-svn: 83555
2009-10-08 17:00:02 +00:00
4e13316bf9
Add some peepholes for signed comparisons using ashr X, X, 32.
...
llvm-svn: 83549
2009-10-08 15:38:17 +00:00
78765deded
remove LoopVR pass. According to Nick:
...
"LoopVR's logic was copied into ScalarEvolution::getUnsignedRange and
::getSignedRange. Please delete LoopVR."
llvm-svn: 83531
2009-10-08 06:42:44 +00:00
b6b0ab6117
Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83526
2009-10-08 05:18:18 +00:00
534ea5ae32
Cleanup up unused R3LiveIn tracking.
...
llvm-svn: 83522
2009-10-08 01:50:26 +00:00
c0615aa17f
Re-enable register scavenging in Thumb1 by default.
...
llvm-svn: 83521
2009-10-08 01:46:59 +00:00
48a805bc6c
bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that.
...
llvm-svn: 83519
2009-10-08 01:09:45 +00:00
71387b4b2f
Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83518
2009-10-08 00:28:28 +00:00
d4f5670096
Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83513
2009-10-08 00:21:01 +00:00
dafd08ea7e
In instcombine's debug output, avoid printing ADD for instructions that are
...
already on the worklist, and print Visited when an instruction is about to be
visited. Net, on one input, this reduced the output size by at least 9x.
llvm-svn: 83510
2009-10-08 00:12:24 +00:00
32cc4ec304
Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83508
2009-10-07 23:54:04 +00:00
5ef3c6d9f4
Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83506
2009-10-07 23:39:57 +00:00
763be1a248
Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83502
2009-10-07 22:57:01 +00:00
456735c54b
reverting thumb1 scavenging default due to test failure while I figure out what's up.
...
llvm-svn: 83501
2009-10-07 22:49:41 +00:00
63fe7ff7d9
second half of lazy liveness removal.
...
llvm-svn: 83500
2009-10-07 22:49:30 +00:00
e32fe29d29
Fix handling of x86 'R' constraint.
...
llvm-svn: 83499
2009-10-07 22:47:20 +00:00
267fa622fa
Enable thumb1 register scavenging by default.
...
llvm-svn: 83496
2009-10-07 22:26:31 +00:00
37cf79e5a6
Enable thumb1 register scavenging by default.
...
llvm-svn: 83494
2009-10-07 22:26:14 +00:00
55571bd7bd
Extract subprogram and compile unit information from the debug info attached to an instruction.
...
llvm-svn: 83491
2009-10-07 22:04:08 +00:00
50820a2677
Add some instruction encoding bits for NEON load/store instructions.
...
llvm-svn: 83490
2009-10-07 21:53:04 +00:00
5b741f3d14
80-column and whitespace fixes.
...
llvm-svn: 83489
2009-10-07 21:14:25 +00:00
818b6b96cb
Fixed MCSectionMachO::ParseSectionSpecifier to allow an attribute of "none" so
...
that a symbol stub section with no attributes can be parsed as in:
.section __TEXT,__picsymbolstub4,symbol_stubs,none,16
llvm-svn: 83488
2009-10-07 20:57:20 +00:00
e7ef4a9a6b
Add codegen support for NEON vst4 intrinsics with 128-bit vectors.
...
llvm-svn: 83486
2009-10-07 20:49:18 +00:00
23464866ad
Add codegen support for NEON vst3 intrinsics with 128-bit vectors.
...
llvm-svn: 83484
2009-10-07 20:30:08 +00:00
63849cbd32
grammar
...
llvm-svn: 83483
2009-10-07 19:08:36 +00:00
3dcb5377ef
Add codegen support for NEON vst2 intrinsics with 128-bit vectors.
...
llvm-svn: 83482
2009-10-07 18:47:39 +00:00
2af2253e49
add initializers for clarity. Add missing assignment of PrevLastUseOp.
...
llvm-svn: 83481
2009-10-07 18:44:24 +00:00
de1cb40eb4
Remove LazyLiveness from the tree. It doesn't work right now, and I'm not going to have the time
...
to finish it any time soon. If someone's interested it, they can resurrect it from SVN history.
llvm-svn: 83480
2009-10-07 18:40:17 +00:00
ab3a9474d6
Add codegen support for NEON vld4 intrinsics with 128-bit vectors.
...
llvm-svn: 83479
2009-10-07 18:09:32 +00:00
2207e5fc7b
Add another bit of the ARM target assembler to llvm-mc to parse registers
...
with writeback, things like "sp!", etc. Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.
llvm-svn: 83477
2009-10-07 18:01:35 +00:00
9b60992120
Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, and
...
teach it how to recognize invariant physical registers.
llvm-svn: 83476
2009-10-07 17:47:20 +00:00
be8137b0b4
Replace TargetInstrInfo::isInvariantLoad and its target-specific
...
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.
llvm-svn: 83475
2009-10-07 17:38:06 +00:00
db9493ce68
Add a few simple MachineVerifier checks for MachineMemOperands.
...
llvm-svn: 83474
2009-10-07 17:36:00 +00:00
6bbefc2f67
Add codegen support for NEON vld3 intrinsics with 128-bit vectors.
...
llvm-svn: 83471
2009-10-07 17:24:55 +00:00
99e80228a9
Rearrange code for selecting vld2 intrinsics. No functionality change.
...
This is just to be more consistent with the forthcoming code for vld3/4.
llvm-svn: 83470
2009-10-07 17:23:09 +00:00
fa14dd430c
Add register-reuse to frame-index register scavenging. When a target uses
...
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
llvm-svn: 83467
2009-10-07 17:12:56 +00:00
bcdb02587e
Do not assume that the module is set.
...
llvm-svn: 83462
2009-10-07 16:37:55 +00:00
a4560bad97
Add PR to this FIXME, looks like I didn't commit this change after all.
...
llvm-svn: 83457
2009-10-07 09:22:55 +00:00
986742a14f
Make getPointerTo return a const PointerType* rather than
...
an unqualified PointerType* because it seems more correct.
llvm-svn: 83454
2009-10-07 07:35:19 +00:00
e666bc9f64
Add FreeInst to the "is a call" check for Insts that are calls, but
...
not intrinsics.
llvm-svn: 83441
2009-10-07 00:54:08 +00:00
f8e4410994
Fix this comment. The loop header is the loop entry point.
...
llvm-svn: 83437
2009-10-07 00:33:10 +00:00
75b59fb055
Add PseudoSourceValues for constpool stuff on ELF (Darwin should use something similar)
...
and register spills.
llvm-svn: 83435
2009-10-07 00:06:35 +00:00
6ba26317ce
While we still have a MallocInst treat it as a call like any other
...
for inlining.
When MallocInst goes away this code will be subsumed as part of
calls and work just fine...
llvm-svn: 83434
2009-10-07 00:02:18 +00:00
febe39b488
Added bits of the ARM target assembler to llvm-mc to parse some load instruction
...
operands. Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts. This is a work in progress.
llvm-svn: 83424
2009-10-06 22:26:42 +00:00
e6b778d5ff
Add codegen support for NEON vld2 operations on quad registers.
...
llvm-svn: 83422
2009-10-06 22:01:59 +00:00
74b3d284f2
Use copyRegToReg hook to copy registers.
...
llvm-svn: 83421
2009-10-06 22:01:15 +00:00
e2595b5be6
r83391 was completely broken since Twines keep references to their inputs, and
...
some of the inputs were temporaries. Here's a real fix for the miscompilation.
Thanks to sabre for pointing out the problem.
llvm-svn: 83417
2009-10-06 21:45:26 +00:00
dc7d1ce575
Fix a comment typo.
...
Patch by Johnny Chen.
llvm-svn: 83407
2009-10-06 20:18:46 +00:00
08506ee6b0
Bugfix for the CommaSeparated option. The original code was adding the whole
...
string at the end of the list, instead of the last comma-separated string.
llvm-svn: 83405
2009-10-06 19:55:53 +00:00
2275a7dfef
Update CMake file.
...
llvm-svn: 83404
2009-10-06 19:45:38 +00:00
4598eb6214
Add support to handle debug info attached to an instruction.
...
This is not yet enabled.
llvm-svn: 83400
2009-10-06 18:37:31 +00:00
10d3dc569b
Instead of printing unnecessary basic block labels as labels in
...
verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
llvm-svn: 83392
2009-10-06 17:38:38 +00:00
92e3a06623
Fix PR5112, a miscompilation on gcc-4.0.3. Patch by Collin Winter!
...
llvm-svn: 83391
2009-10-06 17:25:50 +00:00
a893f5bdf5
remove predicate simplifier, it never got the last bugs beaten
...
out of it, and jump threading, condprop and gvn are now getting
most of the benefit. This was approved by Nicholas and Nicolas.
llvm-svn: 83390
2009-10-06 16:59:46 +00:00
692f6e7f9d
Remove xs1b predicate since it is no longer needed to differentiate betweem
...
xs1a and xs1b.
llvm-svn: 83383
2009-10-06 16:17:57 +00:00
d7b887410d
Remove xs1a subtarget. xs1a is a preproduction device used in
...
early development boards which is no longer supported in the
XMOS toolchain.
llvm-svn: 83381
2009-10-06 16:01:09 +00:00
29e8555056
Default to the xs1b subtarget
...
llvm-svn: 83380
2009-10-06 15:41:52 +00:00
9ed7b16bf3
Introduce and use convenience methods for getting pointer types
...
where the element is of a basic builtin type. For example, to get
an i8* use getInt8PtrTy.
llvm-svn: 83379
2009-10-06 15:40:36 +00:00
fa21fe7c3d
grammar
...
llvm-svn: 83378
2009-10-06 15:03:44 +00:00
7d838bb66e
Fix cut-n-pasto.
...
llvm-svn: 83367
2009-10-06 03:15:38 +00:00
eb43b17074
Update processDebugLoc() to handle requests to process debug info, before and after emitting instructions.
...
llvm-svn: 83364
2009-10-06 03:04:58 +00:00
051454a16f
Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction.
...
llvm-svn: 83363
2009-10-06 02:19:11 +00:00
2980a22028
Remove dead code.
...
llvm-svn: 83362
2009-10-06 02:01:32 +00:00
8db360da7b
Add utility routine to set begin and end labels for DbgScopes.
...
This will be used by processDebugLoc().
llvm-svn: 83361
2009-10-06 01:50:42 +00:00
849e59abb2
Remove unintentional function decl.
...
llvm-svn: 83356
2009-10-06 01:31:35 +00:00
475d32a987
Add utility routine to collect variable debug info. This is not yet used.
...
llvm-svn: 83355
2009-10-06 01:26:37 +00:00
e97fe329e9
Fix http://llvm.org/PR5116 by rolling back r60822. This passes `make unittests
...
check-lit` on both x86-64 Linux and x86-32 Darwin.
llvm-svn: 83353
2009-10-06 00:35:55 +00:00
bb802206d2
Set default location for the function if it is not already set.
...
This code is not yet enabled.
llvm-svn: 83349
2009-10-06 00:09:08 +00:00
d859d86538
Existence of a compile unit for input source file is a good indicator to check debug info's presence in a module.
...
llvm-svn: 83348
2009-10-06 00:03:14 +00:00
1c9eef72b4
If subprogram die is not available then construct new one.
...
This can happen if debug info is processed lazily.
llvm-svn: 83347
2009-10-05 23:59:00 +00:00
4c420eca41
Adjust context for the global variables that are not at file scope, e.g.
...
void foo() { static int bar = 42; }
Here, foo's DIE is parent of bar's DIE.
llvm-svn: 83344
2009-10-05 23:40:42 +00:00
4144a82154
Set address while constructing DIE.
...
llvm-svn: 83343
2009-10-05 23:22:08 +00:00
44e5dbcaf0
Extend ConstantFolding to understand signed overflow variants
...
llvm-svn: 83338
2009-10-05 22:53:52 +00:00
2dfb5da6bb
In Thumb1, the register scavenger is not always able to use an emergency
...
spill slot. When frame references are via the frame pointer, they will be
negative, but Thumb1 load/store instructions only allow positive immediate
offsets. Instead, Thumb1 will spill to R12.
llvm-svn: 83336
2009-10-05 22:30:23 +00:00
c5b8846891
Don't treat malloc calls with non-matching prototype as malloc.
...
Fixes second part of PR5130, miscompilation in FreeBSD kernel, where malloc takes 3 params,
and *does* initialize memory.
llvm-svn: 83324
2009-10-05 21:15:43 +00:00
50d75a6099
No newline at end of files.
...
llvm-svn: 83318
2009-10-05 18:43:19 +00:00
2089d16140
Gracefully handle various scopes while recording source line info.
...
llvm-svn: 83317
2009-10-05 18:03:19 +00:00
e525d9ddc0
Remove an unnnecessary LLVMContext argument in
...
ConstantFoldLoadThroughGEPConstantExpr.
llvm-svn: 83311
2009-10-05 16:36:26 +00:00
238cf49812
Use Use::operator= instead of Use::set, for consistency.
...
llvm-svn: 83310
2009-10-05 16:31:55 +00:00
2728569a38
Remove explicit enum integer values. They don't appear to be needed, and
...
they make it less convenient to add new entries.
llvm-svn: 83308
2009-10-05 15:52:08 +00:00
774149a878
Add RIP to GR64_NOREX. This fixed a MachineVerifier error when RIP
...
is used in an operand which requires GR64_NOREX.
llvm-svn: 83307
2009-10-05 15:42:08 +00:00
fdd8790718
strength reduce a ton of type equality tests to check the typeid (Through
...
the new predicates I added) instead of going through a context and doing a
pointer comparison. Besides being cheaper, this allows a smart compiler
to turn the if sequence into a switch.
llvm-svn: 83297
2009-10-05 05:54:46 +00:00
59d939894b
teach the optimizer how to constant fold uadd/usub intrinsics.
...
llvm-svn: 83295
2009-10-05 05:26:04 +00:00
351534f9b1
simplify this code a bunch.
...
llvm-svn: 83294
2009-10-05 05:06:24 +00:00
9ca7c0913a
code simplifications.
...
llvm-svn: 83292
2009-10-05 05:00:35 +00:00
463716d559
instcombine shouldn't delete all null checks for mallocs.
...
This fixes PR5130.
llvm-svn: 83290
2009-10-05 02:47:47 +00:00
ff00c3562a
stop MachineFunctionPass from claiming that it preserves LoopDependence info,
...
which causes dependence info to be linked into lli.
llvm-svn: 83289
2009-10-05 02:35:05 +00:00
cb08fb7b83
remove llvm-db: it is completely broken and if anyone wants to do a debugger,
...
they should not base it on llvm-db (which not following almost any "best practices").
llvm-svn: 83288
2009-10-05 02:29:51 +00:00
b5049bebb3
Do away with the strange use of BitVectors in SSI, and just use normal sets. This makes the code much more C++/LLVM-ish.
...
llvm-svn: 83286
2009-10-04 18:49:55 +00:00
63c733faf9
Whitespace and formatting.
...
llvm-svn: 83285
2009-10-04 18:18:39 +00:00
286feb16a9
Fix a typo in the comment.
...
llvm-svn: 83283
2009-10-04 17:52:13 +00:00
a62bf10651
SSI needs to require DT and DF transitively, since it uses them outside of its runOnFunction.
...
Similarly, it can be marked setPreservesAll, since it does no work in its runOnFunction.
llvm-svn: 83282
2009-10-04 17:47:39 +00:00
bb4ed2394b
Allow -inline-threshold override default threshold even if compiling to optimize for size.
...
llvm-svn: 83274
2009-10-04 06:13:54 +00:00
ae4617c974
Requires element types in a constant initializer to match the element types of
...
of the constant. This reverts r6544 and r7428.
llvm-svn: 83270
2009-10-03 19:30:43 +00:00
d76b9b766c
Add a comment to describe letters used in multiclass name suffixes.
...
llvm-svn: 83257
2009-10-03 04:44:16 +00:00
a9abf57409
Fix encoding problem for VMLS instruction.
...
Thanks to Johnny Chen for pointing this out!
llvm-svn: 83256
2009-10-03 04:41:21 +00:00
a7780905e7
Oops. Renamed remaining MachineInstrIndex references.
...
llvm-svn: 83255
2009-10-03 04:31:31 +00:00
920301ecc5
Renamed MachineInstrIndex to LiveIndex.
...
llvm-svn: 83254
2009-10-03 04:21:37 +00:00
f01ee30328
MingW build fixes
...
- MingW needs -lpsapi (in ${LIBS}) linked after -lLLVMSystem.
Noticed by Ronald Pijnacker!
- Some parts of the System library must be build with exceptions on windows.
Based on a patch by Jay Foad!
llvm-svn: 83251
2009-10-02 19:36:31 +00:00
3b008a3a65
Fix a use-after-free in post-ra-scheduling.
...
MI->addOperand invalidates references to it's operands, avoid touching
the operand after a new one was added.
llvm-svn: 83249
2009-10-02 15:59:52 +00:00
32a47ea7b6
getFunctionAlignment should return log2 alignment.
...
llvm-svn: 83242
2009-10-02 06:57:25 +00:00
b659dff4eb
Forgot about ARM::tPUSH. It also has a new writeback operand.
...
llvm-svn: 83237
2009-10-02 05:03:07 +00:00
2dcee28a61
Move load / store multiple before post-alloc scheduling.
...
llvm-svn: 83236
2009-10-02 04:57:15 +00:00
d725159d9d
All callee-saved registers are live-out of a return block.
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llvm-svn: 83223
2009-10-01 23:28:47 +00:00
1cc6dd97da
Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.
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llvm-svn: 83218
2009-10-01 22:19:57 +00:00
70cb67fcf4
Expand api out in the usual inserter way, though, I do have a
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question, can we get rid of the BasicBlock versions of all inserters
and use Head == 0 to indicate the old case when GetInsertBlock == 0?
llvm-svn: 83216
2009-10-01 22:08:58 +00:00
9a051a5922
Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.
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llvm-svn: 83215
2009-10-01 21:46:35 +00:00
6f012d83f2
ARM::tPOP and tPOP_RET each has an extra writeback operand now.
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llvm-svn: 83214
2009-10-01 20:54:53 +00:00
75cc16c0f2
Add support to extract lexical scope information from DebugLoc attached with an machine instruction.
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This is not yet enabled.
llvm-svn: 83210
2009-10-01 20:31:14 +00:00
be3039e776
Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup.
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llvm-svn: 83208
2009-10-01 19:45:32 +00:00
787f94c28d
Record first and last instruction of a scope in DbgScope.
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llvm-svn: 83207
2009-10-01 18:25:23 +00:00
4fb2891396
Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change
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operands of instructions with these properties while breaking anti-dep.
llvm-svn: 83198
2009-10-01 08:26:23 +00:00
1b2b64f618
Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple,
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ld / st pairs, etc.
llvm-svn: 83197
2009-10-01 08:22:27 +00:00
d846fbf20d
Remove GVNPRE.cpp from the CMake makefile
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llvm-svn: 83194
2009-10-01 05:30:05 +00:00
5f3cc06cd2
remove the GVNPRE pass. It has been subsumed by the GVN pass.
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Ok'd by Owen.
llvm-svn: 83193
2009-10-01 02:18:36 +00:00
4bcd523acb
Update ARM JIT emitter to account for ld/st multiple changes.
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llvm-svn: 83192
2009-10-01 01:39:21 +00:00
3bbc6c3ae6
Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions.
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llvm-svn: 83191
2009-10-01 01:33:39 +00:00
34986f12e6
Add another MDNode into DebugLocTuple. This will be used to keep track of inlined functions.
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llvm-svn: 83190
2009-10-01 01:15:28 +00:00
4dbca6dfd4
If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.
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llvm-svn: 83189
2009-10-01 01:03:26 +00:00
e0709cfc92
Use MachineInstr as an processDebugLoc() argument.
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This will allow processDebugLoc() to handle scopes for DWARF debug info.
llvm-svn: 83183
2009-09-30 23:12:50 +00:00
3256c751f5
Use MDNode * directly as an RecordSourceLine() argument.
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llvm-svn: 83182
2009-09-30 22:51:28 +00:00
5c13c2d392
Remove dead code.
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llvm-svn: 83181
2009-09-30 22:43:52 +00:00
a49be76f43
Add isFOO() helpers. Fix getDirectory() and getFilename() for DIScope.
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llvm-svn: 83180
2009-09-30 22:34:41 +00:00
b2120755a2
Use OutStreamer.SwitchSection instead of writing out textual section directives.
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Add a new TargetLoweringObjectFileMachO::getConstTextCoalSection method to
get access to that section.
llvm-svn: 83178
2009-09-30 22:25:37 +00:00
b633d7a665
Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use this
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to emit target-specific things at the beginning of the asm output. This
fixes a problem for PPC, where the text sections are not being kept together
as expected. The base class doInitialization code calls DW->BeginModule()
which emits a bunch of DWARF section directives. The PPC doInitialization
code then emits all the TEXT section directives, with the intention that they
will be kept together. But as I understand it, the Darwin assembler treats
the default TEXT section as a special case and moves it to the beginning of
the file, which means that all those DWARF sections are in the middle of
the text. With this change, the EmitStartOfAsmFile hook is called before
the DWARF section directives are emitted, so that all the PPC text section
directives come out right at the beginning of the file.
llvm-svn: 83176
2009-09-30 22:06:26 +00:00
64c8d5a004
Fix a comment typo.
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llvm-svn: 83174
2009-09-30 21:44:42 +00:00
Jim Grosbach