Commit Graph

66170 Commits

Author SHA1 Message Date
Owen Anderson fbdeab911a Tests for NEON encoding of vmovl, vmovn, vqmovn, and vqmovun.
llvm-svn: 117469
2010-10-27 18:17:12 +00:00
Devang Patel d4efc4d26f Give a name to nameless argument.
llvm-svn: 117468
2010-10-27 18:08:31 +00:00
Owen Anderson 5fa98baef7 Tests for NEON encoding of vcls, vclz, and vcnt.
llvm-svn: 117466
2010-10-27 18:05:25 +00:00
Owen Anderson 6b5af599c0 Tests for NEON encoding of vneg and vqneg.
llvm-svn: 117463
2010-10-27 17:57:26 +00:00
Rafael Espindola 26496e6835 Produce an error for an invalid use of .symver.
llvm-svn: 117462
2010-10-27 17:56:18 +00:00
Jim Grosbach ba1c6cd62f The new LDR* instruction patterns should handle the necessary encoding of
operands in the TableGen'erated bits, so we don't need to do the additional
magic explicitly.

llvm-svn: 117461
2010-10-27 17:52:51 +00:00
Owen Anderson 1e5eb98ed8 Tests for NEON encoding of vabs and vqabs.
llvm-svn: 117460
2010-10-27 17:50:07 +00:00
Owen Anderson 8576a42cf3 Add correct NEON encodings for vsli and vsri.
llvm-svn: 117459
2010-10-27 17:40:08 +00:00
Owen Anderson d7e8135e1e Add correct NEON encodings for vsra and vrsra.
llvm-svn: 117458
2010-10-27 17:29:29 +00:00
Jim Grosbach 8bf1483a3d The immediate operands of an LDRi12 instruction doesn't need the addrmode2
encoding tricks. Handle the 'imm doesn't fit in the insn' case.

llvm-svn: 117454
2010-10-27 16:50:31 +00:00
Jim Grosbach e4992c88a4 Formatting.
llvm-svn: 117453
2010-10-27 16:30:18 +00:00
Rafael Espindola cc1b168ef6 Symbols defined as the difference of other two end up in the ABS section.
llvm-svn: 117451
2010-10-27 16:04:30 +00:00
Rafael Espindola eb0c2c170d Add support for the .symver directive. This is really ugly, but most of it is
contained in the ELF object writer.

llvm-svn: 117448
2010-10-27 15:18:17 +00:00
Rafael Espindola a5efd6a27c Move more logic to isInSymtab and simplify.
llvm-svn: 117447
2010-10-27 14:44:52 +00:00
Mikhail Glushenkov 258b8e1dc8 80-col violation.
llvm-svn: 117443
2010-10-27 09:09:10 +00:00
Mikhail Glushenkov 32acd741d2 Remove try/catch(...) from Win32/Signals.inc.
catch(...) is used in Win32/Signals.inc for catching Win32 structured
exceptions, but according to [1], this is wrong.

We can't simply change try/catch to __try/__finally, since this syntax is not
supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1
macros on MinGW [2], but I think that that solution obfuscates the code too
much.

The use of try/catch(...) in Signals.inc makes it impossible to link
MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we
just remove try/catch(...) from Signals.inc, since the meaning of the code won't
change.

[1] http://members.cox.net/doug_web/eh.htm
[2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315

llvm-svn: 117442
2010-10-27 09:09:04 +00:00
Mikhail Glushenkov 083981170f It is confusing to call a random-access iterator 'InputIterator'.
llvm-svn: 117441
2010-10-27 07:39:54 +00:00
Mikhail Glushenkov b809748595 Trailing whitespace.
llvm-svn: 117440
2010-10-27 07:39:48 +00:00
Kevin Enderby 9ad2166899 Yet another tweak to X86 instructions to add ud2a as an alias to ud2
(still to add ud2b).

llvm-svn: 117435
2010-10-27 03:01:02 +00:00
Kevin Enderby 20b021c970 Another tweak to X86 instructions to add the missing flex instruction (without
the wait prefix).

llvm-svn: 117434
2010-10-27 02:53:04 +00:00
Kevin Enderby a1917c7555 Tweaks to X86 instructions to allow the 'w' suffix in places it makes
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler
allows for these instructions.  Done differently than in r117031 that
caused a valgrind error which was later reverted.

llvm-svn: 117433
2010-10-27 02:32:19 +00:00
Jim Grosbach 9d2d1f0f00 LDRi12 machine instructions handle negative offset operands normally (simple
integer values), not with the addrmode2 encoding.

llvm-svn: 117429
2010-10-27 01:19:41 +00:00
Bill Wendling 6bbe0912c3 Random cleanups and format changes.
llvm-svn: 117428
2010-10-27 01:07:41 +00:00
Kevin Enderby ba985d9dd5 Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc
will accept versions that the darwin assembler allows.  Forms ending in "pi" and
forms without all the operands.

llvm-svn: 117427
2010-10-27 00:59:28 +00:00
Jakob Stoklund Olesen 79e1407c11 Handle critical loop predecessors by making both inside and outside registers
live out.

This doesn't prevent us from inserting a loop preheader later on, if that is
better.

llvm-svn: 117424
2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen 795ed98180 Compute critical loop predecessors in the same way as critical loop exits.
Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.

llvm-svn: 117423
2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen 0e7a011a00 Physical registers trivially have multiple connected components all the time.
Only virtuals should be requires to be connected.

llvm-svn: 117422
2010-10-27 00:39:01 +00:00
Jim Grosbach 2577b2e8b1 One more spot where the new arm mode LDR instruction representation
doesn't need the additional addrmode2 register operand. Missed it the first
time around.

llvm-svn: 117421
2010-10-27 00:38:16 +00:00
Wesley Peck e9b429e96f Adding disassembler to the MicroBlaze backend.
llvm-svn: 117420
2010-10-27 00:23:01 +00:00
Jim Grosbach 5a7c715470 Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
rdar://8477752.

llvm-svn: 117419
2010-10-27 00:19:44 +00:00
Jim Grosbach a92801b695 Since I parameterized this bit, I should probably actually use said parameter.
llvm-svn: 117418
2010-10-26 23:58:04 +00:00
Dan Gohman 5faac39061 Enable clang autocompletion by default.
llvm-svn: 117415
2010-10-26 23:24:54 +00:00
Dale Johannesen e660f4d072 Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.

llvm-svn: 117413
2010-10-26 23:11:10 +00:00
Andrew Trick 5f88cc34e1 Remove the vector of live vregs. I thought we would need to track
them, but hopefully we won't. And this is not the right data structure
to do it anyway.

llvm-svn: 117412
2010-10-26 22:58:24 +00:00
Owen Anderson 825b2d1946 Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun.
llvm-svn: 117411
2010-10-26 22:50:46 +00:00
Jim Grosbach 1e4d9a17c2 First part of refactoring ARM addrmode2 (load/store) instructions to be more
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

llvm-svn: 117409
2010-10-26 22:37:02 +00:00
Jakob Stoklund Olesen e4f3317cda After splitting, compute connected components of all new registers, not just for
the remainder register.

Example:

bb0:
  x = 1
bb1:
  use(x)
  ...
  x = 2
  jump bb1

When x is isolated in bb1, the inner part breaks into two components, x1 and x2:

bb0:
  x0 = 1
bb1:
  x1 = x0
  use(x1)
  ...
  x2 = 2
  x0 = x2
  jump bb1

llvm-svn: 117408
2010-10-26 22:36:09 +00:00
Jakob Stoklund Olesen 260fa289df Verify that live intervals are connected. If there are multiple connected
components, each should get its own virtual register.

llvm-svn: 117407
2010-10-26 22:36:07 +00:00
Jakob Stoklund Olesen 022e7795cf Call RenumberValues for all new registers created during splitting. This is
necessary to get correct hasPHIKill flags.

llvm-svn: 117406
2010-10-26 22:36:05 +00:00
Jakob Stoklund Olesen 4453324e5b Preserve PHIDef bits in cloned values during splitting.
llvm-svn: 117405
2010-10-26 22:36:02 +00:00
Devang Patel 05561e8b7b Assign source ordering to nodes created for StoreInst.
llvm-svn: 117404
2010-10-26 22:14:52 +00:00
Owen Anderson 2888e2c7f9 Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.
llvm-svn: 117402
2010-10-26 21:58:41 +00:00
Jim Grosbach 3fe94f1e9f FileCheck'ize
llvm-svn: 117401
2010-10-26 21:26:47 +00:00
Owen Anderson c4126a1a2c Add tests for NEON encoding of vshll.
llvm-svn: 117399
2010-10-26 21:21:47 +00:00
Owen Anderson e18579976f Simplify classes for shift instructions, which are never commutable.
llvm-svn: 117398
2010-10-26 21:13:59 +00:00
Owen Anderson 0fbb20769f Tests for NEON encoding of vshr.
llvm-svn: 117396
2010-10-26 21:08:42 +00:00
Owen Anderson 3665fee8de Provide correct NEON encodings for vshl, register and immediate forms.
llvm-svn: 117394
2010-10-26 20:56:57 +00:00
Jakob Stoklund Olesen b7050233fb Teach MachineBasicBlock::print() to annotate instructions and blocks with
SlotIndexes when available.

llvm-svn: 117392
2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen db594373bd Remmeber to print full live interval on verification error.
llvm-svn: 117391
2010-10-26 20:21:43 +00:00
Rafael Espindola c9fb35e73b Add support for .ident.
llvm-svn: 117389
2010-10-26 19:35:47 +00:00