Commit Graph

86052 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes 049f4ffab1 Move non-temporal movs to their own section
llvm-svn: 107168
2010-06-29 17:42:37 +00:00
Bob Wilson ab0819e10d Add support for encoding NEON VMOV (from core register to scalar) instructions.
The encoding is the same as VMOV (from scalar to core register) except that
the operands are in different places.

llvm-svn: 107167
2010-06-29 17:34:07 +00:00
Bruno Cardoso Lopes 21a9433e9e Add sqrt, rsqrt and rcp AVX instructions
llvm-svn: 107166
2010-06-29 17:26:30 +00:00
Douglas Gregor 56980d688b With packed enums, an enumerator's value may be stored in more bits
than the enumeration type itself takes. Fixes PR7477.

llvm-svn: 107163
2010-06-29 17:12:35 +00:00
Jim Grosbach 5bee07ec68 skip dbg_value instructions
llvm-svn: 107154
2010-06-29 16:55:24 +00:00
Daniel Dunbar 8452ef0798 tests: Use %clangxx when using driver for C++, in case C++ support is disabled.
llvm-svn: 107153
2010-06-29 16:52:24 +00:00
Daniel Dunbar ec1bee907a tests: Spell %clang_cc1 correctly.
llvm-svn: 107152
2010-06-29 16:52:18 +00:00
Chris Lattner e70a007b36 minor cleanups.
llvm-svn: 107150
2010-06-29 16:40:28 +00:00
Daniel Dunbar 00d3d8e902 Driver/Darwin: Only run dsymutil when we are also compiling/assembling as part
of the compilation.
 - <rdar://problem/8141387> clang is always invoking dsymutil

llvm-svn: 107149
2010-06-29 16:38:33 +00:00
Gabor Greif e31bba37f3 minor cosmetics
llvm-svn: 107148
2010-06-29 16:27:38 +00:00
Bob Wilson 83b993a977 The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to add
a CPSR operand to them causes an assertion failure, so apparently these
instructions haven't been getting a lot of use.

llvm-svn: 107147
2010-06-29 16:25:11 +00:00
Gabor Greif 6964ab16f6 use ArgOffset constant to prepare for operand rotation
llvm-svn: 107146
2010-06-29 16:21:20 +00:00
Gabor Greif eab748d409 use ArgOperand API
llvm-svn: 107145
2010-06-29 16:17:26 +00:00
Gabor Greif a28615ce31 use ArgOperand API
llvm-svn: 107144
2010-06-29 16:01:30 +00:00
Jeffrey Yasskin bb219e01a6 Delete assert in ComputeKeyFunction. The function runs fine without it, since
there's an explicit guard on isPolymorphic, and virtual bases don't affect the
key function calculation.  This allows people to call
ASTContext::getKeyFunction on arbitrary classes.

llvm-svn: 107143
2010-06-29 15:27:35 +00:00
Duncan Sands 17f1ca8793 Return Changed. This required setting Changed if dbg metadata
is stripped off.  Currently set unconditionally, since the API
does not provide a way of working out if anything was actually
stripped off.

llvm-svn: 107142
2010-06-29 14:52:10 +00:00
Duncan Sands 83d1dd637a It seems clear that this should return Changed.
llvm-svn: 107141
2010-06-29 14:49:35 +00:00
Rafael Espindola 38a7d7cbc3 Add a VT argument to getMinimalPhysRegClass and replace the copy related uses
of getPhysicalRegisterRegClass with it.

If we want to make a copy (or estimate its cost), it is better to use the
smallest class as more efficient operations might be possible.

llvm-svn: 107140
2010-06-29 14:02:34 +00:00
Duncan Sands d34bb4e9b0 getMachineBasicBlockAddress returns a uintptr_t - don't truncate
to unsigned only to extend back to a pointer sized value on the
next line.

llvm-svn: 107139
2010-06-29 13:34:20 +00:00
Duncan Sands a85a90773c The variable ValueSize is set to 1 on both code paths, and then
ignored!  Remove it.

llvm-svn: 107138
2010-06-29 13:30:08 +00:00
Duncan Sands 1245e4c07d The variable "Value" is carefully set to Layout.getSymbolAddress,
but then not actually used - maybe a bug?  Remove the variable.

llvm-svn: 107137
2010-06-29 13:26:33 +00:00
Duncan Sands 5667a08468 Remove unused calls to Lexer.getLoc and the pointless variable HasFillExpr.
llvm-svn: 107136
2010-06-29 13:24:40 +00:00
Duncan Sands 193bb1ee6a Remove pointless variable LastDef.
llvm-svn: 107135
2010-06-29 13:23:22 +00:00
Duncan Sands dddf876e96 Looks like this test is missing an XFAIL line.
llvm-svn: 107134
2010-06-29 13:18:50 +00:00
Duncan Sands 257eba4df7 Remove unused variable Loc and pointless variables unified_syntax
and thumb_mode.

llvm-svn: 107133
2010-06-29 13:04:35 +00:00
Gabor Greif e73d64c2cf use ArgOperand APIs
llvm-svn: 107132
2010-06-29 13:03:46 +00:00
Duncan Sands 78ad27ca2b Remove an unused and a pointless variable.
llvm-svn: 107131
2010-06-29 13:00:29 +00:00
Duncan Sands 67bfa9d109 Remove pointless and unused variables.
llvm-svn: 107130
2010-06-29 12:48:49 +00:00
Gabor Greif eec74583ca encode operand initializations (at fixed index)
in terms of Op<> and ArgOffset. This works for
values of {0, 1} for ArgOffset.
Please note that ArgOffset will become 0 soon and
will go away eventually.

llvm-svn: 107129
2010-06-29 11:41:38 +00:00
Duncan Sands 67aa21d7b5 Remove a pointless variable.
llvm-svn: 107128
2010-06-29 11:39:45 +00:00
Duncan Sands 6d28e73acc Remove initialized but otherwise unused variables.
llvm-svn: 107127
2010-06-29 11:22:26 +00:00
Duncan Sands b69a3e27df Remove variables that are written by not read.
llvm-svn: 107126
2010-06-29 11:07:47 +00:00
Benjamin Kramer 80b7bc042a Use a more obvious way to avoid compiling functions which are only used when XDEBUG is enabled.
llvm-svn: 107125
2010-06-29 10:03:11 +00:00
Chandler Carruth b1adb88d05 Jump through some silly hoops to make GCC accept that a function may not always
be called.

llvm-svn: 107124
2010-06-29 06:46:00 +00:00
Chris Lattner 22a931e3bb Change X86_64ABIInfo to have ASTContext and TargetData ivars to
avoid passing ASTContext down through all the methods it has.

When classifying an argument, or argument piece, as INTEGER, check
to see if we have a pointer at exactly the same offset in the 
preferred type.  If so, use that pointer type instead of i64.  This
allows us to compile A function taking a stringref into something
like this:

define i8* @foo(i64 %D.coerce0, i8* %D.coerce1) nounwind ssp {
entry:
  %D = alloca %struct.DeclGroup, align 8          ; <%struct.DeclGroup*> [#uses=4]
  %0 = getelementptr %struct.DeclGroup* %D, i32 0, i32 0 ; <i64*> [#uses=1]
  store i64 %D.coerce0, i64* %0
  %1 = getelementptr %struct.DeclGroup* %D, i32 0, i32 1 ; <i8**> [#uses=1]
  store i8* %D.coerce1, i8** %1
  %tmp = getelementptr inbounds %struct.DeclGroup* %D, i32 0, i32 0 ; <i64*> [#uses=1]
  %tmp1 = load i64* %tmp                          ; <i64> [#uses=1]
  %tmp2 = getelementptr inbounds %struct.DeclGroup* %D, i32 0, i32 1 ; <i8**> [#uses=1]
  %tmp3 = load i8** %tmp2                         ; <i8*> [#uses=1]
  %add.ptr = getelementptr inbounds i8* %tmp3, i64 %tmp1 ; <i8*> [#uses=1]
  ret i8* %add.ptr
}

instead of this:

define i8* @foo(i64 %D.coerce0, i64 %D.coerce1) nounwind ssp {
entry:
  %D = alloca %struct.DeclGroup, align 8          ; <%struct.DeclGroup*> [#uses=3]
  %0 = insertvalue %0 undef, i64 %D.coerce0, 0    ; <%0> [#uses=1]
  %1 = insertvalue %0 %0, i64 %D.coerce1, 1       ; <%0> [#uses=1]
  %2 = bitcast %struct.DeclGroup* %D to %0*       ; <%0*> [#uses=1]
  store %0 %1, %0* %2, align 1
  %tmp = getelementptr inbounds %struct.DeclGroup* %D, i32 0, i32 0 ; <i64*> [#uses=1]
  %tmp1 = load i64* %tmp                          ; <i64> [#uses=1]
  %tmp2 = getelementptr inbounds %struct.DeclGroup* %D, i32 0, i32 1 ; <i8**> [#uses=1]
  %tmp3 = load i8** %tmp2                         ; <i8*> [#uses=1]
  %add.ptr = getelementptr inbounds i8* %tmp3, i64 %tmp1 ; <i8*> [#uses=1]
  ret i8* %add.ptr
}

This implements rdar://7375902 - [codegen quality] clang x86-64 ABI lowering code punishing StringRef

llvm-svn: 107123
2010-06-29 06:01:59 +00:00
Evan Cheng b59dd8f10a PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas.
llvm-svn: 107122
2010-06-29 05:38:36 +00:00
Evan Cheng 0c30739cbb Change if-cvt options to something that actually as useable.
llvm-svn: 107121
2010-06-29 05:37:59 +00:00
Chris Lattner de310d5d95 Minix doesn't support dylibs, PR7294
llvm-svn: 107120
2010-06-29 05:05:09 +00:00
Jim Grosbach 907673c48d When processing loops for scheduling latencies (used for live outs on loop
back-edges), make sure not to include dbg_value instructions in the count.
Closing in on the end of rdar://7797940

llvm-svn: 107119
2010-06-29 04:48:13 +00:00
Greg Clayton d0c8a0f031 A little code cleanup to not create an script bridging object just to feed
the private object back to another internal function.

llvm-svn: 107118
2010-06-29 01:42:03 +00:00
Dan Gohman 90db61d638 Just as its not safe to blindly transfer the nsw bit from an add
instruction to an add scev, it's not safe to blindly transfer the
inbounds flag from a gep instruction to an nsw on the scev for the
gep.

llvm-svn: 107117
2010-06-29 01:41:41 +00:00
Bruno Cardoso Lopes de736a6494 Refactoring of arithmetic instruction classes with unary operator
llvm-svn: 107116
2010-06-29 01:33:09 +00:00
Chris Lattner 399d22ac1b plumb preferred types down into X86_64ABIInfo::classifyArgumentType,
no functionality change.

llvm-svn: 107115
2010-06-29 01:14:09 +00:00
Jakob Stoklund Olesen c1eccbc468 When no memoperands are present, assume unaligned, volatile.
llvm-svn: 107114
2010-06-29 01:13:07 +00:00
Bill Wendling 9a925bec36 Strip resulting binaries.
llvm-svn: 107112
2010-06-29 01:08:57 +00:00
Chris Lattner 1d7c9f7f4b Pass the LLVM IR version of argument types down into computeInfo.
This is somewhat annoying to do this at this level, but it avoids
having ABIInfo know depend on CodeGenTypes for a hint.

Nothing is using this yet, so no functionality change.

llvm-svn: 107111
2010-06-29 01:08:48 +00:00
Bob Wilson 1e5da550e5 Reapply my if-conversion cleanup from svn r106939 with fixes.
There are 2 changes relative to the previous version of the patch:

1) For the "simple" if-conversion case, there's no need to worry about
RemoveExtraEdges not handling an unanalyzable branch.  Predicated terminators
are ignored in this context, so RemoveExtraEdges does the right thing.
This might break someday if we ever treat indirect branches (BRIND) as
predicable, but for now, I just removed this part of the patch, because
in the case where we do not add an unconditional branch, we rely on keeping
the fall-through edge to CvtBBI (which is empty after this transformation).

The change relative to the previous patch is:

@@ -1036,10 +1036,6 @@
     IterIfcvt = false;
   }
 
-  // RemoveExtraEdges won't work if the block has an unanalyzable branch,
-  // which is typically the case for IfConvertSimple, so explicitly remove
-  // CvtBBI as a successor.
-  BBI.BB->removeSuccessor(CvtBBI->BB);
   RemoveExtraEdges(BBI);
 
   // Update block info. BB can be iteratively if-converted.


2) My patch exposed a bug in the code for merging the tail of a "diamond",
which had previously never been exercised.  The code was simply checking that
the tail had a single predecessor, but there was a case in
MultiSource/Benchmarks/VersaBench/dbms where that single predecessor was
neither edge of the diamond.  I added the following change to check for
that:

@@ -1276,7 +1276,18 @@
   // tail, add a unconditional branch to it.
   if (TailBB) {
     BBInfo TailBBI = BBAnalysis[TailBB->getNumber()];
-    if (TailBB->pred_size() == 1 && !TailBBI.HasFallThrough) {
+    bool CanMergeTail = !TailBBI.HasFallThrough;
+    // There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
+    // check if there are any other predecessors besides those.
+    unsigned NumPreds = TailBB->pred_size();
+    if (NumPreds > 1)
+      CanMergeTail = false;
+    else if (NumPreds == 1 && CanMergeTail) {
+      MachineBasicBlock::pred_iterator PI = TailBB->pred_begin();
+      if (*PI != BBI1->BB && *PI != BBI2->BB)
+        CanMergeTail = false;
+    }
+    if (CanMergeTail) {
       MergeBlocks(BBI, TailBBI);
       TailBBI.IsDone = true;
     } else {

With these fixes, I was able to run all the SingleSource and MultiSource
tests successfully.

llvm-svn: 107110
2010-06-29 00:55:23 +00:00
Dan Gohman 0824affeff Add an Intraprocedural form of BasicAliasAnalysis, which aims to
properly handles instructions and arguments defined in different
functions, or across recursive function iterations.

llvm-svn: 107109
2010-06-29 00:50:39 +00:00
Bruno Cardoso Lopes d6a091a4d4 Described the missing AVX forms of SSE2 convert instructions
llvm-svn: 107108
2010-06-29 00:36:02 +00:00
Bob Wilson 3d12ff797b Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding is
the same as ARM except that the condition code field is always set to ARMCC::AL.

llvm-svn: 107107
2010-06-29 00:26:13 +00:00