Sander de Smalen
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50ded90072
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[AArch64][SVE] Asm: Support for gather LD1/LDFF1 (vector + imm) load instructions.
Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, javed.absar
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D46120
llvm-svn: 331145
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2018-04-29 17:33:38 +00:00 |
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Sander de Smalen
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74f9e6720b
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[AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector) load instructions.
Patch [2/3] in series to add support for SVE's gather load instructions
that use scalar+vector addressing modes:
- Patch [1/3]: https://reviews.llvm.org/D45951
- Patch [2/3]: https://reviews.llvm.org/D46023
- Patch [3/3]: https://reviews.llvm.org/D45958
Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, t.p.northover, echristo, evandro, javed.absar
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D46023
llvm-svn: 330928
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2018-04-26 08:19:53 +00:00 |
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Sander de Smalen
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30f9f11d51
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[AArch64][SVE] Asm: Support for contiguous LD1 (scalar+scalar) load instructions.
This is patch [4/4] in a series to add assembler/disassembler support for
SVE's contiguous LD1 (scalar+scalar) instructions:
- Patch [1/4]: https://reviews.llvm.org/D45687
- Patch [2/4]: https://reviews.llvm.org/D45688
- Patch [3/4]: https://reviews.llvm.org/D45689
- Patch [4/4]: https://reviews.llvm.org/D45690
Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D45690
llvm-svn: 330423
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2018-04-20 12:52:01 +00:00 |
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Sander de Smalen
|
5b12db5d23
|
[AArch64][SVE] Asm: Support for contiguous LD1 (scalar+imm) load instructions
Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro
Reviewed By: rengolin
Subscribers: tschuett, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D45618
llvm-svn: 330024
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2018-04-13 14:41:36 +00:00 |