Commit Graph

891 Commits

Author SHA1 Message Date
Alex Zinenko 168213f91c [mlir] Move data layout from LLVMDialect to module Op attributes
Legacy implementation of the LLVM dialect in MLIR contained an instance of
llvm::Module as it was required to parse LLVM IR types. The access to the data
layout of this module was exposed to the users for convenience, but in practice
this layout has always been the default one obtained by parsing an empty layout
description string. Current implementation of the dialect no longer relies on
wrapping LLVM IR types, but it kept an instance of DataLayout for
compatibility. This effectively forces a single data layout to be used across
all modules in a given MLIR context, which is not desirable. Remove DataLayout
from the LLVM dialect and attach it as a module attribute instead. Since MLIR
does not yet have support for data layouts, use the LLVM DataLayout in string
form with verification inside MLIR. Introduce the layout when converting a
module to the LLVM dialect and keep the default "" description for
compatibility.

This approach should be replaced with a proper MLIR-based data layout when it
becomes available, but provides an immediate solution to compiling modules with
different layouts, e.g. for GPUs.

This removes the need for LLVMDialectImpl, which is also removed.

Depends On D85650

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D85652
2020-08-17 15:12:36 +02:00
Mehdi Amini 25ee851746 Revert "Separate the Registration from Loading dialects in the Context"
This reverts commit 2056393387.

Build is broken on a few bots
2020-08-15 09:21:47 +00:00
Mehdi Amini 2056393387 Separate the Registration from Loading dialects in the Context
This changes the behavior of constructing MLIRContext to no longer load globally registered dialects on construction. Instead Dialects are only loaded explicitly on demand:
- the Parser is lazily loading Dialects in the context as it encounters them during parsing. This is the only purpose for registering dialects and not load them in the context.
- Passes are expected to declare the dialects they will create entity from (Operations, Attributes, or Types), and the PassManager is loading Dialects into the Context when starting a pipeline.

This changes simplifies the configuration of the registration: a compiler only need to load the dialect for the IR it will emit, and the optimizer is self-contained and load the required Dialects. For example in the Toy tutorial, the compiler only needs to load the Toy dialect in the Context, all the others (linalg, affine, std, LLVM, ...) are automatically loaded depending on the optimization pipeline enabled.

Differential Revision: https://reviews.llvm.org/D85622
2020-08-15 08:07:31 +00:00
Mehdi Amini ba92dadf05 Revert "Separate the Registration from Loading dialects in the Context"
This was landed by accident, will reland with the right comments
addressed from the reviews.
Also revert dependent build fixes.
2020-08-15 07:35:10 +00:00
Mehdi Amini ebf521e784 Separate the Registration from Loading dialects in the Context
This changes the behavior of constructing MLIRContext to no longer load globally registered dialects on construction. Instead Dialects are only loaded explicitly on demand:
- the Parser is lazily loading Dialects in the context as it encounters them during parsing. This is the only purpose for registering dialects and not load them in the context.
- Passes are expected to declare the dialects they will create entity from (Operations, Attributes, or Types), and the PassManager is loading Dialects into the Context when starting a pipeline.

This changes simplifies the configuration of the registration: a compiler only need to load the dialect for the IR it will emit, and the optimizer is self-contained and load the required Dialects. For example in the Toy tutorial, the compiler only needs to load the Toy dialect in the Context, all the others (linalg, affine, std, LLVM, ...) are automatically loaded depending on the optimization pipeline enabled.
2020-08-14 09:40:27 +00:00
Alex Zinenko 339eba0805 [mlir] do not emit bitcasts between structs in StandardToLLVM
The convresion of memref cast operaitons from the Standard dialect to the LLVM
dialect has been emitting bitcasts from a struct type to itself. Beyond being
useless, such casts are invalid as bitcast does not operate on aggregate types.
This kept working by accident because LLVM IR bitcast construction API skips
the construction if types are equal before it verifies that the types are
acceptable in a bitcast. Do not emit such bitcasts, the memref cast that only
adds/erases size information is in fact a noop on the current descriptor as it
always contains dynamic values for all sizes.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D85899
2020-08-14 11:33:10 +02:00
River Riddle 65277126bf [mlir][Type] Remove the remaining usages of Type::getKind in preparation for its removal
This revision removes all of the lingering usages of Type::getKind. A consequence of this is that FloatType is now split into 4 derived types that represent each of the possible float types(BFloat16Type, Float16Type, Float32Type, and Float64Type). Other than this split, this revision is NFC.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D85566
2020-08-12 19:33:58 -07:00
George Mitenkov 2ad7e1a301 [MLIR][SPIRVToLLVM] Conversion for global and addressof
Inital conversion of `spv._address_of` and `spv.globalVariable`.
In SPIR-V, the global returns a pointer, whereas in LLVM dialect
the global holds an actual value. This difference is handled by
`spv._address_of` and `llvm.mlir.addressof`ops that both return
a pointer. Moreover, only current invocation is in conversion's
scope.

Reviewed By: antiagainst, mravishankar

Differential Revision: https://reviews.llvm.org/D84626
2020-08-12 09:41:14 +03:00
Thomas Raoux 0de60b550b [mlir] Fix mlir build break due to warning when NDEBUG is not set 2020-08-10 15:35:02 -07:00
Christian Sigg 2c48e3629c [MLIR] Adding gpu.host_register op and lower it to a runtime call.
Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D85631
2020-08-10 22:46:17 +02:00
Christian Sigg 0d4b7adb82 [MLIR] Make gpu.launch_func rewrite pattern part of the LLVM lowering pass.
Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D85073
2020-08-10 19:28:30 +02:00
Thomas Raoux 68330ee0a9 [mlir][vector] Relax transfer_read/transfer_write restriction on memref operand
Relax the verifier for transfer_read/transfer_write operation so that it can
take a memref with a different element type than the vector being read/written.

This is based on the discourse discussion:
https://llvm.discourse.group/t/memref-cast/1514

Differential Revision: https://reviews.llvm.org/D85244
2020-08-10 08:57:48 -07:00
Konrad Dobros 9414a71aaa [mlir][spirv] Add correct handling of Kernel and Addresses capabilities
This change adds initial support needed to generate OpenCL compliant SPIRV.
If Kernel capability is declared then memory model becomes OpenCL.
If Addresses capability is declared then addressing model becomes Physical64.
Additionally for Kernel capability interface variable ABI attributes are not
generated as entry point function is expected to have normal arguments.

Differential Revision: https://reviews.llvm.org/D85196
2020-08-07 12:29:21 -07:00
aartbik c3c95b9c80 [mlir] [VectorOps] Improve lowering of extract_strided_slice (and friends like shape_cast)
Using a shuffle for the last recursive step in progressive lowering not only
results in much more compact IR, but also more efficient code (since the
backend is no longer confused on subvector aliasing for longer vectors).

E.g. the following

  %f = vector.shape_cast %v0: vector<1024xf32> to vector<32x32xf32>

yields much better x86-64 code that runs 3x faster than the original.

Reviewed By: bkramer, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D85482
2020-08-07 09:21:05 -07:00
Alex Zinenko 87a89e0f77 [mlir] Remove llvm::LLVMContext and llvm::Module from mlir::LLVMDialectImpl
Original modeling of LLVM IR types in the MLIR LLVM dialect had been wrapping
LLVM IR types and therefore required the LLVMContext in which they were created
to outlive them, which was solved by placing the LLVMContext inside the dialect
and thus having the lifetime of MLIRContext. This has led to numerous issues
caused by the lack of thread-safety of LLVMContext and the need to re-create
LLVM IR modules, obtained by translating from MLIR, in different LLVM contexts
to enable parallel compilation. Similarly, llvm::Module had been introduced to
keep track of identified structure types that could not be modeled properly.

A recent series of commits changed the modeling of LLVM IR types in the MLIR
LLVM dialect so that it no longer wraps LLVM IR types and has no dependence on
LLVMContext and changed the ownership model of the translated LLVM IR modules.
Remove LLVMContext and LLVM modules from the implementation of MLIR LLVM
dialect and clean up the remaining uses.

The only part of LLVM IR that remains necessary for the LLVM dialect is the
data layout. It should be moved from the dialect level to the module level and
replaced with an MLIR-based representation to remove the dependency of the
LLVMDialect on LLVM IR library.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85445
2020-08-07 14:30:31 +02:00
Alex Zinenko db1c197bf8 [mlir] take LLVMContext in MLIR-to-LLVM-IR translation
Due to the original type system implementation, LLVMDialect in MLIR contains an
LLVMContext in which the relevant objects (types, metadata) are created. When
an MLIR module using the LLVM dialect (and related intrinsic-based dialects
NVVM, ROCDL, AVX512) is converted to LLVM IR, it could only live in the
LLVMContext owned by the dialect. The type system no longer relies on the
LLVMContext, so this limitation can be removed. Instead, translation functions
now take a reference to an LLVMContext in which the LLVM IR module should be
constructed. The caller of the translation functions is responsible for
ensuring the same LLVMContext is not used concurrently as the translation no
longer uses a dialect-wide context lock.

As an additional bonus, this change removes the need to recreate the LLVM IR
module in a different LLVMContext through printing and parsing back, decreasing
the compilation overhead in JIT and GPU-kernel-to-blob passes.

Reviewed By: rriddle, mehdi_amini

Differential Revision: https://reviews.llvm.org/D85443
2020-08-07 14:22:30 +02:00
Christian Sigg 45676a8936 [MLIR] Change GpuLaunchFuncToGpuRuntimeCallsPass to wrap a RewritePattern with the same functionality.
The RewritePattern will become one of several, and will be part of the LLVM conversion pass (instead of a separate pass following LLVM conversion).

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D84946
2020-08-06 11:55:46 +02:00
Alexander Belyaev 3effc35015 [mlir] Lower DimOp to LLVM for unranked memrefs.
Differential Revision: https://reviews.llvm.org/D85361
2020-08-06 11:46:11 +02:00
Alex Zinenko 5446ec8507 [mlir] take MLIRContext instead of LLVMDialect in getters of LLVMType's
Historical modeling of the LLVM dialect types had been wrapping LLVM IR types
and therefore needed access to the instance of LLVMContext stored in the
LLVMDialect. The new modeling does not rely on that and only needs the
MLIRContext that is used for uniquing, similarly to other MLIR types. Change
LLVMType::get<Kind>Ty functions to take `MLIRContext *` instead of
`LLVMDialect *` as first argument. This brings the code base closer to
completely removing the dependence on LLVMContext from the LLVMDialect,
together with additional support for thread-safety of its use.

Depends On D85371

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85372
2020-08-06 11:05:40 +02:00
Alex Zinenko d3a9807674 [mlir] Remove most uses of LLVMDialect::getModule
This prepares for the removal of llvm::Module and LLVMContext from the
mlir::LLVMDialect.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85371
2020-08-06 10:54:30 +02:00
aartbik 39379916a7 [mlir] [VectorOps] Add masked load/store operations to Vector dialect
The intrinsics were already supported and vector.transfer_read/write lowered
direclty into these operations. By providing them as individual ops, however,
clients can used them directly, and it opens up progressively lowering transfer
operations at higher levels (rather than direct lowering to LLVM IR as done now).

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D85357
2020-08-05 16:45:24 -07:00
Alex Zinenko b2ab375d1f [mlir] use the new stateful LLVM type translator by default
Previous type model in the LLVM dialect did not support identified structure
types properly and therefore could use stateless translations implemented as
free functions. The new model supports identified structs and must keep track
of the identified structure types present in the target context (LLVMContext or
MLIRContext) to avoid creating duplicate structs due to LLVM's type
auto-renaming. Expose the stateful type translation classes and use them during
translation, storing the state as part of ModuleTranslation.

Drop the test type translation mechanism that is no longer necessary and update
the tests to exercise type translation as part of the main translation flow.

Update the code in vector-to-LLVM dialect conversion that relied on stateless
translation to use the new class in a stateless manner.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85297
2020-08-06 00:36:33 +02:00
Lei Zhang 0d03b3901d [mlir][StandardToSPIRV] Use spv.UMod for index re-calculation
Per Vulkan's SPIR-V environment spec: "While the OpSRem and OpSMod
instructions are supported by the Vulkan environment, they require
non-negative values and thus do not enable additional functionality
beyond what OpUMod provides."

The `getOffsetForBitwidth` function is used for lowering std.load
and std.store, whose indices are of `index` type and cannot be
negative. So we should be okay to use spv.UMod directly here to
be exact. Also made the comment explicit about the assumption.

Differential Revision: https://reviews.llvm.org/D83714
2020-08-05 14:52:04 -04:00
Alexander Belyaev 9fdd0df949 [mlir][nfc] Rename `promoteMemRefDescriptors` to `promoteOperands`.
`promoteMemRefDescriptors` also converts types of every operand, not only
memref-typed ones. I think `promoteMemRefDescriptors` name does not imply that.

Differential Revision: https://reviews.llvm.org/D85325
2020-08-05 20:24:48 +02:00
Uday Bondhugula 1d75f004ab [MLIR][NFC] Fix clang-tidy warnings in std to llvm conversion
Fix clang-tidy warnings in std to llvm conversion.
2020-08-05 22:12:05 +05:30
Alexander Belyaev bc7456fd8a [mlir] Fix rank bitwidth in UnrankedMemRefType conversion.
Differential Revision: https://reviews.llvm.org/D85300
2020-08-05 18:35:23 +02:00
Arpith C. Jacob fab4b59961 [mlir] Conversion of ViewOp with memory space to LLVM.
Handle the case where the ViewOp takes in a memref that has
an memory space.

Reviewed By: ftynse, bondhugula, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D85048
2020-08-05 12:19:52 +02:00
Alexander Belyaev a3d427d30c [mlir] Lower RankOp to LLVM for unranked memrefs.
Differential Revision: https://reviews.llvm.org/D85273
2020-08-05 12:13:43 +02:00
George Mitenkov e739648cfa [MLIR][SPIRVToLLVM] Conversion pattern for loop op
This patch introduces a conversion of `spv.loop` to LLVM dialect.
Similarly to `spv.selection`, op's control attributes are not mapped
to LLVM yet and therefore the conversion fails if the loop control is
not `None`. Also, all blocks within the loop should be reachable in
order for conversion to succeed.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D84245
2020-08-05 10:33:54 +03:00
aartbik e8dcf5f87d [mlir] [VectorOps] Add expand/compress operations to Vector dialect
Introduces the expand and compress operations to the Vector dialect
(important memory operations for sparse computations), together
with a first reference implementation that lowers to the LLVM IR
dialect to enable running on CPU (and other targets that support
the corresponding LLVM IR intrinsics).

Reviewed By: reidtatge

Differential Revision: https://reviews.llvm.org/D84888
2020-08-04 12:00:42 -07:00
Alex Zinenko ec1f4e7c3b [mlir] switch the modeling of LLVM types to use the new mechanism
A new first-party modeling for LLVM IR types in the LLVM dialect has been
developed in parallel to the existing modeling based on wrapping LLVM `Type *`
instances. It resolves the long-standing problem of modeling identified
structure types, including recursive structures, and enables future removal of
LLVMContext and related locking mechanisms from LLVMDialect.

This commit only switches the modeling by (a) renaming LLVMTypeNew to LLVMType,
(b) removing the old implementaiton of LLVMType, and (c) updating the tests. It
is intentionally minimal. Separate commits will remove the infrastructure built
for the transition and update API uses where appropriate.

Depends On D85020

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85021
2020-08-04 14:29:25 +02:00
Alexander Belyaev 8979a9cdf2 [mlir] Fix adding wrong operand value in `promoteMemRefDescriptors`.
The bug was not noticed because we didn't have a lot of custom type conversions
directly to LLVM dialect.

Differential Revision: https://reviews.llvm.org/D85192
2020-08-04 13:39:56 +02:00
Jakub Lichman 689096965d [mlir][Linalg] Conv ops lowering to std calls added.
Lowering of newly defined Conv ops in TC syntax to standard
dialect is not supported and therefore this commit adds support
for it.

Differential Revision: https://reviews.llvm.org/D84840
2020-08-04 07:12:58 +00:00
Frederik Gossen 11492be9d7 [MLIR][Shape] Lower `shape.broadcast` to `scf`
Differential Revision: https://reviews.llvm.org/D85027
2020-08-03 08:20:14 +00:00
Jakub Lichman eef1bfb2d2 [mlir][Linalg] Conv {1,2,3}D ops defined with TC syntax
Replaced definition of named ND ConvOps with tensor comprehension
syntax which reduces boilerplate code significantly. Furthermore,
new ops to support TF convolutions added (without strides and dilations).

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D84628
2020-07-31 13:20:17 +02:00
Thomas Raoux 59156bad03 [mlir][spirv] Add support for converting memref of vector to SPIR-V
This allow declaring buffers and alloc of vectors so that we can support vector
load/store.

Differential Revision: https://reviews.llvm.org/D84982
2020-07-30 15:05:40 -07:00
Alexander Belyaev 6b8c641d8e [mlir] NFC: Expose `getElementPtrType` and `getSizes` methods of AllocOpLowering.
Differential Revision: https://reviews.llvm.org/D84917
2020-07-30 20:18:29 +02:00
Stephan Herhut 85defd23aa [mlir][shape] Use memref of index in shape lowering
Now that we can have a memref of index type, we no longer need to materialize shapes in i64 and then index_cast.

Differential Revision: https://reviews.llvm.org/D84938
2020-07-30 15:12:43 +02:00
Christian Sigg 13a3d88666 [MLIR] Don't pass separate LowerToLLVMOptions when we already pass a LLVMTypeConverter which contains those options already.
This also prevents passing inconsistent options.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D84915
2020-07-30 14:55:23 +02:00
Frederik Gossen a97940d4e0 [MLIR][Shape] Limit `shape.rank` lowering to its extent tensor variant
When lowering to the standard dialect, we currently support only the extent
tensor variant of the shape.rank operation. This change lets the conversion
pattern fail in a well-defined manner.

Differential Revision: https://reviews.llvm.org/D84852
2020-07-30 11:43:08 +00:00
George Mitenkov 1880532036 [MLIR][SPIRVToLLVM] Conversion of GLSL ops to LLVM intrinsics
This patch introduces new intrinsics in LLVM dialect:
-  `llvm.intr.floor`
-  `llvm.intr.maxnum`
-  `llvm.intr.minnum`
-  `llvm.intr.smax`
-  `llvm.intr.smin`
These intrinsics correspond to SPIR-V ops from GLSL
extended instruction set (`spv.GLSL.Floor`, `spv.GLSL.FMax`,
`spv.GLSL.FMin`,  `spv.GLSL.SMax` and `spv.GLSL.SMin`
respectively). Also conversion patterns for them were added.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84661
2020-07-30 11:22:44 +03:00
George Mitenkov 3aab320557 [MLIR][SPIRVToLLVM] Conversion for inverse sqrt and tanh
This is a second patch on conversion of GLSL ops to LLVM dialect.
It introduces patterns to convert `spv.InverseSqrt` and `spv.Tanh`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84633
2020-07-30 10:50:48 +03:00
George Mitenkov 647e9a54c7 [MLIR][SPIRVToLLVM] Conversion patterns for GLSL ops
This is the first patch that adds support for GLSL extended
instruction set ops. These are direct conversions, apart from `spv.Tan`
that is lowered to `sin() / cos()`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84627
2020-07-30 10:20:11 +03:00
Frederik Gossen 5fc34fafa7 [MLIR][Shape] Limit shape to SCF lowering patterns to their supported types
Differential Revision: https://reviews.llvm.org/D84444
2020-07-29 14:54:09 +00:00
Jakub Lichman 1aaf8aa53d [mlir][Linalg] Conv1D, Conv2D and Conv3D added as named ops
This commit is part of a greater project which aims to add
full end-to-end support for convolutions inside mlir. The
reason behind having conv ops for each rank rather than
having one generic ConvOp is to enable better optimizations
for every N-D case which reflects memory layout of input/kernel
buffers better and simplifies code as well. We expect plain linalg.conv
to be progressively retired.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D83879
2020-07-29 16:39:56 +02:00
Frederik Gossen 6673c6cd82 [MLIR][Shape] Limit shape to standard lowerings to their supported types
The lowering does not support all types for its source operations. This change
makes the patterns fail in a well-defined manner.

Differential Revision: https://reviews.llvm.org/D84443
2020-07-29 13:56:52 +00:00
Alex Zinenko aec38c619d [mlir] LLVMType: make getUnderlyingType private
The current modeling of LLVM IR types in MLIR is based on the LLVMType class
that wraps a raw `llvm::Type *` and delegates uniquing, printing and parsing to
LLVM itself. This is model makes thread-safe type manipulation hard and is
being progressively replaced with a cleaner MLIR model that replicates the type
system. In the new model, LLVMType will no longer have an underlying LLVM IR
type. Restrict access to this type in the current model in preparation for the
change.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D84389
2020-07-29 13:43:38 +02:00
Frederik Gossen b6b9d3ea85 [MLIR][Shape] Remove type conversion from lowering to standard
Operating on indices and extent tensors directly, the type conversion is no
longer needed for the supported cases.

Differential Revision: https://reviews.llvm.org/D84442
2020-07-29 10:48:05 +00:00
Stephan Herhut 5d9f33aaa0 [MLIR][Shape] Add conversion for missing ops to standard
This adds conversions for const_size and to_extent_tensor. Also, cast-like operations are now folded away if the source and target types are the same.

Differential Revision: https://reviews.llvm.org/D84745
2020-07-29 12:46:18 +02:00
George Mitenkov 1f4aa30a4f [MLIR][SPIRVToLLVM] Branch weights support for BranchConditional conversion
Conversion of `spv.BranchConditional` now supports branch weights
that are mapped to weights vector in `llvm.cond_br`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84657
2020-07-29 10:11:10 +03:00
George Mitenkov b1e398920f [MLIR][SPIRVToLLVM] Support of volatile/nontemporal memory access in load/store
This patch adds support of Volatile and Nontemporal
memory accesses to `spv.Load` and `spv.Store`. These attributes are
modelled with a `volatile` and `nontemporal` flags.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84739
2020-07-29 08:45:40 +03:00
Frederik Gossen dfcc09890a [MLIR][Shape] Lower `shape.const_shape` to `tensor_from_elements`
Differential Revision: https://reviews.llvm.org/D82848
2020-07-28 15:40:55 +00:00
Christian Sigg c64c04bbaa Clean up cuda-runtime-wrappers API.
Do not return error code, instead return created resource handles or void. Error reporting is done by the library function.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D84660
2020-07-28 16:34:08 +02:00
lorenzo chelini 946be75b9e [MLIR][Linalg] Retire C++ DotOp in favor of a linalg-ods-gen'd op
- replace DotOp, now that DRR rules have been dropped.

- Capture arguments mismatch in the parser. The number of parsed arguments must
  equal the number of expected arguments.

Reviewed By: ftynse, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D82952
2020-07-28 12:34:19 +02:00
MaheshRavishankar fbe911ee75 [mlir][AffineToStandard] Make LowerAffine pass Op-agnostic.
The LowerAffine psas was a FunctionPass only for legacy
reasons. Making this Op-agnostic allows it to be used from command
line when affine expressions are within operations other than
`std.func`.

Differential Revision: https://reviews.llvm.org/D84590
2020-07-27 12:14:17 -07:00
George Mitenkov 8be0371eb7 [MLIR][SPIRVToLLVM] Conversion of load and store SPIR-V ops
This patch introduces conversion pattern for `spv.Store` and `spv.Load`.
Only op with `Function` Storage Class is supported at the moment
because `spv.GlobalVariable` has not been introduced yet. If the op
has memory access attribute, then there are the following cases.
If the access is `Aligned`, add alignment to the op builder. Otherwise
the conversion fails as other cases are not supported yet because they
require additional attributes for `llvm.store`/`llvm.load` ops: e.g.
`volatile` and `nontemporal`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D84236
2020-07-24 16:31:45 +03:00
George Mitenkov 5c98631391 [MLIR][SPIRVToLLVM] Conversion of SPIR-V variable op
The patch introduces the conversion pattern for function-level
`spv.Variable`. It is modelled as `llvm.alloca` op. If initialized, then
additional store instruction is used. Note that there is no initialization
for arrays and structs since constants of these types are not supported in
LLVM dialect yet. Also, at the moment initialisation is only possible via
`spv.constant` (since `spv.GlobalVariable` conversion is not implemented
yet).

The input code has some scoping is not taken into account and will be
addressed in a different patch.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D84224
2020-07-24 15:49:55 +03:00
Frederik Gossen bb442bb51a [MLIR][Shape] Remove deprecated and unused lowerings
This concerns `from/to_extent_tensor`, `size_to_index`, `index_to_size`, and
`const_size` conversion patterns. The new lowering will work directly on indices
and extent tensors. The shape and size values will allow for error values but
are not yet supported by the dialect conversion.

Differential Revision: https://reviews.llvm.org/D84436
2020-07-24 11:19:36 +00:00
Frederik Gossen 274db1d21a [MLIR][Shape] Pass Ops instead of Operations in shape lowering
Shorten builder invocations by using Ops directly instead of `op.getOperation`.

Differential Revision: https://reviews.llvm.org/D84430
2020-07-24 10:47:23 +00:00
Frederik Gossen 4baf18dba2 [MLIR][Shape] Clean up shape to standard lowering
Put only class declarations in anonymous namespaces.

Differential Revision: https://reviews.llvm.org/D84424
2020-07-24 08:55:50 +00:00
Frederik Gossen a85ca6be2a [MLIR][Shape] Simplify shape lowering
Differential Revision: https://reviews.llvm.org/D84161
2020-07-24 08:44:13 +00:00
Frederik Gossen d4e4d5d780 [MLIR][Shape] Allow for `shape_of` to return extent tensors
The operation `shape.shape_of` now returns an extent tensor `tensor<?xindex>` in
cases when no error are possible. All consuming operation will eventually accept
both, shapes and extent tensors.

Differential Revision: https://reviews.llvm.org/D84160
2020-07-24 08:40:40 +00:00
Frederik Gossen fb1e571687 [MLIR][Standard] Add default lowering for `assert`
The default lowering of `assert` calls `abort` in case the assertion is
violated. The failure message is ignored but should be used by custom lowerings
that can assume more about their environment.

Differential Revision: https://reviews.llvm.org/D83886
2020-07-24 08:31:12 +00:00
River Riddle 4589dd924d [mlir][DialectConversion] Enable deeper integration of type conversions
This revision adds support for much deeper type conversion integration into the conversion process, and enables auto-generating cast operations when necessary. Type conversions are now largely automatically managed by the conversion infra when using a ConversionPattern with a provided TypeConverter. This removes the need for patterns to do type cast wrapping themselves and moves the burden to the infra. This makes it much easier to perform partial lowerings when type conversions are involved, as any lingering type conversions will be automatically resolved/legalized by the conversion infra.

To support this new integration, a few changes have been made to the type materialization API on TypeConverter. Materialization has been split into three separate categories:
* Argument Materialization: This type of materialization is used when converting the type of block arguments when calling `convertRegionTypes`. This is useful for contextually inserting additional conversion operations when converting a block argument type, such as when converting the types of a function signature.
* Source Materialization: This type of materialization is used to convert a legal type of the converter into a non-legal type, generally a source type. This may be called when uses of a non-legal type persist after the conversion process has finished.
* Target Materialization: This type of materialization is used to convert a non-legal, or source, type into a legal, or target, type. This type of materialization is used when applying a pattern on an operation, but the types of the operands have not yet been converted.

Differential Revision: https://reviews.llvm.org/D82831
2020-07-23 19:40:31 -07:00
Kazuaki Ishizaki 06b90586a4 [mlir]: NFC: Fix trivial typo in documents and comments
Differential Revision: https://reviews.llvm.org/D84400
2020-07-23 23:40:57 +09:00
aartbik 1485fd295b [mlir] [VectorOps] Improve scatter/gather CPU performance
Replaced the linearized address with the proper LLVM way of
defining vector of base + indices in SIMD style. This yields
much better code. Some prototype results with microbencmarking
sparse matrix x vector with 50% sparsity (about 2-3x faster):

         LINEARIZED     IMPROVED
GFLOPS  sdot  saxpy     sdot saxpy
16x16    1.6   1.4       4.4  2.1
32x32    1.7   1.6       5.8  5.9
64x64    1.7   1.7       6.4  6.4
128x128  1.7   1.7       5.9  5.9
256x256  1.6   1.6       6.1  6.0
512x512  1.4   1.4       4.9  4.7

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D84368
2020-07-22 23:47:36 -07:00
aartbik 19dbb230a2 [mlir] [VectorOps] Add scatter/gather operations to Vector dialect
Introduces the scatter/gather operations to the Vector dialect
(important memory operations for sparse computations), together
with a first reference implementation that lowers to the LLVM IR
dialect to enable running on CPU (and other targets that support
the corresponding LLVM IR intrinsics).

The operations can be used directly where applicable, or can be used
during progressively lowering to bring other memory operations closer to
hardware ISA support for a gather/scatter. The semantics of the operation
closely correspond to those of the corresponding llvm intrinsics.

Note that the operation allows for a dynamic index vector (which is
important for sparse computations). However, this first reference
lowering implementation "serializes" the address computation when
base + index_vector is converted to a vector of pointers. Exploring
how to use SIMD properly during these step is TBD. More general
memrefs and idiomatic versions of striding are also TBD.

Reviewed By: arpith-jacob

Differential Revision: https://reviews.llvm.org/D84039
2020-07-21 10:57:40 -07:00
George Mitenkov 61dd481f11 [MLIR][LLVMDialect] SelectionOp conversion pattern
This patch introduces conversion pattern for `spv.selection` op.
The conversion can only be applied to selection with all blocks being
reachable. Moreover, selection with control attributes "Flatten" and
"DontFlatten" is not supported.
Since the `PatternRewriter` hook for block merging has not been implemented
for `ConversionPatternRewriter`, merge and continue blocks are kept
separately.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D83860
2020-07-21 17:11:46 +03:00
George Mitenkov 05d3160c9c [MLIR][SPIRVToLLVM] Conversion of SPIR-V branch ops
This patch introduces conversion for `spv.Branch` and `spv.BranchConditional`
ops. Branch weigths for `spv.BranchConditional` are not supported at the
moment, and conversion in this case fails.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83784
2020-07-21 10:52:20 +03:00
Nicolas Vasilache 47cbd9f922 [mlir][Vector] NFC - Improve VectorInterfaces
This revision improves and makes better use of OpInterfaces for the Vector dialect.

Differential Revision: https://reviews.llvm.org/D84053
2020-07-20 08:24:22 -04:00
Yash Jain 3382b7177f [MLIR] Add lowering for affine.parallel to scf.parallel
Add lowering conversion from affine.parallel to scf.parallel.

Differential Revision: https://reviews.llvm.org/D83239
2020-07-18 13:13:49 +05:30
Nicolas Vasilache cc0a58d7cd [mlir][Vector] Fix masking logic in VectorToSCF
Summary: The logic was conservative but inverted: cases that should remain unmasked became 1-D masked.

Differential Revision: https://reviews.llvm.org/D84051
2020-07-17 13:24:07 -04:00
Frederik Gossen aca7b8dd63 [MLIR][Shape] Lower `shape.shape_eq` to `scf`
Lower `shape.shape_eq` to the `scf` (and `std`) dialect. For now, this lowering
is limited to extent tensor operands.

Differential Revision: https://reviews.llvm.org/D82530
2020-07-16 14:44:29 +00:00
Frederik Gossen c430c21202 [MLIR][Shape] Use callback builder again
The issue that callback builders caused during rollback of conversion patterns
has been resolved. We can use them again.
See https://bugs.llvm.org/show_bug.cgi?id=46731

Differential Revision: https://reviews.llvm.org/D83932
2020-07-16 13:58:38 +00:00
Frederik Gossen 67391a7045 [MLIR] Lower `shape.reduce` to `scf.for` only when argument is `tensor<?xindex>`
To make it clear when shape error values cannot occur the shape operations can
operate on extent tensors. This change updates the lowering for `shape.reduce`
accordingly.

Differential Revision: https://reviews.llvm.org/D83944
2020-07-16 13:55:48 +00:00
Frederik Gossen ad49330032 [MLIR][Shape] Fix `shape_of` lowering to `scf`
The use of the `scf.for` callback builder does not allow for a rollback of the
emitted conversions. Instead, we populate the loop body through the conversion
rewriter directly.

Differential Revision: https://reviews.llvm.org/D83873
2020-07-15 15:38:09 +00:00
George Mitenkov d431951343 [MLIR][SPIRVToLLVM] SPIRV function fix and nits
This patch addresses the comments from https://reviews.llvm.org/D83030 and
https://reviews.llvm.org/D82639. `this->` is removed when not inside the
template. Also, type conversion for `spv.func` takes `convertRegionTypes()`
in order to apply type conversion on all blocks within the function.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D83786
2020-07-15 10:29:46 +03:00
Rahul Joshi e2b716105b [MLIR] Add argument related API to Region
- Arguments of the first block of a region are considered region arguments.
- Add API on Region class to deal with these arguments directly instead of
  using the front() block.
- Changed several instances of existing code that can use this API
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46535

Differential Revision: https://reviews.llvm.org/D83599
2020-07-14 09:28:29 -07:00
Nicolas Vasilache affbc0cd1c [mlir] Add alignment attribute to LLVM memory ops and use in vector.transfer
Summary: The native alignment may generally not be used when lowering a vector.transfer to the underlying load/store operation. This revision fixes the unmasked load/store alignment to match that of the masked path.

Differential Revision: https://reviews.llvm.org/D83684
2020-07-13 17:35:20 -04:00
Rahul Joshi 0d988da6d1 [MLIR] Change ODS collective params build method to provide an empty default value for named attributes
- Provide default value for `ArrayRef<NamedAttribute> attributes` parameter of
  the collective params build method.
- Change the `genSeparateArgParamBuilder` function to not generate build methods
  that may be ambiguous with the new collective params build method.
- This change should help eliminate passing empty NamedAttribue ArrayRef when the
  collective params build method is used
- Extend op-decl.td unit test to make sure the ambiguous build methods are not
  generated.

Differential Revision: https://reviews.llvm.org/D83517
2020-07-13 13:35:44 -07:00
Lei Zhang 4ba45a778a [mlir][StandardToSPIRV] Fix conversion for signed remainder
Per the Vulkan's SPIR-V environment spec, "for the OpSRem and OpSMod
instructions, if either operand is negative the result is undefined."
So we cannot directly use spv.SRem/spv.SMod if either operand can be
negative. Emulate it via spv.UMod.

Because the emulation uses spv.SNegate, this commit also defines
spv.SNegate.

Differential Revision: https://reviews.llvm.org/D83679
2020-07-13 16:15:31 -04:00
Benjamin Kramer 3bffe6022c [mlir][VectorOps] Lower vector.fma to llvm.fmuladd instead of llvm.fma
Summary:
These are semantically equivalent, but fmuladd allows decaying the op
into fmul+fadd if there is no fma instruction available. llvm.fma lowers
to scalar calls to libm fmaf, which is a lot slower.

Reviewers: nicolasvasilache, aartbik, ftynse

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D83666
2020-07-13 12:26:03 +02:00
Frederik Gossen 9df6afbb5c [MLIR][Shape] Lower `shape.any`
Lower `shape.any` to its first operand.

Differential Revision: https://reviews.llvm.org/D83123
2020-07-13 08:30:05 +00:00
Nicolas Vasilache ec2f2cec76 [mlir][Vector] Add folding for vector.transfer ops
This revision folds vector.transfer operations by updating the `masked` bool array attribute when more unmasked dimensions can be discovered.

Differential revision: https://reviews.llvm.org/D83586
2020-07-10 16:49:12 -04:00
George Mitenkov eb6b7c5d4f [MLIR][SPIRVToLLVM] Conversion of SPIR-V struct type without offset
This patch introduces type conversion for SPIR-V structs. Since
handling offset case requires thorough testing, it was left out
for now. Hence, only structs with no offset are currently
supported. Also, structs containing member decorations cannot
be translated.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83403
2020-07-10 10:15:45 +03:00
Jeremy Bruestle 2ede891875 [MLIR] IR changes to add yield semantics for affine.if and affine.parallel
Reviewed By: bondhugula, flaub

Differential Revision: https://reviews.llvm.org/D82600
2020-07-09 12:12:42 -07:00
George Mitenkov 28cd3cbc12 [MLIR][SPIRVToLLVM] Conversion of SPIR-V array, runtime array, and pointer types
This patch adds type conversion for 4 SPIR-V types: array, runtime array, pointer
and struct. This conversion is integrated using a separate function
`populateSPIRVToLLVMTypeConversion()` that adds new type conversions. At the moment,
this is a basic skeleton that allows to perfom conversion from SPIR-V array,
runtime array and pointer types to LLVM typesystem. There is no support of array
strides or storage classes. These will be supported on the case by case basis.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D83399
2020-07-09 18:11:45 +03:00
Benjamin Kramer b44470547e Make helpers static. NFC. 2020-07-09 13:48:56 +02:00
aartbik 1bfdf7c7e3 [mlir] [VectorOps] Expose lowering pass options programmatically
The ConvertVectorToLLVM pass defines options that can be passed
on the command line (currently only reassociation of FP reductions
through -convert-vector-to-llvm='reassociate-fp-reductions). This
CL enables setting these options programmatically (forward looking
to more options than just reassociation, as well as setting the
values from code rather than command line).

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D83420
2020-07-08 14:58:07 -07:00
George Mitenkov 7a4e39b326 [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldSExtract and spv.BitFieldUExtract patterns
This patch adds conversion patterns for `spv.BitFieldSExtract` and `spv.BitFieldUExtract`.
As in the patch for `spv.BitFieldInsert`, `offset` and `count` have to be broadcasted in
vector case and casted to match the type of the base.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82640
2020-07-08 12:37:37 +03:00
George Mitenkov 00580349c3 [MLIR][SPIRVToLLVM] Miscellaneous ops conversion: select, fmul and undef
This patch introduces 3 new direct conversions for SPIR-V ops:
- `spv.Select`
- `spv.Undef`
- `spv.FMul` that was skipped in the patch with arithmetic ops

Differential Revision: https://reviews.llvm.org/D83291
2020-07-08 11:06:04 +03:00
Rahul Joshi 74145d5841 [MLIR] Combine the 2 overloads of FuncOp::build() into one.
- This will eliminate the need to pass an empty `ArrayRef<NamedAttribute>{}` when
  no named attributes are required on the function.

Differential Revision: https://reviews.llvm.org/D83356
2020-07-07 18:22:22 -07:00
River Riddle 9db53a1827 [mlir][NFC] Remove usernames and google bug numbers from TODO comments.
These were largely leftover from when MLIR was a google project, and don't really follow LLVM guidelines.
2020-07-07 01:40:52 -07:00
Nicolas Vasilache bd87c6bce1 [mlir][Vector] Add custom slt / SCF.if folding to VectorToSCF
scf.if currently lacks folding on true / false conditionals.
Such foldings are a bit more involved than can be addressed immediately.
This revision introduces an eager folding  for lowering vector.transfer operations in the presence of unrolling.

Differential revision: https://reviews.llvm.org/D83146
2020-07-06 08:21:21 -04:00
George Mitenkov 1cfaaf6455 [MLIR][SPIRVToLLVM] Convert spv.constant scalars and vectors
This patch introduces conversion pattern for `spv.constant` with scalar
and vector types. There is a special case when the constant value is a
signed/unsigned integer (vector of integers). Since LLVM dialect does not
have signedness semantics, the types had to be converted to signless ints.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82936
2020-07-02 14:26:58 -04:00
George Mitenkov 8119a374bc [MLIR][SPIRVToLLVM] SPIR-V function call conversion pattern
Added conversion pattern for SPIR-V `FunctionCallOp`. Based on
specification, it returns no results or a single result, so
can be mapped directly to LLVM dialect's `llvm.call`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D83030
2020-07-02 12:38:27 -04:00
George Mitenkov 03fe7eb16f [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldInsert pattern
This patch introduces conversion pattern for `spv.BitFiledInsert` op,
as well as some utility functions to facilitate code reading.
Since `spv.BitFiledInsert` may take both vector and integer operands,
this case was specifically handled by broadcasting values (`count`
and `offset` here) to vectors. Moreover, the types had to be converted
to same bitwidth in order to conform with LLVM dialect rules.
This was done with `zext` when extending (Note that `count` and
`offset` are treated as unsigned) and `trunc` in the opposite case.
For the latter one, truncation is safe since the op is defined only when
`count`/`offset`/their sum is less than the bitwidth of the result.
This introduces a natural bound of the value of 64, which can be
expressed as `i8`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D82639
2020-07-02 12:19:12 -04:00
Thomas Raoux 0670f855a7 [mlir][spirv] Add support for lowering scf.for scf/if with return value
This allow lowering to support scf.for and scf.if with results. As right now
spv region operations don't have return value the results are demoted to
Function memory. We create one allocation per result right before the region
and store the yield values in it. Then we can load back the value from
allocation to be able to use the results.

Differential Revision: https://reviews.llvm.org/D82246
2020-07-01 17:08:08 -07:00
Thomas Raoux fbce9855e9 [mlir][NFC] Move conversion of scf to spir-v ops in their own file
Move patterns for scf to spir-v ops in their own file/folder.

Differential Revision: https://reviews.llvm.org/D82914
2020-07-01 17:06:50 -07:00
Alex Zinenko 4ab4398045 [mlir] minor tweaks in standard-to-llvm lowering
Fix a typo in the documentation and simplify the condition to drop
braces. Addresses post-commit review of https://reviews.llvm.org/D82647.
2020-06-30 21:19:19 +02:00
Marius Brehler 0f43fce783 [mlir] Fix case in MLIRGPUtoGPURuntimeTransforms
Summary:
This changes the casing of MLIRGPUtoGPURuntimeTransforms to be consistent
with other transform libraries.

Differential Revision: https://reviews.llvm.org/D82841
2020-06-30 20:48:47 +02:00
Marius Brehler 7099d8e4f7 [mlir] Fix case in MLIRGPUtoNVVMTransforms
Summary:
This changes the casing of MLIRGPUtoNVVMTransforms to be consistent
with other transform libraries.

Reviewers: stephenneuendorffer, herhut

Reviewed By: herhut

Subscribers: jholewinski, mgorny, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82842
2020-06-30 20:44:25 +02:00
Marius Brehler cf6ed682f0 [mlir] Fix case in MLIRGPUtoROCDLTransforms
Summary:
This changes the casing of MLIRGPUtoROCDLTransforms to be consistent
with other transform libraries.

Differential Revision: https://reviews.llvm.org/D82843
2020-06-30 20:43:15 +02:00
Marius Brehler 446b90135f [mlir] Fix case in MLIRGPUtoVulkanTransforms
This changes the casing of MLIRGPUtoVulkanTransforms to be consistent
with other transform libraries.

Differential Revision: https://reviews.llvm.org/D82840
2020-06-30 01:47:01 -07:00
Frederik Gossen 8577a090f5 [MLIR][Shape] Fix lowering of `shape.get_extent`
The declarative conversion patterns caused crashes in the asan configuration.
The non-declarative implementation circumvents this.

Differential Revision: https://reviews.llvm.org/D82797
2020-06-30 08:35:24 +00:00
George Mitenkov 3819789be6 [MLIR][SPIRVToLLVM] Added Bitcast conversion pattern
Added conversion pattern and tests for `spv.Bitcast` op.  This one has
a direct mapping in LLVM dialect so `DirectConversionPattern` was used.

Differential Revision: https://reviews.llvm.org/D82748
2020-06-29 20:32:48 -04:00
George Mitenkov cd1bc5c15d [MLIR][SPIRVToLLVM] Convert bitwise and logical not
This patch introduces new conversion patterns for bit and logical
negation op: `spv.Not` and `spv.LogicalNot`. They are implemented
by applying xor on the operand and mask with all bits set.

Differential Revision: https://reviews.llvm.org/D82637
2020-06-29 19:16:50 -04:00
Rahul Joshi ee394e6842 [MLIR] Add variadic isa<> for Type, Value, and Attribute
- Also adopt variadic llvm::isa<> in more places.
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46445

Differential Revision: https://reviews.llvm.org/D82769
2020-06-29 15:04:48 -07:00
Adam D Straw 25055a4fb9 [mlir] add unsigned comparison builders to Affine EDSC
Current Affine comparison builders, which use operator overload, default to signed comparison.  This creates the possibility of misuse of these builders and potential correctness issues when dealing with unsigned integers.  This change makes the distinction between signed and unsigned comparison builders and forces the caller to make a choice between the two.

Differential Revision: https://reviews.llvm.org/D82323
2020-06-29 23:30:49 +02:00
Christopher Tetreault 5cba1c6336 [SVE] Remove calls to VectorType::getNumElements from mlir
Reviewers: efriedma, ftynse, rriddle

Reviewed By: ftynse, rriddle

Subscribers: tschuett, rkruppe, psnobl, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82583
2020-06-29 10:29:39 -07:00
Tobias Gysi 10643c9ad8 [mlir] make the bitwidth of device side index computations configurable (reland)
Summary:
The patch makes the index type lowering of the GPU to NVVM/ROCDL conversion configurable. It introduces a pass option that controls the bitwidth used when lowering index computations and uses the LowerToLLVMOptions structure to control the Standard to LLVM lowering.

This commit fixes a use-after-free bug introduced by the reverted commit d10b1a3. It implements the following changes:
- Added a getDefaultOptions method to the LowerToLLVMOptions struct that returns a reference to statically allocated default options.
- Use the getDefaultOptions method to provide default LowerToLLVMOptions (instead of an initializer list).
- Added comments to clarify the required lifetime of the LowerToLLVMOptions

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82475
2020-06-29 12:22:39 +02:00
Alex Zinenko cba733edf5 [mlir] LLVM dialect: use addressof instead of constant to create function pointers
`llvm.mlir.constant` was originally introduced as an LLVM dialect counterpart
to `std.constant`. As such, it was supporting "function pointer" constants
derived from the symbol name. This is different from `std.constant` that allows
for creation of a "function" constant since MLIR, unlike LLVM IR, supports
this. Later, `llvm.mlir.addressof` was introduced as an Op that obtains a
constant pointer to a global in the LLVM dialect. It naturally extends to
functions (in LLVM IR, functions are globals) and should be used for defining
"function pointer" values instead.

Fixes PR46344.

Differential Revision: https://reviews.llvm.org/D82667
2020-06-29 12:21:33 +02:00
Frederik Gossen d876e3202a [MLIR][Shape] Lower `shape.get_extent` to `extract_element` when possible
When the origin of a shape is an extent tensor the operation `get_extent` can be
lowered directly to `extract_element`.
This choice circumvents the necessity to materialize the shape in memory.

Differential Revision: https://reviews.llvm.org/D82645
2020-06-29 08:39:22 +00:00
Frederik Gossen 76d72c941d [MLIR][Shape] Lower `shape.get_extent` to `std.dim` when possible
When the shape is derived from a tensor argument the shape extent can be derived
directly from that tensor with `std.dim`.
This lowering pattern circumvents the necessity to materialize the shape in
memory.

Differential Revision: https://reviews.llvm.org/D82644
2020-06-29 08:38:22 +00:00
aartbik ceb1b327b5 [mlir] [VectorOps] Add the ability to mark FP reductions with "reassociate" attribute
Rationale:
In general, passing "fastmath" from MLIR to LLVM backend is not supported, and even just providing such a feature for experimentation is under debate. However, passing fine-grained fastmath related attributes on individual operations is generally accepted. This CL introduces an option to instruct the vector-to-llvm lowering phase to annotate floating-point reductions with the "reassociate" fastmath attribute, which allows the LLVM backend to use SIMD implementations for such constructs. Oher lowering passes can start using this mechanism right away in cases where reassociation is allowed.

Benefit:
For some microbenchmarks on x86-avx2, speedups over 20 were observed for longer vector (due to cleaner, spill-free and SIMD exploiting code).

Usage:
mlir-opt --convert-vector-to-llvm="reassociate-fp-reductions"

Reviewed By: ftynse, mehdi_amini

Differential Revision: https://reviews.llvm.org/D82624
2020-06-26 11:03:14 -07:00
George Mitenkov c8295de4a6 [MLIR][SPIRVToLLVM] Conversion for bitrverse and bitcount ops
Implemented conversion for `spv.BitReverse` and `spv.BitCount`. Since ODS
generates builders in a different way for LLVM dialect intrinsics, I
added attributes to build method in `DirectConversionPattern` class. The
tests for these ops are in `bitwise-ops-to-llvm.mlir`.

Differential Revision: https://reviews.llvm.org/D82286
2020-06-26 10:30:52 -04:00
Alex Zinenko 8304ab5799 [mlir] Avoid creating local OpBuilders in Standard-to-LLVM conversion
Conversions of allocation-related operations in Standard-to-LLVM need
declarations of "malloc" and "free" (or equivalents). They use locally created
OpBuilders pointed at the module level to declare these functions if necessary.
This is poorly compatible with the pattern infrastructure that is unaware of
new operations being created. Update the insertion point of the main rewriter
instead.

Differential Revision: https://reviews.llvm.org/D82649
2020-06-26 15:38:00 +02:00
Alex Zinenko 6323065fd6 [mlir] support returning unranked memrefs
Initially, unranked memref descriptors in the LLVM dialect were designed only
to be passed into functions. An assertion was guarding against returning
unranked memrefs from functions in the standard-to-LLVM conversion. This is
insufficient for functions that wish to return an unranked memref such that the
caller does not know the rank in advance, and hence cannot allocate the
descriptor and pass it in as an argument.

Introduce a calling convention for returning unranked memref descriptors as
follows. An unranked memref descriptor always points to a ranked memref
descriptor stored on stack of the current function. When an unranked memref
descriptor is returned from a function, the ranked memref descriptor it points
to is copied to dynamically allocated memory, the ownership of which is
transferred to the caller. The caller is responsible for deallocating the
dynamically allocated memory and for copying the pointed-to ranked memref
descriptor onto its stack.

Provide default lowerings for std.return, std.call and std.indirect_call that
maintain the conversion defined above.

This convention is additionally exercised by a runtime test to guard against
memory errors.

Differential Revision: https://reviews.llvm.org/D82647
2020-06-26 15:37:37 +02:00
Frederik Gossen 5a7cd5db3c [MLIR][Shape] Fix ambiguous symbol 2020-06-25 09:40:08 +00:00
Frederik Gossen e34b88309e [MLIR][Shape] Lower `shape_of` for unranked tensors
Lower `shape_of` for unranked tensors.
Materializes shape in stack-allocated memory.

Differential Revision: https://reviews.llvm.org/D82196
2020-06-25 08:50:45 +00:00
Frederik Gossen 24debf5a76 [MLIR][Shape] Lower `shape.rank`
Lower `shape.rank` to standard dialect.
A shape's size is the same as the extent of the first and only dimension of the
`tensor<?xindex>` it is represented by.

Differential Revision: https://reviews.llvm.org/D82080
2020-06-25 08:44:06 +00:00
George Mitenkov b5c24c24a4 [MLIR][SPIRVToLLVM] Implementation of SPIR-V module conversion pattern
This patch introduces conversion patterns for `spv.module` and `spv._module_end`.
SPIR-V module is converted into `ModuleOp`. This will play a role of enclosing
scope to LLVM ops. At the moment, SPIR-V module attributes (such as memory model,
etc) are ignored.

Differential Revision: https://reviews.llvm.org/D82468
2020-06-24 20:42:50 -04:00
Tobias Gysi 2ff6fad700 Revert "[mlir] make the bitwidth of device side index computations configurable"
This reverts commit d10b1a38a7.
2020-06-23 19:21:36 +02:00
George Mitenkov a4dc61344f [MLIR][SPIRVToLLVM] Implementation of spv.func conversion, and return ops
This patch provides an implementation for `spv.func` conversion. The pattern
is populated in a separate method added to the pass. At the moment, the type
signature conversion only includes the supported types. The conversion pattern
also matches SPIR-V function control attributes to LLVM function attributes.
Those are modelled as `passthrough` attributes in LLVM dialect. The following
mapping are used:
- None: no attributes passed
- Inline: `alwaysinline` seems to be the right equivalent (`inlinehint` is
  semantically weaker in my opinion)
- DontInline: `noinline`
- Pure and Const: I think those can be modelled as `readonly` and `readnone`
  attributes respectively.

Also, 2 patterns added for return ops conversion (`spv.Return` for void return
and `spv.ReturnValue` for a single value return).

Differential Revision: https://reviews.llvm.org/D81931
2020-06-23 11:34:11 -04:00
Tobias Gysi d10b1a38a7 [mlir] make the bitwidth of device side index computations configurable
The patch makes the index type lowering of the GPU to NVVM/ROCDL
conversion configurable. It introduces a pass option that controls the
bitwidth used when lowering index computations.

Differential Revision: https://reviews.llvm.org/D80285
2020-06-22 11:43:37 +02:00
Thomas Raoux b885b1b92d [mlir] Fix gcc build break due to previous commit 2020-06-19 19:00:14 -07:00
Thomas Raoux 670455c77d [mlir][spirv] Legalize subviewop when used with vector transfer
Subview operations are not natively supported downstream in the spirv path.
This change allows removing subview when used by vector transfer the same way
we already do it when they are used by LoadOp/StoreOp

Differential Revision: https://reviews.llvm.org/D82106
2020-06-19 17:33:15 -07:00
Frederik Gossen ac3e5c4d93 [MLIR][Shape] Lower `shape.shape_of` to standard dialect
Lower `shape.shape_of` to standard dialect.
This lowering supports statically and dynamically shaped tensors.
Support for unranked tensors will be added as part of the lowering to `scf`.

Differential Revision: https://reviews.llvm.org/D82098
2020-06-19 15:21:13 +00:00
River Riddle 8d67d187ba [mlir][DialectConversion] Refactor how block argument types get converted
This revision removes the TypeConverter parameter passed to the apply* methods, and instead moves the responsibility of region type conversion to patterns. The types of a region can be converted using the 'convertRegionTypes' method, which acts similarly to the existing 'applySignatureConversion'. This method ensures that all blocks within, and including those moved into, a region will have the block argument types converted using the provided converter.

This has the benefit of making more of the legalization logic controlled by patterns, instead of being handled explicitly by the driver. It also opens up the possibility to support multiple type conversions at some point in the future.

This revision also adds a new utility class `FailureOr<T>` that provides a LogicalResult friendly facility for returning a failure or a valid result value.

Differential Revision: https://reviews.llvm.org/D81681
2020-06-18 15:59:22 -07:00
Thomas Raoux afd43a7a78 [mlir][vulkan-runner] add support for memref of i8, i16 types in vulkan runner
This extends the types supported as kernel arguments when using vulkan runner.

Differential Revision: https://reviews.llvm.org/D82068
2020-06-18 13:24:51 -07:00
aartbik c9eeeb3871 [mlir] [VectorOps] remove print_i1 from runtime support library
Summary:
The "i1" (viz. bool) type does not have a proper equivalent on the "C"
size. So, to avoid any ABIs issues, we simply use print_i32 on an i32
value of one or zero for true and false. This has the added advantage
that one less function needs to be implemented when porting the runtime
support library.

Reviewers: ftynse, bkramer, nicolasvasilache

Reviewed By: ftynse

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82048
2020-06-18 11:07:43 -07:00
lorenzo chelini e31e8f1ed5 [MLIR][Linalg] Retire C++ MatvecOp in favor of a linalg-ods-gen'd op
Replace C++ MatvecOp, now that DRR rules have been dropped.

Differential Revision: https://reviews.llvm.org/D82007
2020-06-18 11:36:49 +02:00
Frederik Gossen 945d20f7ab [MLIR][Shape] Lower `size_to_index` and `index_to_size` with declarative rules
Replace implemented rewrite patterns with equivalent declarative rules.

Differential Revision: https://reviews.llvm.org/D82023
2020-06-18 08:01:38 +00:00
Frederik Gossen eaf49130a9 [MLIR][Shape] Realize `shape` to `std` lowering with declarative patterns
Setup declarative rewrite rules to lower the `shape` dialect to the `std`
dialect with two exemplary rules for `from/to_extent_tensor`.

Differential Revision: https://reviews.llvm.org/D82022
2020-06-18 07:53:44 +00:00
George Mitenkov 771b788687 [MLIR][SPIRVToLLVM] Support cast ops, some logical ops, UModOp
Added support of simple logical ops: `LogicalAnd`, `LogicalOr`,
`LogicalEqual` and `LogicalNotEqual`. Added a missing conversion
for `UMod` op.

Also, implemented SPIR-V cast ops conversion. There are 4 simple
case where there is a clear equivalent in LLVM (e.g. `ConvertFToS`
is `fptosi`). For `FConvert`, `SConvert` and `UConvert` we
distinguish between truncation and extension based on the bit
width of the operand.

Differential Revision: https://reviews.llvm.org/D81812
2020-06-17 17:46:45 -04:00
Geoffrey Martin-Noble cd93906f93 [mlir] Fix case in MLIRGPUtoSPIRVTransforms
This patch changes the casing of MLIRGPUtoSPIRVTransforms
to be consistent with other transforms libraries.

Differential Revision: https://reviews.llvm.org/D81902
2020-06-16 18:12:19 -04:00
Frederik Gossen 0990f1a3ad [MLIR][Standard] Lower `std.dim` with dynamic dimension operand to LLVM
Implement the missing lowering from `std.dim` to the LLVM dialect in case of a
dynamic dimension.

Differential Revision: https://reviews.llvm.org/D81834
2020-06-16 20:57:42 +00:00
Nicolas Vasilache eae76faeea [mlir][Linalg] Retire C++ MatmulOp in favor of a linalg-ods-gen'd op.
Summary:
This revision replaces MatmulOp, now that DRR rules have been dropped.
This revision also fixes minor parsing bugs and a plugs a few holes to get e2e paths working (e.g. library call emission).

During the replacement the i32 version had to be dropped because only the EDSC operators +, *, etc support type inference.

Deciding on a type-polymorphic behavior, and implementing it, is left for future work.

Reviewers: aartbik

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D81935
2020-06-16 10:46:35 -04:00
Alexander Belyaev 71c1080328 [mlir][shape] Fix the comment in ShapeToStandard.cpp. 2020-06-16 13:50:40 +02:00
Kirill Bobyrev 9b72b47ed6 Revert "[mlir][Linalg] Retire C++ MatmulOp in favor of a linalg-ods-gen'd op."
This reverts commit 8c6c49f293.

As discussed offline, this patch breaks internal builds and tests so I'm
reverting it for now.
2020-06-16 11:02:28 +02:00
Nicolas Vasilache 8c6c49f293 [mlir][Linalg] Retire C++ MatmulOp in favor of a linalg-ods-gen'd op.
This revision replaces MatmulOp, now that DRR rules have been dropped.
This revision also fixes minor parsing bugs and a plugs a few holes to get e2e paths working (e.g. library call emission).

During the replacement the i32 version had to be dropped because only the EDSC operators +, *, etc support type inference.

Deciding on a type-polymorphic behavior, and implementing it, is left for future work.

Differential Revision: https://reviews.llvm.org/D79762
2020-06-15 18:14:15 -04:00
Mehdi Amini a9a21bb4b6 Revert "[mlir] Add support for lowering tanh to LLVMIR."
This reverts commit 32c757e4f8.

Broke the build bot:

******************** TEST 'MLIR :: Examples/standalone/test.toy' FAILED ********************
[...]
/tmp/ci-KIMiRFcVZt/lib/libMLIRLinalgToLLVM.a(LinalgToLLVM.cpp.o): In function `(anonymous namespace)::ConvertLinalgToLLVMPass::runOnOperation()':
LinalgToLLVM.cpp:(.text._ZN12_GLOBAL__N_123ConvertLinalgToLLVMPass14runOnOperationEv+0x100): undefined reference to `mlir::populateExpandTanhPattern(mlir::OwningRewritePatternList&, mlir::MLIRContext*)'
2020-06-15 18:46:57 +00:00
Hanhan Wang 32c757e4f8 [mlir] Add support for lowering tanh to LLVMIR.
Summary:
Add a pattern for expanding tanh op into exp form.
A `tanh` is expanded into:
   1) 1-exp^{-2x} / 1+exp^{-2x}, if x => 0
   2) exp^{2x}-1 / exp^{2x}+1  , if x < 0.

Differential Revision: https://reviews.llvm.org/D81618
2020-06-15 10:29:31 -07:00
Alex Zinenko 3f5bd53eb1 [mlir] Introduce callback-based builders for AffineForOp
Similarly to `scf::ForOp`, introduce additional `function_ref` arguments to
`AffineForOp::build` that can be used to populate the body of the loop during
its construction. Provide compatibility functions for constructing affine loop
nests using `edsc::ScopedContext`.

`edsc::AffineLoopNestBuilder` and reletad functionality is now deprecated and
will be removed soon, users are expected to switch to `affineLoopNestBuilder`
that provides similar functionality with a simpler OpBuilder-based
implementation.

Differential Revision: https://reviews.llvm.org/D81754
2020-06-15 17:55:49 +02:00
Alexander Belyaev 3813f24e97 [mlir][shape] Add a pattern to rewrite `shape.reduce` as `scf.for`.
Differential Revision: https://reviews.llvm.org/D81694
2020-06-15 17:54:50 +02:00
Jacques Pienaar 2d2c73c5cf [mlir] Remove OperandAdaptor
Use ::Adaptor alias instead uniformly. Makes the naming more consistent as
adaptor can refer to attributes now too.

Differential Revision: https://reviews.llvm.org/D81789
2020-06-15 06:01:31 -07:00
Frederik Gossen a8c186c216 [MLIR][Standard] Simplify complex operand unpacking
Apply post-commit suggestions (see https://reviews.llvm.org/D79479).

Differential Revision: https://reviews.llvm.org/D81731
2020-06-15 10:45:56 +00:00
Frederik Gossen 361f664850 [MLIR][Standard] Add documentation for `std.dim` and fix test cases
Apply post-commit suggestions (see https://reviews.llvm.org/D81551).
Add documentation, simplify, and fix test cases.

Differential Revision: https://reviews.llvm.org/D81722
2020-06-15 10:40:36 +00:00
Alexander Belyaev cd320446f4 [mlir][shape] Lower Shape `ConstSizeOp` to Standard `ConstantOp`.
Differential Revision: https://reviews.llvm.org/D81735
2020-06-15 10:42:05 +02:00
George Mitenkov cf2b4d5cb6 [MLIR][SPIRVToLLVM] Implemented shift conversion pattern
This patch has shift ops conversion implementation. In SPIR-V dialect,
`Shift` and `Base` may have different bit width. On the contrary,
in LLVM dialect both `Base` and `Shift` have to be of the same bit width.
This leads to the following cases:
- if `Base` has the same bit width as `Shift`, the conversion is
  straightforward.
- if `Base` has a greater bit width than `Shift`, shift is sign/zero
  extended first. Then the extended value is passed to the shift.
- otherwise the conversion is considered to be illegal.

Differential Revision: https://reviews.llvm.org/D81546
2020-06-12 19:04:30 -04:00
George Mitenkov fc148a4c88 [MLIR][SPIRVToLLVM] Added conversion for SPIR-V comparison ops
Implemented `FComparePattern` and `IComparePattern` classes
that provide conversion of SPIR-V comparison ops (such as
`spv.FOrdGreaterThanEqual` and others) to LLVM dialect.
Also added tests in `comparison-ops-to-llvm.mlir`.

Differential Revision: https://reviews.llvm.org/D81487
2020-06-11 18:46:17 -04:00
Alexander Belyaev e9ac792748 [mlir] Fix some of the warnings in MLIR code.
Summary:
* extra ';' in the following files:
    mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
    mlir/lib/Dialect/Shape/IR/Shape.cpp

* base class ‘mlir::ConvertVectorToSCFBase<ConvertVectorToSCFPass>’
  should be explicitly initialized in the copy constructor [-Wextra] in
    mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp

* warning: ‘bool Expression::operator==(const Expression&) const’
  defined but not used [-Wunused-function] in
    mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp

Differential Revision: https://reviews.llvm.org/D81673
2020-06-11 22:18:32 +02:00
jerryyin 2abad3433f [mlir][rocdl] Adding vector to ROCDL dialect lowering
* Created the vector to ROCDL lowering pass
  * The lowering pass lowers vector transferOps to rocdl mubufOps
* Added unit test and functional test
2020-06-11 14:28:13 +00:00
George Mitenkov d93d8fcdec [MLIR][SPIRVToLLVM] Implemented conversion for arithmetic ops and 3 bitwise ops.
Following the previous revision `D81100`, this commit implements a templated class
that would provide conversion patterns for “straightforward” SPIR-V ops into
LLVM dialect. Templating allows to abstract away from concrete implementation
for each specific op. Those are mainly binary operations. Currently supported
and tested ops are:
- Arithmetic ops: `IAdd`, `ISub`, `IMul`, `FAdd`, `FSub`, `FMul`, `FDiv`,  `FNegate`,
  `SDiv`, `SRem` and  `UDiv`
- Bitwise ops: `BitwiseAnd`, `BitwiseOr`, `BitwiseXor`

The implementation relies on `SPIRVToLLVMConversion` class that makes use of
`OpConversionPattern`.

Differential Revision: https://reviews.llvm.org/D81305
2020-06-10 19:10:31 -04:00
Frederik Gossen 904f91db5f [MLIR][Standard] Make the `dim` operation index an operand.
Allow for dynamic indices in the `dim` operation.
Rather than an attribute, the index is now an operand of type `index`.
This allows to apply the operation to dynamically ranked tensors.
The correct lowering of dynamic indices remains to be implemented.

Differential Revision: https://reviews.llvm.org/D81551
2020-06-10 13:54:47 +00:00
Stephan Herhut 2c8afe1298 [mlir][gpu] Add support for f16 when lowering to nvvm intrinsics
Summary:
The NVVM target only provides implementations for tanh etc. on f32 and
f64 operands. To also support f16, we now insert operations to extend to f32
and truncate back to f16 around the intrinsic call.

Differential Revision: https://reviews.llvm.org/D81473
2020-06-09 19:33:45 +02:00
George Mitenkov fda5192d4f [MLIR][SPIRVToLLVM] Add skeleton for SPIR-V to LLVM dialect conversion
These commits set up the skeleton for SPIR-V to LLVM dialect conversion.
I created SPIR-V to LLVM pass, registered it in Passes.td, InitAllPasses.h.
Added a pattern for `spv.BitwiseAndOp` and tests for it. Integer, float
and vector types are converted through LLVMTypeConverter.

Differential Revision: https://reviews.llvm.org/D81100
2020-06-08 18:22:42 -04:00
Alexander Belyaev 80be54c08f [mlir] Lower Shape binary ops (AddOp, MulOp) to Standard.
Differential Revision: https://reviews.llvm.org/D81344
2020-06-08 17:48:01 +02:00
Frederik Gossen 970bb4a291 [MLIR] Add `to/from_extent_tensor` lowering to the standard dialect
The operations `to_extent_tensor` and `from_extent_tensor` become no-ops when
lowered to the standard dialect.
This is possible with a lowering from `shape.shape` to `tensor<?xindex>`.

Differential Revision: https://reviews.llvm.org/D81162
2020-06-08 09:38:18 +00:00
Frederik Gossen 867bc41e85 [MLIR] Add type conversion for `shape.shape`
Convert `shape.shape` to `tensor<?xindex>` when lowering the `shape` to the
`std` dialect.

Differential Revision: https://reviews.llvm.org/D81161
2020-06-08 09:34:03 +00:00
Frederik Gossen 24edbdf99b [MLIR] Clean up `shape` to `std` lowering
Apply post-commit suggestions to the new lowering.

Differential Revision: https://reviews.llvm.org/D81160
2020-06-08 08:59:53 +00:00
Jacques Pienaar 92cb0ce8f8 [mlir] Change to re-enable cuda-runner tests
mlir-cuda-runner tests were failing post
https://reviews.llvm.org/D80676, small change to get those passing
again. More cleanup may be needed post.
2020-06-06 09:31:51 -07:00
Wen-Heng (Jack) Chung 2fd6403a6d [mlir][gpu] Introduce mlir-rocm-runner.
Summary:
`mlir-rocm-runner` is introduced in this commit to execute GPU modules on ROCm
platform. A small wrapper to encapsulate ROCm's HIP runtime API is also inside
the commit.

Due to behavior of ROCm, raw pointers inside memrefs passed to `gpu.launch`
must be modified on the host side to properly capture the pointer values
addressable on the GPU.

LLVM MC is used to assemble AMD GCN ISA coming out from
`ConvertGPUKernelToBlobPass` to binary form, and LLD is used to produce a shared
ELF object which could be loaded by ROCm HIP runtime.

gfx900 is the default target be used right now, although it could be altered via
an option in `mlir-rocm-runner`. Future revisions may consider using ROCm Agent
Enumerator to detect the right target on the system.

Notice AMDGPU Code Object V2 is used in this revision. Future enhancements may
upgrade to AMDGPU Code Object V3.

Bitcode libraries in ROCm-Device-Libs, which implements math routines exposed in
`rocdl` dialect are not yet linked, and is left as a TODO in the logic.

Reviewers: herhut

Subscribers: mgorny, tpr, dexonsmith, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, llvm-commits

Tags: #mlir, #llvm

Differential Revision: https://reviews.llvm.org/D80676
2020-06-05 09:46:39 -05:00
Nicolas Vasilache 247e185dd5 [mlir][Vector] Move temporary alloc to top of the function alloca when lowering vector_transfers
Recently introduced allocation hoisting is quite conservative on the cases when it triggers.
This revision makes it such that the allocations for vector transfer lowerings are hoisted
to the top of the function.
This should be revisited in the context of parallelism and is a temporary workaround.

Differential Revision: https://reviews.llvm.org/D81253
2020-06-05 08:45:52 -04:00
Diego Caballero 5c990d6994 [mlir] Add support for bf16 to StandardToLLVM conversion
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D81127
2020-06-04 14:36:36 -07:00
Thomas Raoux 661235e126 [mlir][gpu] Add subgroup Id/Size/Num to GPU dialect
Add SubgroupId, SubgroupSize and NumSubgroups to GPU dialect ops and add the
lowering of those ops to SPIRV.

Differential Revision: https://reviews.llvm.org/D81042
2020-06-04 10:52:40 -07:00
Hanhan Wang 0b025d2733 [mlir][StandardToSPIRV] Handle i1 case for lowering std.zexti to SPIR-V.
Differential Revision: https://reviews.llvm.org/D80965
2020-06-03 15:01:18 -07:00
Frederik Gossen 3713314bfa [MLIR] Shape to standard dialect lowering
Add a new pass to lower operations from the `shape` to the `std` dialect.
The conversion applies only to the `size_to_index` and `index_to_size`
operations and affected types.
Other patterns will be added as needed.

Differential Revision: https://reviews.llvm.org/D81091
2020-06-03 16:17:03 +00:00
Alex Zinenko 5c5dafc534 [mlir] support materialization for 1-1 type conversions
Dialect conversion infrastructure supports 1->N type conversions by requiring
individual conversions to provide facilities to generate operations
retrofitting N values into 1 of the original type when N > 1. This
functionality can also be used to materialize explicit "cast"-like operations,
but it did not support 1->1 type conversions until now. Modify TypeConverter to
support materialization of cast operations for 1-1 conversions.

This also makes materialization specification more extensible following the
same pattern as type conversions. Instead of overloading a virtual function,
users or subclasses of TypeConversion can now register type-specific
materialization callbacks that will be called in order for the given type.

Differential Revision: https://reviews.llvm.org/D79729
2020-06-02 13:48:33 +02:00
Alex Zinenko eb8edd8526 [mlir] SCFToGPUPass: fix macros referring to LOOPS to use SCF instead
One header guard was overlooked when renaming LoopOps to SCF, rename it.
Also drop two unused macros, one of which referred to LoopOp (not "Ops",
hence the overlook).
2020-06-02 13:03:13 +02:00
MaheshRavishankar 2bcd1927dd [mlir][SCFToGPU] Remove conversions from scf.for to gpu.launch.
Keeping in the affine.for to gpu.launch conversions, which should
probably be the affine.parallel to gpu.launch conversion as well.

Differential Revision: https://reviews.llvm.org/D80747
2020-06-01 23:06:20 -07:00
Nicolas Vasilache 5f9e0466f2 [mlir][Vector] Fix vector.transfer alignment calculation
https://reviews.llvm.org/D79246 introduces alignment propagation for vector transfer operations. Unfortunately, the alignment calculation is incorrect and can result in crashes.

This revision fixes the calculation by using the natural alignment of the memref elemental type, instead of the resulting vector type.

If more alignment is desired, it can be done in 2 ways:
1. use a proper vector.type_cast to transform a memref<axbxcxdxf32> into a memref<axbxvector<cxdxf32>> giving a natural alignment of vector<cxdxf32>
2. add an alignment attribute to vector transfer operations and propagate it.

With this change the alignment in the relevant tests goes down from 128 to 4.

Lastly, a few minor cleanups are performed and the custom `isMinorIdentityMap` is deprecated.

Differential Revision: https://reviews.llvm.org/D80734
2020-05-28 17:58:51 -04:00
Stephen Neuendorffer 8b3155829a [MLIR] Fix build when NVPTX is not enabled
In this case, neither target is selected, but there is still a dependence
on the MC library (through the TargetOptions.h include)
2020-05-28 14:07:55 -07:00
Alex Zinenko 72ede60b75 [mlir][GPU] Link relevant LLVM components in GPUCommon instead of test
D80142 restructured MLIR-to-GPU-binary conversion to support multiple
targets. It also modified cmake files to link relevant LLVM components
in test/lib, which broke shared-library builds, and likely made the
conversions unusable outside mlir-opt (or other tools that link in test
library targets). Link these components to GPUCommon instead.

Differential Revision: https://reviews.llvm.org/D80739
2020-05-28 20:01:54 +02:00
Jacques Pienaar fefe4366c3 [mlir] Use ValueRange instead of ArrayRef<Value>
This allows constructing operand adaptor from existing op (useful for commonalizing verification as I want to do in a follow up).

I also add ability to use member initializers for the generated adaptor constructors for convenience.

Differential Revision: https://reviews.llvm.org/D80667
2020-05-28 09:05:24 -07:00
Wen-Heng (Jack) Chung 061fb8eb2d [mlir][gpu][mlir-cuda-runner] Refactor ConvertKernelFuncToCubin to be generic.
Make ConvertKernelFuncToCubin pass to be generic:

- Rename to ConvertKernelFuncToBlob.
- Allow specifying triple, target chip, target features.
- Initializing LLVM backend is supplied by a callback function.
- Lowering process from MLIR module to LLVM module is via another callback.
- Change mlir-cuda-runner to adopt the revised pass.
- Add new tests for lowering to ROCm HSA code object (HSACO).
- Tests for CUDA and ROCm are kept in separate directories.

Differential Revision: https://reviews.llvm.org/D80142
2020-05-28 09:08:28 -05:00
aartbik c295a65da4 [mlir] [VectorOps] Add 'vector.flat_transpose' operation
Summary:
Provides a representation of the linearized LLVM instrinsic.
With tests and lowering implementation to LLVM IR dialect.
Prepares better lowering for 2-D vector.transpose.

Reviewers: nicolasvasilache, ftynse, reidtatge, bkramer, dcaballe

Reviewed By: ftynse, dcaballe

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80419
2020-05-27 11:09:48 -07:00
MaheshRavishankar 4d6f44f5f0 [mlir][spirv] Lower allocation/deallocations of workgroup memory.
This allocation of a workgroup memory is lowered to a
spv.globalVariable. Only static size allocation with element type
being int or float is handled. The lowering does account for the
element type that are not supported in the lowered spv.module based on
the extensions/capabilities and adjusts the number of elements to get
the same byte length.

Differential Revision: https://reviews.llvm.org/D80411
2020-05-27 09:53:16 -07:00
Alex Zinenko cadb7ccf2c [mlir] SCF: provide function_ref builders for IfOp
Now that OpBuilder is available in `build` functions, it becomes possible to
populate the "then" and "else" regions directly when building the "if"
operation. This is desirable in more structured forms of builders, especially
in when conditionals are mixed with loops. Provide new `build` APIs taking
callbacks for body constructors, similarly to scf::ForOp, and replace more
clunky edsc::BlockBuilder uses with these. The original APIs remain available
and go through the new implementation.

Differential Revision: https://reviews.llvm.org/D80527
2020-05-27 16:12:58 +02:00
Benjamin Kramer a9b5edc5e2 Make mlir::Value's bool conversion operator explicit
This still allows `if (value)` while requiring an explicit cast when not
in a boolean context. This means things like `std::set<Value>` will no
longer compile.

Differential Revision: https://reviews.llvm.org/D80497
2020-05-25 18:22:00 +02:00
Wen-Heng (Jack) Chung 2cbbc266ec [mlir][gpu] Refactor ConvertGpuLaunchFuncToCudaCalls pass.
Due to similar APIs between CUDA and ROCm (HIP),
ConvertGpuLaunchFuncToCudaCalls pass could be used on both platforms with some
refactoring.

In this commit:

- Migrate ConvertLaunchFuncToCudaCalls from GPUToCUDA to GPUCommon, and rename.
- Rename runtime wrapper APIs be platform-neutral.
- Let GPU binary annotation attribute be specifiable as a PassOption.
- Naming changes within the implementation and tests.

Subsequent patches would introduce ROCm-specific tests and runtime wrapper
APIs.

Differential Revision: https://reviews.llvm.org/D80167
2020-05-21 08:53:47 -05:00
Mehdi Amini 5c3ebd7725 Revert "[mlir][gpu] Refactor ConvertGpuLaunchFuncToCudaCalls pass."
This reverts commit cdb6f05e2d.

The build is broken with:

  You have called ADD_LIBRARY for library obj.MLIRGPUtoCUDATransforms without any source files. This typically indicates a problem with your CMakeLists.txt file
2020-05-21 03:44:35 +00:00
Nicolas Vasilache 3393cc4ceb [mlir] NFC - Appease GCC 5 again.. 2020-05-20 17:58:18 -04:00
Wen-Heng (Jack) Chung cdb6f05e2d [mlir][gpu] Refactor ConvertGpuLaunchFuncToCudaCalls pass.
Due to similar APIs between CUDA and ROCm (HIP),
ConvertGpuLaunchFuncToCudaCalls pass could be used on both platforms with some
refactoring.

In this commit:

- Migrate ConvertLaunchFuncToCudaCalls from GPUToCUDA to GPUCommon, and rename.
- Rename runtime wrapper APIs be platform-neutral.
- Let GPU binary annotation attribute be specifiable as a PassOption.
- Naming changes within the implementation and tests.

Subsequent patches would introduce ROCm-specific tests and runtime wrapper
APIs.

Differential Revision: https://reviews.llvm.org/D80167
2020-05-20 16:11:48 -05:00
Nicolas Vasilache ebf14d9b6d [mlir] NFC - Appease GCC 5 again.. 2020-05-20 16:47:45 -04:00
MaheshRavishankar 0e88eb5c51 [mlir][spirv] Adapt subview legalization to the updated op semantics.
The subview semantics changes recently to allow for more natural
representation of constant offsets and strides. The legalization of
subview op for lowering to SPIR-V needs to account for this.
Also change the linearization to use the strides from the affine map
of a memref.

Differential Revision: https://reviews.llvm.org/D80270
2020-05-20 12:00:21 -07:00
Nicolas Vasilache 7c3c5b11b1 [mlir][Vector] Add option to fully unroll for VectorTransfer to SCF lowering
Summary:
Previously, the only support partial lowering from vector transfers to SCF was
going through loops. This requires a dedicated allocation and extra memory
roundtrips because LLVM aggregates cannot be indexed dynamically (for more
details see the [deep-dive](https://mlir.llvm.org/docs/Dialects/Vector/#deeperdive)).

This revision allows specifying full unrolling which removes this additional roundtrip.
This should be used carefully though because full unrolling will spill, negating the
benefits of removing the interim alloc in the first place.

Proper heuristics are left for a later time.

Differential Revision: https://reviews.llvm.org/D80100
2020-05-20 11:02:13 -04:00
Alex Zinenko a7d88a9038 [mlir] SCFToStandard: support any ops in and around the control flow ops
Originally, the SCFToStandard conversion only declared Ops from the Standard
dialect as legal after conversion. This is undesirable as it would fail the
conversion if the SCF ops contained ops from any other dialect. Furthermore,
this would be problematic for progressive lowering of `scf.parallel` to
`scf.for` after `ensureRegionTerminator` is made aware of the pattern rewriting
infrastructure because it creates temporary `scf.yield` operations declared
illegal. Change the legalization target to declare any op other than `scf.for`,
`scf.if` and `scf.parallel` legal.

Differential Revision: https://reviews.llvm.org/D80137
2020-05-20 16:12:05 +02:00
Alex Zinenko 57cbeaa8b5 [mlir] Erase or clear blocks through ConversionPatternRewriter when applicable
Multiple places in the code base were erasing Blocks or operations in them
using in-place modifications (`Block::erase` or `Block::clear`) unknown to
ConversionPatternRewriter. These operations could not be undone if the pattern
failed and could lead to inconsistent in-memory state of the IR with dangling
pointers. Use `ConversionPatternRewriter::eraseOp` and `::eraseBlock` instead.

Differential Revision: https://reviews.llvm.org/D80136
2020-05-20 16:12:05 +02:00
Nicolas Vasilache da95a0d8cc [mlir] NFC - Appease gcc 5
This should fix the error ```
VectorToSCF.cpp:238:62: error: specialization of 'template<class
ConcreteOp> mlir::LogicalResult
{anonymous}::NDTransferOpHelper<ConcreteOp>::doReplace()' in different
namespace
```
2020-05-19 22:47:51 -04:00
Benjamin Kramer 350dadaa8a Give helpers internal linkage. NFC. 2020-05-19 22:16:37 +02:00
Hanhan Wang 520a570268 [mlir][StandardToSPIRV] Fix signedness issue in bitwidth emulation.
Summary:
Previously, after applying the mask, a negative number would convert to a
positive number because the sign flag was forgotten. This patch adds two more
shift operations to do the sign extension. This assumes that we're using two's
complement.

This patch applies sign extension unconditionally when loading a unspported integer width, and it relies the pattern to do the casting because the signedness semantic is carried by operator itself.

Differential Revision: https://reviews.llvm.org/D79753
2020-05-19 11:00:01 -07:00
Alex Zinenko d1560f3956 [mlir] scf::ForOp: provide builders with callbacks for loop body
Thanks to a recent change that made `::build` functions take an instance of
`OpBuilder`, it is now possible to build operations within a region attached to
the operation about to be created. Exercise this on `scf::ForOp` by taking a
callback that populates the loop body while the loop is being created.

Additionally, provide helper functions to build perfect nests of `ForOp`s,
with support for iteration arguments. These functions provide the same
functionality as EDSC LoopNestBuilder with simpler implementation, without
relying on edsc::ScopedContext, and using `OpBuilder` in an unambiguous way.
Compatibility functions for EDSC are provided, but may be removed in the
future.

Differential Revision: https://reviews.llvm.org/D79688
2020-05-19 16:26:29 +02:00
George 3c4ef74555 Fixed a typo in the comment for allocateBuffer()
Differential Revision: https://reviews.llvm.org/D80087
2020-05-18 14:41:57 -04:00
Nicolas Vasilache 1870e787af [mlir][Vector] Add an optional "masked" boolean array attribute to vector transfer operations
Summary:
Vector transfer ops semantic is extended to allow specifying a per-dimension `masked`
attribute. When the attribute is false on a particular dimension, lowering to LLVM emits
unmasked load and store operations.

Differential Revision: https://reviews.llvm.org/D80098
2020-05-18 11:52:08 -04:00
Nicolas Vasilache 36cdc17f8c [mlir][Vector] Make minor identity permutation map optional in transfer op printing and parsing
Summary:
This revision makes the use of vector transfer operatons more idiomatic by
allowing to omit and inferring the permutation_map.

Differential Revision: https://reviews.llvm.org/D80092
2020-05-18 11:41:27 -04:00
Stephen Neuendorffer 37ce8d6ade [MLIR] Fix linkage for libMLIR.so
Generally:
1) don't use target_link_libraries() and add_mlir_library() on the same target, use LINK_LIBS PUBLIC instead.
2) don't use LINK_LIBS to specify LLVM libraries.  Use LINK_COMPONENTS instead
3) no need to link against LLVMSupport.  We pull it in by default.

Differential Revision: https://reviews.llvm.org/D80076
2020-05-17 13:46:52 -07:00
Stephen Neuendorffer 1cff8e8de7 [MLIR] LinalgToStandard: use LINK_LIBS rather than target_link_libraries.
Also, missing MLIRTransforms as a dependency.  This breaks BUILD_SHARED_LIBS=on

Differential Revision: https://reviews.llvm.org/D80035
2020-05-15 14:25:28 -07:00
aartbik b1c688dbae [mlir] [VectorOps] Implement vector.create_mask lowering to LLVM IR
Summary:
First, compact implementation of lowering to LLVM IR. A bit more
challenging than the constant mask due to the dynamic indices, of course.
I like to hear if there are more efficient ways of doing this in LLVM,
but this for now at least gives us a functional reference implementation.

Reviewers: nicolasvasilache, ftynse, bkramer, reidtatge, andydavis1, mehdi_amini

Reviewed By: nicolasvasilache

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79954
2020-05-15 11:02:30 -07:00
Alex Zinenko 4ead2cf76c [mlir] Rename conversions involving ex-Loop dialect to mention SCF
The following Conversions are affected: LoopToStandard -> SCFToStandard,
LoopsToGPU -> SCFToGPU, VectorToLoops -> VectorToSCF. Full file paths are
affected. Additionally, drop the 'Convert' prefix from filenames living under
lib/Conversion where applicable.

API names and CLI options for pass testing are also renamed when applicable. In
particular, LoopsToGPU contains several passes that apply to different kinds of
loops (`for` or `parallel`), for which the original names are preserved.

Differential Revision: https://reviews.llvm.org/D79940
2020-05-15 10:45:11 +02:00
Alex Zinenko 7fc5f28068 [mlir] LinalgToStandard: add build dependency on MLIRPass
This is supposed to resolve the build problem with shared libraries.
2020-05-15 10:20:04 +02:00
MaheshRavishankar 0b3e478b10 [mlir][GPUToSPIRV] Use default ABI only when none of the arguments
have abi attributes.

To ensure there is no conflict, use the default ABI only when none of
the arguments have the spv.interface_var_abi attribute. This also
implies that if one of the arguments has a spv.interface_var_abi
attribute, all of them should have it as well.

Differential Revision: https://reviews.llvm.org/D77232
2020-05-14 21:48:51 -07:00
Nicolas Vasilache f1b972041a [mlir][Linalg] Start a LinalgToStandard pass and move conversion to library calls.
This revision starts decoupling the include the kitchen sink behavior of Linalg to LLVM lowering by inserting a -convert-linalg-to-std pass.

The lowering of linalg ops to function calls was previously lowering to memref descriptors by having both linalg -> std and std -> LLVM patterns in the same rewrite.

When separating this step, a new issue occurred: the layout is automatically type-erased by this process. This revision therefore introduces memref casts to perform these type erasures explicitly. To connect everything end-to-end, the LLVM lowering of MemRefCastOp is relaxed because it is artificially more restricted than the op semantics. The op semantics already guarantee that source and target MemRefTypes are cast-compatible. An invalid lowering test now becomes valid and is removed.

Differential Revision: https://reviews.llvm.org/D79468
2020-05-15 00:24:03 -04:00
Diego Caballero bc5565f9ea [mlir][Affine] Introduce affine.vector_load and affine.vector_store
This patch adds `affine.vector_load` and `affine.vector_store` ops to
the Affine dialect and lowers them to `vector.transfer_read` and
`vector.transfer_write`, respectively, in the Vector dialect.

Reviewed By: bondhugula, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D79658
2020-05-14 13:17:58 -07:00
Alex Zinenko 60f443bb3b [mlir] Change dialect namespace loop->scf
All ops of the SCF dialect now use the `scf.` prefix instead of `loop.`. This
is a part of dialect renaming.

Differential Revision: https://reviews.llvm.org/D79844
2020-05-13 19:20:21 +02:00
MaheshRavishankar 49e6c19100 [mlir][StandardToLLVM] Add SinOp to LLVM dialect and lowering of std.sin to this op.
Differential Revision: https://reviews.llvm.org/D79505
2020-05-12 23:15:25 -07:00
Nicolas Vasilache 63c0e72b2f [mlir] Revisit std.subview handling of static information.
The main objective of this revision is to change the way static information is represented, propagated and canonicalized in the SubViewOp.

In the current implementation the issue is that canonicalization may strictly lose information because static offsets are combined in irrecoverable ways into the result type, in order to fit the strided memref representation.

The core semantics of the op do not change but the parser and printer do: the op always requires `rank` offsets, sizes and strides. These quantities can now be either SSA values or static integer attributes.

The result type is automatically deduced from the static information and more powerful canonicalizations (as powerful as the representation with sentinel `?` values allows). Previously static information was inferred on a best-effort basis from looking at the source and destination type.

Relevant tests are rewritten to use the idiomatic `offset: x, strides : [...]`-form. Bugs are corrected along the way that were not trivially visible in flattened strided memref form.

Lowering to LLVM is updated, simplified and now supports all cases.
A mixed static-dynamic mode test that wouldn't previously lower is added.

It is an open question, and a longer discussion, whether a better result type representation would be a nicer alternative. For now, the subview op carries the required semantic.

Differential Revision: https://reviews.llvm.org/D79662
2020-05-12 20:04:44 -04:00
Alex Zinenko 473bdaf2e8 [mlir] Move Conversion/StandardToStandard to Dialect/StandardOps/Transforms/FuncConversions
Conversion/ folders were originally intended to store patterns for
DialectA->DialectB conversions that depend on both dialects and do not
conceptually belong to either of the dialects. As such, DialectA->DialectA
conversion does not make sense under Conversion/ and should rather live with
the dialect it operates on.

Differential Revision: https://reviews.llvm.org/D79569
2020-05-13 00:33:25 +02:00
Hanhan Wang 756d6959d7 [mlir][StandardToSPIRV] Add support for lowering index_cast to SPIR-V.
Differential Revision: https://reviews.llvm.org/D79644
2020-05-11 15:41:25 -07:00
Reid Tatge 334a4159ec [mlir][Vector] NFC - Rename vector.strided_slice into vector.extract_strided_slice
Differential Revision: https://reviews.llvm.org/D79734
2020-05-11 14:21:10 -07:00
Sean Silva 98eead8186 [mlir][Value] Add v.getDefiningOp<OpTy>()
Summary:
This makes a common pattern of
`dyn_cast_or_null<OpTy>(v.getDefiningOp())` more concise.

Differential Revision: https://reviews.llvm.org/D79681
2020-05-11 12:55:27 -07:00
Nicolas Vasilache 6ed61a26c2 [mlir] Simplify and better document std.view semantics
This [discussion](https://llvm.discourse.group/t/viewop-isnt-expressive-enough/991/2) raised some concerns with ViewOp.

In particular, the handling of offsets is incorrect and does not match the op description.
Note that with an elemental type change, offsets cannot be part of the type in general because sizeof(srcType) != sizeof(dstType).

Howerver, offset is a poorly chosen term for this purpose and is renamed to byte_shift.

Additionally, for all intended purposes, trying to support non-identity layouts for this op does not bring expressive power but rather increases code complexity.

This revision simplifies the existing semantics and implementation.
This simplification effort is voluntarily restrictive and acts as a stepping stone towards supporting richer semantics: treat the non-common cases as YAGNI for now and reevaluate based on concrete use cases once a round of simplification occurred.

Differential revision: https://reviews.llvm.org/D79541
2020-05-11 12:29:23 -04:00
Alex Zinenko c25b20c0f6 [mlir] NFC: Rename LoopOps dialect to SCF (Structured Control Flow)
This dialect contains various structured control flow operaitons, not only
loops, reflect this in the name. Drop the Ops suffix for consistency with other
dialects.

Note that this only moves the files and changes the C++ namespace from 'loop'
to 'scf'. The visible IR prefix remains the same and will be updated
separately. The conversions will also be updated separately.

Differential Revision: https://reviews.llvm.org/D79578
2020-05-11 15:04:27 +02:00
Hanhan Wang 3f07cab312 [mlir][StandardToLLVM] Add support for lowering FPToSIOp to LLVM.
Summary: Depends On D79374

Differential Revision: https://reviews.llvm.org/D79455
2020-05-11 01:29:24 -07:00
Hanhan Wang ac691c4fe7 [mlir][StandardToSPIRV] Add support for lowering FPToSIOp to SPIR-V.
Summary: Depends On D79373

Differential Revision: https://reviews.llvm.org/D79374
2020-05-11 01:27:54 -07:00
Frederik Gossen 5d5f61fc89 [MLIR] Add complex addition and substraction to the standard dialect
Complex addition and substraction are the first two binary operations on complex
numbers.
Remaining operations will follow the same pattern.

Differential Revision: https://reviews.llvm.org/D79479
2020-05-08 09:54:18 +00:00
Alex Zinenko a99f62c40a [mlir] VectorToLLVM: propagate up from replaceTransferOp
In the Vector to LLVM conversion, the `replaceTransferOp` function calls
into a type converter that may fail and suppresses the status. Change
the function to return the failure status instead, Since it is called
from a pattern, the failure can be readily propagated to the rest of
infrastructure.
2020-05-07 11:53:48 +02:00
Wen-Heng (Jack) Chung a23f190213 [mlir][vector] set alignment when lowering transfer_read and transfer_write.
When emitting masked load / store, set alignment from data layout.

Differential Revision: https://reviews.llvm.org/D79246
2020-05-07 11:44:25 +02:00
Stephen Neuendorffer e78ef9385c [MLIR] GPUToCUDA conversion: MC is only needed if NVPTX is enabled.
This patch conditionally links with MC
2020-05-05 08:55:17 -07:00
Alexander Belyaev b79751e83d [MLIR] Add conversion from AtomicRMWOp -> GenericAtomicRMWOp.
Adding this pattern reduces code duplication. There is no need to have a
custom implementation for lowering to llvm.cmpxchg.

Differential Revision: https://reviews.llvm.org/D78753
2020-05-05 10:32:13 +02:00
Stephen Neuendorffer 5469f434bb [MLIR] Reapply: Adjust libMLIR building to more closely follow libClang
This reverts commit ab1ca6e60f.
2020-05-04 20:47:57 -07:00
Stephen Neuendorffer 146192ade4 [MLIR] Normalize usage of intrinsics_gen
Portions of MLIR which depend on LLVMIR generally need to depend on
intrinsics_gen, to ensure that tablegen'd header files from LLVM are built
first.  Without this, we get errors, typically about llvm/IR/Attributes.inc
not being found.

Note that previously the Linalg Dialect depended on intrinsics_gen, but it
doesn't need to, since it doesn't use LLVMIR.

Differential Revision: https://reviews.llvm.org/D79389
2020-05-04 20:47:57 -07:00
River Riddle 1e4faf23ff [mlir][IR] Add a Region::getOps method that returns a range of immediately nested operations
This allows for walking the operations nested directly within a region, without traversing nested regions.

Differential Revision: https://reviews.llvm.org/D79056
2020-05-04 17:46:25 -07:00
Hanhan Wang 5d10613b6e [mlir][StandardToSPIRV] Emulate bitwidths not supported for store op.
Summary:
As D78974, this patch implements the emulation for store op. The emulation is
done with atomic operations. E.g., if the storing value is i8, rewrite the
StoreOp to:

 1) load a 32-bit integer
 2) clear 8 bits in the loading value
 3) store 32-bit value back
 4) load a 32-bit integer
 5) modify 8 bits in the loading value
 6) store 32-bit value back

The step 1 to step 3 are done by AtomicAnd as one atomic step, and the step 4
to step 6 are done by AtomicOr as another atomic step.

Differential Revision: https://reviews.llvm.org/D79272
2020-05-04 15:18:44 -07:00
Stephen Neuendorffer ab1ca6e60f Revert "[MLIR] Adjust libMLIR building to more closely follow libClang"
This reverts commit 4f0f436749.

This seems to show some compile dependence problems, and also breaks flang.
2020-05-04 12:40:12 -07:00
Valentin Churavy 4f0f436749 [MLIR] Adjust libMLIR building to more closely follow libClang
- Exports MLIR targets to be used out-of-tree.
- mimicks `add_clang_library` and `add_flang_library`.
- Fixes libMLIR.so

After https://reviews.llvm.org/D77515 libMLIR.so was no longer containing
any object files. We originally had a cludge there that made it work with
the static initalizers and when switchting away from that to the way the
clang shlib does it, I noticed that MLIR doesn't create a `obj.{name}` target,
and doesn't export it's targets to `lib/cmake/mlir`.

This is due to MLIR using `add_llvm_library` under the hood, which adds
the target to `llvmexports`.

Differential Revision: https://reviews.llvm.org/D78773

[MLIR] Fix libMLIR.so and LLVM_LINK_LLVM_DYLIB

Primarily, this patch moves all mlir references to LLVM libraries into
either LLVM_LINK_COMPONENTS or LINK_COMPONENTS.  This enables magic in
the llvm cmake files to automatically replace reference to LLVM components
with references to libLLVM.so when necessary.  Among other things, this
completes fixing libMLIR.so, which has been broken for some configurations
since D77515.

Unlike previously, the pattern is now that mlir libraries should almost
always use add_mlir_library.  Previously, some libraries still used
add_llvm_library.  However, this confuses the export of targets for use
out of tree because libraries specified with add_llvm_library are exported
by LLVM.  Instead users which don't need/can't be linked into libMLIR.so
can specify EXCLUDE_FROM_LIBMLIR

A common error mode is linking with LLVM libraries outside of LINK_COMPONENTS.
This almost always results in symbol confusion or multiply defined options
in LLVM when the same object file is included as a static library and
as part of libLLVM.so.  To catch these errors more directly, there's now
mlir_check_all_link_libraries.

To simplify usage of add_mlir_library, we assume that all mlir
libraries depend on LLVMSupport, so it's not necessary to separately specify
it.

tested with:
BUILD_SHARED_LIBS=on,
BUILD_SHARED_LIBS=off + LLVM_BUILD_LLVM_DYLIB,
BUILD_SHARED_LIBS=off + LLVM_BUILD_LLVM_DYLIB + LLVM_LINK_LLVM_DYLIB.

By: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Differential Revision: https://reviews.llvm.org/D79067

[MLIR] Move from using target_link_libraries to LINK_LIBS

This allows us to correctly generate dependencies for derived targets,
such as targets which are created for object libraries.

By: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Differential Revision: https://reviews.llvm.org/D79243

Three commits have been squashed to avoid intermediate build breakage.
2020-05-04 11:40:46 -07:00
Frederik Gossen 031265ad8a [MLIR] Add complex numbers to standard dialect
Add `CreateComplexOp`, `ReOp`, and `ImOp` to the standard dialect.
This is the first step to support complex numbers.

Differential Revision: https://reviews.llvm.org/D79159
2020-05-04 14:04:28 +00:00
Wen-Heng (Jack) Chung bc23c1d85e [mlir][rocdl] add rocdl.barier op.
- Add rocdl.barrier op.
- Lower gpu.barier to rocdl.barrier in -convert-gpu-to-rocdl.

Differential Revision: https://reviews.llvm.org/D79126
2020-05-04 10:35:01 +02:00
River Riddle 2265009fbe [mlir][GPUOpsLowering] Add missing include for FormatVariadic 2020-05-01 15:58:20 -07:00
Benjamin Kramer f9223d47e4 Remove unused variable. NFC. 2020-05-01 14:29:58 +02:00
MaheshRavishankar 43b89ecdb9 [mlir] Add sine operation to Standard dialect.
Also add lowering of sine operation to SPIR-V dialect.

Differential Revision: https://reviews.llvm.org/D79102
2020-04-30 22:15:42 -07:00
Hanhan Wang be0ad5b034 [mlir][StandardToSPIRV] Add support for lowering integer casting.
Summary:
Maps ZeroExtendIOp and TruncateIOp to spirv::UConvertOp and spirv::SConvertOp.

Depends On D78974

Differential Revision: https://reviews.llvm.org/D79143
2020-04-30 19:29:31 -07:00
Hanhan Wang 6601b65aed [mlir][StandardToSPIRV] Emulate bitwidths not supported for load op.
Summary:
The current implementation in SPIRVTypeConverter just unconditionally turns
everything into 32-bit if it doesn't meet the requirements of extensions or
capabilities. In this case, we can load a 32-bit value and then do bit
extraction to get the value.

Differential Revision: https://reviews.llvm.org/D78974
2020-04-30 19:27:45 -07:00
Wen-Heng (Jack) Chung 9ad5e57316 [mlir][nvvm][rocdl] refactor NVVM and ROCDL dialect. NFC.
- Extract common logic between -convert-gpu-to-nvvm and -convert-gpu-to-rocdl.
- Cope with the fact that alloca operates on different addrspaces between NVVM
  and ROCDL.
- Modernize unit tests for ROCDL dialect.

Differential Revision: https://reviews.llvm.org/D79021
2020-05-01 00:13:26 +02:00
Nicolas Vasilache 0d61dcf606 [mlir][EDSC] Make use of InsertGuard
Summary:
This revision cleans up a layer of complexity in ScopedContext and uses InsertGuard instead of previously manual bookkeeping.
The method `getBuilder` is renamed to `getBuilderRef` and spurious copies of OpBuilder are tracked.

This results in some canonicalizations not happening anymore in the Linalg matmul to vector test. This test is retired because relying on DRRs for this has been shaky at best. The solution will be better support to write fused passes in C++ with more idiomatic pattern composition and application.

Differential Revision: https://reviews.llvm.org/D79208
2020-04-30 18:04:31 -04:00
aartbik 6937251f01 [mlir] [VectorOps] Included i1 support for vector.print
Summary:
Added boolean support to vector.print.
Useful for upcoming "mask" tests.

Reviewers: ftynse, nicolasvasilache, andydavis1

Reviewed By: andydavis1

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, grosul1, frgossen, Kayjukh, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79198
2020-04-30 14:56:26 -07:00
Nicolas Vasilache 7a80139059 [mlir][Vector] Provide progressive lowering of masked n-D vector transfers
This revision allows masked vector transfers with m-D buffers and n-D vectors to
progressively lower to m-D buffer and 1-D vector transfers.

For a vector.transfer_read, assuming a `memref<(leading_dims) x (major_dims) x (minor_dims) x type>` and a `vector<(minor_dims) x type>` are involved in the transfer, this generates pseudo-IR resembling:
```
     if (any_of(%ivs_major + %offsets, <, major_dims)) {
       %v = vector_transfer_read(
         {%offsets_leading, %ivs_major + %offsets_major, %offsets_minor},
          %ivs_minor):
         memref<(leading_dims) x (major_dims) x (minor_dims) x type>,
         vector<(minor_dims) x type>;
     } else {
       %v = splat(vector<(minor_dims) x type>, %fill)
     }
```

Differential Revision: https://reviews.llvm.org/D79062
2020-04-29 21:28:27 -04:00
MaheshRavishankar 1c12a95d9c [mlir][StandardToSPIRV] Handle conversion of cmpi operation with i1
type operands.

The instructions used to convert std.cmpi cannot have i1 types
according to SPIR-V specification. A different set of operations are
specified in the SPIR-V spec for comparing boolean types. Enhance the
StandardToSPIRV lowering to target these instructions when operands to
std.cmpi operation are of i1 type.

Differential Revision: https://reviews.llvm.org/D79049
2020-04-29 10:09:03 -07:00
Wen-Heng (Jack) Chung f2b505a459 [mlir][std] allow subview take memrefs from non-zero addrspaces.
On certain targets std.subview should be able to take memrefs from non-zero
addrspaces. Improve lowering logic to llvm dialect and amend the tests.

Differential Revision: https://reviews.llvm.org/D79024
2020-04-29 17:19:27 +02:00
Wen-Heng (Jack) Chung be16075bfc [mlir][vector] let transfer_read and transfer_write take non-zero addrspace.
Enhance lowering logic and tests so vector.transfer_read and
vector.transfer_write take memrefs on non-zero addrspaces.

Differential Revision: https://reviews.llvm.org/D79023
2020-04-29 17:11:48 +02:00
Nicolas Vasilache 0c02106058 [mlir][EDSC] Retire OperationHandle
OperationHandle mostly existed to mirror the behavior of ValueHandle.
This has become unnecessary and can be retired.

Differential Revision: https://reviews.llvm.org/D78692
2020-04-29 00:32:44 -04:00
Alex Zinenko bb1d976feb [mlir][flang] use OpBuilder& instead of Builder* in <Op>::build methods
As we start defining more complex Ops, we increasingly see the need for
Ops-with-regions to be able to construct Ops within their regions in
their ::build methods. However, these methods only have access to
Builder, and not OpBuilder. Creating a local instance of OpBuilder
inside ::build and using it fails to trigger the operation creation
hooks in derived builders (e.g., ConversionPatternRewriter). In this
case, we risk breaking the logic of the derived builder. At the same
time, OpBuilder::create, which is by far the largest user of ::build
already passes "this" as the first argument, so an OpBuilder instance is
already available.

Update all ::build methods in all Ops in MLIR and Flang to take
"OpBuilder &" instead of "Builder *". Note the change from pointer and
to reference to comply with the common style in MLIR, this also ensures
all other users must change their ::build methods.

Differential Revision: https://reviews.llvm.org/D78713
2020-04-28 10:42:08 +02:00
Nicolas Vasilache b2c79c50ed [mlir][VectorOps] Extend VectorTransfer lowering to n-D memref with minor identity map
Summary: This revision extends the lowering of vector transfers to work with n-D memref and 1-D vector where the permutation map is an identity on the most minor dimensions (1 for now).

Differential Revision: https://reviews.llvm.org/D78925
2020-04-27 11:20:55 -04:00
Alexander Belyaev f31db760b3 [MLIR] Replace splitBlock() with createBlock in GenericAtomicRMWOp lowering.
`addArgument()` is not undoable and should not be used in
ConversionPattern, therefore replacing `splitBlock()` with
`createBlock()`, that creates a block with specified args.

Differential Revision: https://reviews.llvm.org/D78731
2020-04-25 17:42:45 +02:00
Nicolas Vasilache 367229e100 [mlir][EDSC] Retire ValueHandle
The EDSC discussion [thread](https://llvm.discourse.group/t/evolving-builder-apis-based-on-lessons-learned-from-edsc/879) points out that ValueHandle has become an unnecessary level of abstraction since MLIR switch from `Value *` to `Value` everywhere.

This revision removes this level of indirection.
2020-04-23 11:01:16 -04:00
Alexander Belyaev 21caba599e [MLIR] Lower GenericAtomicRMWOp to llvm.cmpxchg.
Summary:
Lowering is pretty much a copy of AtomicRMWOp -> llvm.cmpxchg
pattern.

Differential Revision: https://reviews.llvm.org/D78647
2020-04-23 09:29:34 +02:00
Denis Khalikov 1009177d49 [mlir][vulkan-runner] Add support for integer types.
Summary:
Add support for memrefs with element type as integer type
and simple test.

Differential Revision: https://reviews.llvm.org/D78560
2020-04-22 19:42:39 +03:00
Frederik Gossen 0372db05bb [MLIR] Use nested symbol to identify kernel in `LaunchFuncOp`.
Summary:
Use a nested symbol to identify the kernel to be invoked by a `LaunchFuncOp` in the GPU dialect.
This replaces the two attributes that were used to identify the kernel module and the kernel within seperately.

Differential Revision: https://reviews.llvm.org/D78551
2020-04-22 07:44:29 +00:00
Stephan Herhut c22876b550 [MLIR] Add extra locking during cubin generation.
We also need to lock the LLVMDialect mutex when initializing
LLVM targets or destroying llvm modules concurrently. Added another
scoped lock to that effect.

Differential Revision: https://reviews.llvm.org/D78580
2020-04-22 08:57:45 +02:00
Denis Khalikov a48f0a3c7e [mlir][vulkan-runner] Simplify vulkan launch call op.
Summary:
Workgroup size is written into the kernel. So to properly modelling
vulkan launch, we have to skip local workgroup size for vulkan launch
call op.

Differential Revision: https://reviews.llvm.org/D78307
2020-04-18 16:49:47 +03:00