Commit Graph

14107 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen 31af8bf1cc Remove <def,read-undef> flags from partial redefinitions.
The new coalescer can turn a full virtual register definition into a
partial redef by merging another value into an unused vector lane.

Make sure to clear the <read-undef> flag on such defs.

llvm-svn: 164807
2012-09-27 23:31:32 +00:00
Jakob Stoklund Olesen 8919aa508d Enable the new coalescer algorithm by default.
The new coalescer is better at merging values into unused vector lanes,
improving NEON code.

llvm-svn: 164794
2012-09-27 21:06:02 +00:00
Jakob Stoklund Olesen 4976d0df41 Don't dereference begin() on an empty vector.
The fix is obvious and the only test case I have is horrible, so I am
not including it. The problem shows up when self-hosting clang on i386
with -new-coalescer enabled.

llvm-svn: 164793
2012-09-27 21:05:59 +00:00
Jakob Stoklund Olesen 1d19582a8f Avoid dereferencing a NULL pointer.
Fixes PR13943.

llvm-svn: 164778
2012-09-27 16:34:19 +00:00
Sylvestre Ledru 91ce36c986 Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
llvm-svn: 164768
2012-09-27 10:14:43 +00:00
Sylvestre Ledru 721cffd53a Fix a typo 'iff' => 'if'
llvm-svn: 164767
2012-09-27 09:59:43 +00:00
Bill Wendling 863bab689a Remove the `hasFnAttr' method from Function.
The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.

llvm-svn: 164725
2012-09-26 21:48:26 +00:00
Craig Topper 2a6a08b1cd Rename virtual table anchors from Anchor() to anchor() for consistency with the rest of the tree.
llvm-svn: 164666
2012-09-26 06:36:36 +00:00
Bill Wendling 5def891396 Generate an error message instead of asserting or segfaulting when we have a
scalar-to-vector conversion that we cannot handle. For instance, when an invalid
constraint is used in an inline asm statement.
<rdar://problem/12284092>

llvm-svn: 164662
2012-09-26 06:16:18 +00:00
Bill Wendling 81406f692f Generate an error message instead of asserting or segfaulting when we have a
scalar-to-vector conversion that we cannot handle. For instance, when an invalid
constraint is used in an inline asm statement.
<rdar://problem/12284092>

llvm-svn: 164657
2012-09-26 04:04:19 +00:00
Sebastian Pop edb31faf92 TargetLowering interface to set/get minimum block entries for jump tables.
Provide interface in TargetLowering to set or get the minimum number of basic
blocks whereby jump tables are generated for switch statements rather than an
if sequence.

    getMinimumJumpTableEntries() defaults to 4.
    setMinimumJumpTableEntries() allows target configuration.

    This patch changes the default for the Hexagon architecture to 5
    as it improves performance on some benchmarks.

llvm-svn: 164628
2012-09-25 20:35:36 +00:00
Jim Grosbach 361ca34270 Mark jump tables in code sections with DataRegion directives.
Even out-of-line jump tables can be in the code section, so mark them
as data-regions for those targets which support the directives.

rdar://12362871&12362974

llvm-svn: 164571
2012-09-24 23:06:27 +00:00
Eric Christopher c1c8a1bb6a Have the DbgVariable "isArtificial" and "isObjectPointer" not
care about it being an argument variable so that we can decide
that captured block and lambda vars that don't happen to
be arguments could be an argument pointer.

Add the object pointer for one case onto the subprogram die.

rdar://12001329

llvm-svn: 164419
2012-09-21 22:18:52 +00:00
Evan Cheng b53825b82b Fix a significant recent(?) regression. StackSlotColoring no longer did anything
because LiveStackAnalysis was not preserved by VirtRegWriter. This caused
big stack usage regression in some cases.

rdar://12340383

llvm-svn: 164408
2012-09-21 20:04:28 +00:00
Bill Wendling 9be7759ee1 Make the 'get*AlignmentFromAttr' functions into member functions within the Attributes class. Now with fix.
llvm-svn: 164370
2012-09-21 15:26:31 +00:00
Jakob Stoklund Olesen b8707faba3 Ignore PHI-defs for -new-coalescer interference checks.
A PHI can't create interference on its own. If two live ranges interfere
at a PHI, they must also interfere when leaving one of the PHI
predecessors.

llvm-svn: 164330
2012-09-20 23:08:42 +00:00
Jakob Stoklund Olesen 09cd303655 Extend -new-coalescer SSA update to handle mapped values as well.
The old-fashioned many-to-one value mapping doesn't always work when
merging vector lanes. A value can map to multiple different values, and
it can even be necessary to insert new PHIs.

When a value number is defined by a copy from a value number that
required SSa update, include the live range of the copied value number
in the SSA update as well. It is not necessarily a copy of the original
value number any longer.

llvm-svn: 164329
2012-09-20 23:08:39 +00:00
Eric Christopher 3a3d529e0d Only emit DW_AT_object_pointer if this is a definition.
llvm-svn: 164326
2012-09-20 22:51:57 +00:00
Bill Wendling c727bacb38 Revert r164308 to fix buildbots.
llvm-svn: 164309
2012-09-20 16:59:57 +00:00
Bill Wendling abac66150c Make the 'get*AlignmentFromAttr' functions into member functions within the Attributes class.
llvm-svn: 164308
2012-09-20 16:27:05 +00:00
Nadav Rotem 841c9a84d0 Fix 80-col violations.
llvm-svn: 164297
2012-09-20 08:53:31 +00:00
Bill Wendling 3bef2dd5f9 Convert some attribute existence queries over to use the predicate methods.
llvm-svn: 164268
2012-09-19 23:54:18 +00:00
Bill Wendling d6b2688130 Add predicates for queries on whether an attribute exists.
llvm-svn: 164264
2012-09-19 23:35:21 +00:00
Jakob Stoklund Olesen 7d3c9c0a2a Resolve conflicts involving dead vector lanes for -new-coalescer.
A common coalescing conflict in vector code is lane insertion:

  %dst = FOO
  %src = BAR
  %dst:ssub0 = COPY %src

The live range of %src interferes with the ssub0 lane of %dst, but that
lane is never read after %src would have clobbered it. That makes it
safe to merge the live ranges and eliminate the COPY:

  %dst = FOO
  %dst:ssub0 = BAR

This patch teaches the new coalescer to resolve conflicts where dead
vector lanes would be clobbered, at least as long as the clobbered
vector lanes don't escape the basic block.

llvm-svn: 164250
2012-09-19 21:29:18 +00:00
Andrew Trick 6a35f197a7 comment typo
llvm-svn: 164180
2012-09-18 22:57:42 +00:00
Andrew Trick f2b70d9f3a TargetSchedule: cleanup computeOperandLatency logic & diagnostics.
llvm-svn: 164154
2012-09-18 18:20:02 +00:00
Andrew Trick 9b63513ac6 misched: Make ScheduleDAGInstrs use the TargetSchedule interface.
llvm-svn: 164153
2012-09-18 18:20:00 +00:00
Roman Divacky 5dd4ccb402 When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend
store this and use it to not emit long nops when the CPU is geode which
doesnt support them.

Fixes PR11212.

llvm-svn: 164132
2012-09-18 16:08:49 +00:00
Andrew Trick 6e6d597b1c TargetSchedModel API. Implement latency lookup, disabled.
llvm-svn: 164098
2012-09-18 04:03:34 +00:00
Craig Topper b1d83e8c72 Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.
llvm-svn: 164090
2012-09-18 02:01:41 +00:00
Evan Cheng c573599137 Fix some funky indentation.
llvm-svn: 164087
2012-09-18 01:34:40 +00:00
Jakob Stoklund Olesen 0bb3dd78c4 Merge into undefined lanes under -new-coalescer.
Add LIS::pruneValue() and extendToIndices(). These two functions are
used by the register coalescer when merging two live ranges requires
more than a trivial value mapping as supported by LiveInterval::join().

The pruneValue() function can remove the part of a value number that is
going to conflict in join(). Afterwards, extendToIndices can restore the
live range, using any new dominating value numbers and updating the SSA
form.

Use this complex value mapping to support merging a register into a
vector lane that has a conflicting value, but the clobbered lane is
undef.

llvm-svn: 164074
2012-09-17 23:03:25 +00:00
Jakob Stoklund Olesen af50f17df4 Stop adding <imp-def> operands when expanding REG_SEQUENCE.
These extra operands are not needed by register allocators using
VirtRegRewriter, and RAFast don't need them any longer.

By omitting the <imp-def> operands, it becomes possible for the new
register coalescer to track which lanes are valid and which are undef.

llvm-svn: 164073
2012-09-17 23:03:21 +00:00
Andrew Trick 8e7f202e32 Revert r164061-r164067. Most of the new subtarget emitter.
I have to work out the Target/CodeGen header dependencies
before putting this back.

llvm-svn: 164072
2012-09-17 23:00:42 +00:00
Andrew Trick f403ee7937 TargetSchedModel API. Implement latency lookup, disabled.
llvm-svn: 164065
2012-09-17 22:19:08 +00:00
Michael Ilseman 4f0e00a5b8 Increase the static sizes of some SmallSets. finalizeBundle() is very frequently called for some backends, and growing into an std::set is overkill for these numbers.
llvm-svn: 164044
2012-09-17 18:31:15 +00:00
Michael Ilseman 3a8336379c whitespace
llvm-svn: 164043
2012-09-17 18:25:23 +00:00
Michael Liao b503b323f3 Fix PR13859
- Preserve the original NOutVT during casting from vector to integer by
  extracting vector elements.

llvm-svn: 164042
2012-09-17 18:05:20 +00:00
Tom Stellard 86af62c1ad Add a MachinePostDominator pass
This is used in the AMDIL and R600 backends.

llvm-svn: 164029
2012-09-17 14:08:37 +00:00
Nadav Rotem 2ae810a51f Disable the protection from escaped allocas in an attempt to find violating passes. This may break the buildbots. I plan to revert it in a few hours.
llvm-svn: 164024
2012-09-17 10:21:55 +00:00
Craig Topper 04b4e83cf7 Fix bad comment. No functional change.
llvm-svn: 164000
2012-09-16 16:48:25 +00:00
Jakob Stoklund Olesen 17e2185543 Add alternative coalescing algorithm under a flag.
The live range of an SSA value forms a sub-tree of the dominator tree.
That means the live ranges of two values overlap if and only if the def
of one value lies within the live range of the other.

This can be used to simplify the interference checking a bit: Visit each
def in the two registers about to be joined. Check for interference
against the value that is live in the other register at the def point
only. It is not necessary to scan the set of overlapping live ranges,
this interference check can be done while computing the value mapping
required for the final live range join.

The new algorithm is prepared to handle more complicated conflict
resolution - We can allow overlapping live ranges with different values
as long as the differing lanes are undef or unused in the other
register.

The implementation in this patch doesn't do that yet, it creates code
that is nearly identical to the old algorithm's, except:

- The new stripCopies() function sees through multiple copies while
  the old RegistersDefinedFromSameValue() only can handle one.

- There are a few rare cases where the new algorithm can erase an
  IMPLICIT_DEF instuction that RegistersDefinedFromSameValue() couldn't
  handle.

llvm-svn: 163991
2012-09-16 02:15:36 +00:00
Craig Topper a60c0f1163 Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments.
llvm-svn: 163974
2012-09-15 17:09:36 +00:00
Jakob Stoklund Olesen b7d27a3dd7 Don't depend on kill flags in removeCopyByCommutingDef().
Kill flags are removed more and more aggressively during the register
allocation passes, it is better to get information from LiveIntervals.

llvm-svn: 163972
2012-09-15 16:32:11 +00:00
Andrew Trick d2a19da1b8 TargetSchedModel interface. To be implemented...
llvm-svn: 163934
2012-09-14 20:26:46 +00:00
Andrew Trick a2733e9549 misched: add a hook for custom DAG postprocessing.
llvm-svn: 163915
2012-09-14 17:22:42 +00:00
Duncan Sands 291d47efdf Remove silly dead store. Patch by Ettl Martin.
llvm-svn: 163882
2012-09-14 09:00:11 +00:00
Eric Christopher b83dba2b84 Fix both the test for zero and what we do if we have a zero for
umulo legalization.

Fixes PR13839

llvm-svn: 163856
2012-09-13 23:24:02 +00:00
Eric Christopher 3bc248176c Reformat, remove a couple unused variables and move some variables
closer to where they're needed.

llvm-svn: 163855
2012-09-13 23:23:58 +00:00
Michael Liao 460fc46e0f Enhance type legalization on bitcast from vector to integer
- Find a legal vector type before casting and extracting element from it.
- As the new vector type may have more than 2 elements, build the final
  hi/lo pair by BFS pairing them from bottom to top.

llvm-svn: 163830
2012-09-13 19:58:21 +00:00