Akira Hatanaka
d66f489640
MIPS DSP: other miscellaneous instructions.
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llvm-svn: 164845
2012-09-28 20:50:31 +00:00
Akira Hatanaka
334dad6aea
MIPS DSP: ADDUH.QB instruction sub-class.
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llvm-svn: 164840
2012-09-28 20:16:04 +00:00
Manman Ren
511c6d0369
X86: when replacing SUB with TEST in ISelDAGToDAG, only replace uses of the
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second output of SUB with first output of TEST.
PR13966
llvm-svn: 164835
2012-09-28 18:53:24 +00:00
Andrew Kaylor
5808c7d828
Removing dependency on third party library for Intel JIT event support.
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Patch committed on behalf of Kirill Uhanov
llvm-svn: 164831
2012-09-28 17:35:20 +00:00
Dmitri Gribenko
91c06da5f1
Replace the use of strncpy() and sprintf() with std::string and LLVM streams.
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Patch by Martinez, Javier E.
llvm-svn: 164822
2012-09-28 14:15:28 +00:00
Benjamin Kramer
255dea4b90
CorrelatedPropagation: BasicBlock::removePredecessor can simplify PHI nodes. If the it's the condition of a SwitchInst, reload it.
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Fixes PR13972.
llvm-svn: 164818
2012-09-28 10:42:50 +00:00
Benjamin Kramer
5651cbdc13
Make backtraces work again with both the configure and cmake build.
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llvm-svn: 164817
2012-09-28 10:10:46 +00:00
Benjamin Kramer
ed84360a45
GlobalOpt: non-constexpr bitcasts or GEPs can occur even if the global value is only stored once.
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Fixes PR13968.
llvm-svn: 164815
2012-09-28 10:01:27 +00:00
Nick Lewycky
156999f8b9
Surprisingly, we missed a trivial case here. Fix that!
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llvm-svn: 164814
2012-09-28 09:33:53 +00:00
Reed Kotler
210ebe93f3
1. Add load/store words from the stack
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2. As part of this, added assembly format FEXT_RI16_SP_explicit_ins and
moved other lines for FEXT_RI16 formats to be in the right place in the code.
3. Added mayLoad and mayStore assignements for the load/store instructions added and for ones already there that did not have this assignment.
4. Another patch will deal with the problem of load/store byte/halfword to the stack. This is a particular Mips16 problem.
llvm-svn: 164811
2012-09-28 02:26:24 +00:00
Jakob Stoklund Olesen
31af8bf1cc
Remove <def,read-undef> flags from partial redefinitions.
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The new coalescer can turn a full virtual register definition into a
partial redef by merging another value into an unused vector lane.
Make sure to clear the <read-undef> flag on such defs.
llvm-svn: 164807
2012-09-27 23:31:32 +00:00
Jakob Stoklund Olesen
8919aa508d
Enable the new coalescer algorithm by default.
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The new coalescer is better at merging values into unused vector lanes,
improving NEON code.
llvm-svn: 164794
2012-09-27 21:06:02 +00:00
Jakob Stoklund Olesen
4976d0df41
Don't dereference begin() on an empty vector.
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The fix is obvious and the only test case I have is horrible, so I am
not including it. The problem shows up when self-hosting clang on i386
with -new-coalescer enabled.
llvm-svn: 164793
2012-09-27 21:05:59 +00:00
Akira Hatanaka
a9183eda74
MIPS DSP: ABSQ_S.PH instruction sub-class.
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llvm-svn: 164787
2012-09-27 19:09:21 +00:00
Akira Hatanaka
892b1046c6
MIPS DSP: SHLL.QB instruction sub-class.
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llvm-svn: 164786
2012-09-27 19:05:08 +00:00
Benjamin Kramer
c2081d1c19
Fix a integer overflow in SimplifyCFG's look up table formation logic.
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If the width is very large it gets truncated from uint64_t to uint32_t when
passed to TD->fitsInLegalInteger. The truncated value can fit in a register.
This manifested in massive memory usage or crashes (PR13946).
llvm-svn: 164784
2012-09-27 18:29:58 +00:00
Jakob Stoklund Olesen
1d19582a8f
Avoid dereferencing a NULL pointer.
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Fixes PR13943.
llvm-svn: 164778
2012-09-27 16:34:19 +00:00
Sylvestre Ledru
91ce36c986
Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
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llvm-svn: 164768
2012-09-27 10:14:43 +00:00
Sylvestre Ledru
721cffd53a
Fix a typo 'iff' => 'if'
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llvm-svn: 164767
2012-09-27 09:59:43 +00:00
Nick Lewycky
7b4cd228aa
Prefer shuffles to selects. Backends love shuffles!
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llvm-svn: 164763
2012-09-27 08:33:56 +00:00
Jush Lu
47172a064f
[arm-fast-isel] Add support for ELF PIC.
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This is a preliminary step towards ELF support; currently ARMFastISel hasn't
been used for ELF object files yet.
llvm-svn: 164759
2012-09-27 05:21:41 +00:00
Akira Hatanaka
314b43b781
MIPS DSP: rddsp (instruction which reads DSPControl register fields to a GPR).
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llvm-svn: 164756
2012-09-27 04:08:42 +00:00
Akira Hatanaka
b664ae67ce
MIPS DSP: CMPU.EQ.QB instruction sub-class.
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llvm-svn: 164755
2012-09-27 03:58:34 +00:00
Akira Hatanaka
d09642beb3
MIPS DSP: ADDU.QB instruction sub-class.
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llvm-svn: 164754
2012-09-27 03:13:59 +00:00
Akira Hatanaka
e4bd054f98
MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction.
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llvm-svn: 164751
2012-09-27 02:15:57 +00:00
Akira Hatanaka
9061a46443
MIPS DSP: all the remaining instructions which read or write accumulators.
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llvm-svn: 164750
2012-09-27 02:11:20 +00:00
Akira Hatanaka
1babeaa44c
MIPS DSP: add support for extract-word instructions.
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llvm-svn: 164749
2012-09-27 02:05:42 +00:00
Akira Hatanaka
ecabd1a5d2
MIPS DSP: add functions which decode DSP and accumulator registers.
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llvm-svn: 164748
2012-09-27 02:01:10 +00:00
Akira Hatanaka
42a352485b
MIPS DSP: add code necessary for pseudo instruction lowering.
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llvm-svn: 164747
2012-09-27 01:59:07 +00:00
Akira Hatanaka
de8231eada
MIPS DSP: add bitcast patterns between vectors and int.
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No test cases. These patterns will get tested along with dsp intrinsics.
llvm-svn: 164746
2012-09-27 01:56:38 +00:00
Akira Hatanaka
5eeac4f813
MIPS DSP: add vector load/store patterns.
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llvm-svn: 164744
2012-09-27 01:50:59 +00:00
Andrew Kaylor
c091ea33f0
Fix of hang during Intel JIT profiling
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Committed on behalf of Kirill Uhanov
llvm-svn: 164736
2012-09-26 23:43:56 +00:00
Nick Lewycky
2e646236fb
Disable the new SROA pass to get the tree back in working order. We don't yet
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have testcases for the current problems.
llvm-svn: 164731
2012-09-26 22:43:04 +00:00
Dan Gohman
099727fa4c
Add IRBuilder code for adding !tbaa.struct metadata tags to llvm.memcpy calls.
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llvm-svn: 164728
2012-09-26 22:17:14 +00:00
Bill Wendling
e2ce1bb172
Query the parameter attributes directly instead of using the Attribute symbols.
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llvm-svn: 164727
2012-09-26 22:15:19 +00:00
Bill Wendling
863bab689a
Remove the `hasFnAttr' method from Function.
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The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.
llvm-svn: 164725
2012-09-26 21:48:26 +00:00
Jim Grosbach
c03a0c241e
X86_32: Large Symbol+Offset relocations.
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If the offset is more than 24-bits, it won't fit in a scattered
relocation offset field, so we fall back to using a non-scattered
relocation.
rdar://12358909
llvm-svn: 164724
2012-09-26 21:27:45 +00:00
Bill Wendling
e38b804d07
Initial commit for the AttributesImpl class.
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This opaque class will contain all of the attributes. All attribute queries will
go through this object. This object will also be uniqued in the LLVMContext.
Currently not used, so no implementation change.
llvm-svn: 164722
2012-09-26 21:07:29 +00:00
Akira Hatanaka
7fc726539f
Add case clauses for returning dsp accumulator encoding values in function
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getMipsRegisterNumbering.
llvm-svn: 164720
2012-09-26 19:27:24 +00:00
Akira Hatanaka
e3f79e5505
Add DSP accumulator registers and register class. Remove hi/lo registers.
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llvm-svn: 164719
2012-09-26 19:25:21 +00:00
Akira Hatanaka
8a69b892da
Delete member MipsFunctionInfo::OutArgFIRange and code that accesses it.
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llvm-svn: 164718
2012-09-26 19:18:19 +00:00
Benjamin Kramer
9d6063ab55
Add support for detecting some corei7-class Xeons.
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llvm-svn: 164714
2012-09-26 18:21:47 +00:00
Duncan Sands
8598a0ec80
Now that invoke of an intrinsic is possible (for the llvm.do.nothing intrinsic)
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teach the callgraph logic to not create callgraph edges to intrinsics for invoke
instructions; it already skips this for call instructions. Fixes PR13903.
llvm-svn: 164707
2012-09-26 17:16:01 +00:00
Benjamin Kramer
8fb58f6bf0
YAMLParser: Fix invalid reads when encountering incorrectly quoted scalar.
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Fixes PR12632.
llvm-svn: 164701
2012-09-26 15:52:15 +00:00
Benjamin Kramer
c38fab2013
APFloat::roundToIntegral: Special values don't keep the exponent value up to date, don't rely on it.
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Add a couple of unit tests for special floats. Fixes 13929, found by MemorySanitizer.
llvm-svn: 164698
2012-09-26 14:06:58 +00:00
Hans Wennborg
cd3a11f725
Address Duncan's comments on r164684:
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- Put statistics in alphabetical order
- Don't use getZextValue when building TableInt, just use APInts
- Introduce Create{Z,S}ExtOrTrunc in IRBuilder.
llvm-svn: 164696
2012-09-26 14:01:53 +00:00
Hans Wennborg
f2e2c108dd
Address Duncan's comments on r164682:
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- Finish assert messages with exclamation mark
- Move overflow checking into ShouldBuildLookupTable.
llvm-svn: 164692
2012-09-26 11:07:37 +00:00
Chandler Carruth
208124f5a2
Analogous fix to memset and memcpy rewriting. Don't have a test case
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contrived for these yet, as I spotted them by inspection and the test
cases are a bit more tricky to phrase.
llvm-svn: 164691
2012-09-26 10:59:22 +00:00
Chandler Carruth
3e4273dd0c
When rewriting the pointer operand to a load or store which has
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alignment guarantees attached, re-compute the alignment so that we
consider offsets which impact alignment.
llvm-svn: 164690
2012-09-26 10:45:28 +00:00
Chandler Carruth
871ba7249c
Teach all of the loads, stores, memsets and memcpys created by the
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rewriter in SROA to carry a proper alignment. This involves
interrogating various sources of alignment, etc. This is a more complete
and principled fix to PR13920 as well as related bugs pointed out by Eli
in review and by inspection in the area.
Also by inspection fix the integer and vector promotion paths to create
aligned loads and stores. I still need to work up test cases for
these... Sorry for the delay, they were found purely by inspection.
llvm-svn: 164689
2012-09-26 10:27:46 +00:00