llvm-project

Commit Graph

Author	SHA1	Message	Date
Aleksandar Beserminji	3239ba8c0e	[mips] Fix atomic operations at O0, v3 Similar to PR/25526, fast-regalloc introduces spills at the end of basic blocks. When this occurs in between an ll and sc, the stores can cause the atomic sequence to fail. This patch fixes the issue by introducing more pseudos to represent atomic operations and moving their lowering to after the expansion of postRA pseudos. This version addresses issues with the initial implementation and covers all atomic operations. This resolves PR/32020. Thanks to James Cowgill for reporting the issue! Patch By: Simon Dardis Differential Revision: https://reviews.llvm.org/D31287 llvm-svn: 336328	2018-07-05 09:27:05 +00:00
Jozef Kolek	3b8ddb665b	[mips][microMIPS] This patch implements functionality in MIPS delay slot filler such as if delay slot filler have to put NOP instruction into the delay slot of microMIPS BEQ or BNE instruction which uses the register $0, then instead of emitting NOP this instruction is replaced by the corresponding microMIPS compact branch instruction, i.e. BEQZC or BNEZC. Differential Revision: http://reviews.llvm.org/D3566 llvm-svn: 222580	2014-11-21 22:04:35 +00:00
Zoran Jovanovic	285cc289e8	Fixed operand of SC microMIPS instruction. llvm-svn: 202526	2014-02-28 18:22:56 +00:00

Author

SHA1

Message

Date

Aleksandar Beserminji

3239ba8c0e

[mips] Fix atomic operations at O0, v3

Similar to PR/25526, fast-regalloc introduces spills at the end of basic
blocks. When this occurs in between an ll and sc, the stores can cause the
atomic sequence to fail.

This patch fixes the issue by introducing more pseudos to represent atomic
operations and moving their lowering to after the expansion of postRA
pseudos.

This version addresses issues with the initial implementation and covers
all atomic operations.

This resolves PR/32020.

Thanks to James Cowgill for reporting the issue!

Patch By: Simon Dardis

Differential Revision: https://reviews.llvm.org/D31287

llvm-svn: 336328

2018-07-05 09:27:05 +00:00

Jozef Kolek

3b8ddb665b

[mips][microMIPS] This patch implements functionality in MIPS delay slot

filler such as if delay slot filler have to put NOP instruction into the
delay slot of microMIPS BEQ or BNE instruction which uses the register $0,
then instead of emitting NOP this instruction is replaced by the corresponding
microMIPS compact branch instruction, i.e. BEQZC or BNEZC.

Differential Revision: http://reviews.llvm.org/D3566

llvm-svn: 222580

2014-11-21 22:04:35 +00:00

Zoran Jovanovic

285cc289e8

Fixed operand of SC microMIPS instruction.

llvm-svn: 202526

2014-02-28 18:22:56 +00:00

3 Commits