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Author SHA1 Message Date
Craig Topper 04370d3a82 [X86] Disable _mm512_maskz_set1_epi64 intrinsic on 32-bit targets to prevent a backend isel failure. 
The __builtin_ia32_pbroadcastq512_mem_mask we were previously trying to use in 32-bit mode is not implemented in the x86 backend and causes isel to fail in release builds. In debug builds it fails even earlier during legalization with an llvm_unreachable.

While there add the missing test case for this intrinsic for this for 64-bit mode.

This fixes PR34631. D37668 should be able to recover this for 32-bit mode soon. But I wanted to fix the crash ahead of that.

llvm-svn: 313392
 2017-09-15 20:27:59 +00:00
Simon Pilgrim 1ba2bf2162 [X86][AVX512] _mm512_stream_load_si512 should take a void const* argument (PR33977) 
Based off the Intel Intrinsics guide, we should expect a void const* argument.

Prevents 'passing 'const void *' to parameter of type 'void *' discards qualifiers' warnings.

Differential Revision: https://reviews.llvm.org/D37449

llvm-svn: 312523
 2017-09-05 10:06:41 +00:00
Simon Pilgrim c14865c0c5 [X86][AVX] Ensure vector non-temporal load/store intrinsics force pointer alignment (PR33830) 
Clang specifies a max type alignment of 16 bytes on darwin targets (annoyingly in the driver not via cc1), meaning that the builtin nontemporal stores don't correctly align the loads/stores to 32 or 64 bytes when required, resulting in lowering to temporal unaligned loads/stores.

This patch casts the vectors to explicitly aligned types prior to the load/store to ensure that the require alignment is respected.

Differential Revision: https://reviews.llvm.org/D35996

llvm-svn: 309488
 2017-07-29 15:33:34 +00:00
Simon Pilgrim 0b37ffbbf9 Strip trailing whitespace. NFCI. 
llvm-svn: 309383
 2017-07-28 14:01:51 +00:00
Simon Pilgrim 96d02f5503 [X86][AVX] Added support for _mm256_zext* helper intrinsics (PR32839) 
llvm-svn: 301749
 2017-04-29 17:17:06 +00:00
Simon Pilgrim 9f6e79c5e4 [X86][SSE] Update MOVNTDQA non-temporal loads to generic implementation (clang) 
MOVNTDQA non-temporal aligned vector loads can be correctly represented using generic builtin loads, allowing us to remove the existing x86 intrinsics.

LLVM companion patch: D31767.

Differential Revision: https://reviews.llvm.org/D31766

llvm-svn: 300326
 2017-04-14 15:05:57 +00:00
Craig Topper bf82498301 [AVX-512] Fix a couple more intrinsic macros I missed in r299346. 
llvm-svn: 299347
 2017-04-03 03:51:57 +00:00
Craig Topper ac9959eb53 [AVX-512] Fix some intrinsic macros that use the wrong macro parameter names and don't have parentheses around them. 
Thanks to Matthew Barr for reporting this issue.

llvm-svn: 299346
 2017-04-03 03:41:29 +00:00
Simon Pilgrim 60e924985c [X86][AVX512] Add _mm512_cvtsd_f64 and _mm512_cvtss_f32 intrinsics (PR32305) 
Differential Revision: https://reviews.llvm.org/D31155

llvm-svn: 298364
 2017-03-21 12:46:13 +00:00
Igor Breger f050b797ac [X86][AVX512][Clang][Intrinsics] Adding missing intrinsics to Clang . 
Summary:
Adding missing intrinsics :
    _mm512_set_epi16,
    _mm512_set_epi8,
    _mm512_permutevar_epi32
    _mm512_mask_permutevar_epi32

Reviewers: zvi, guyblank, eladcohen, craig.topper

Reviewed By: craig.topper

Subscribers: craig.topper, cfe-commits

Differential Revision: https://reviews.llvm.org/D31034

llvm-svn: 298208
 2017-03-19 08:27:16 +00:00
Craig Topper 6afc436a78 [AVX-512] Change the input type for some load intrinsics to take void type like the spec (and the test cases say). 
llvm-svn: 298042
 2017-03-17 05:59:25 +00:00
Craig Topper 2e5058c403 [AVX-512] Add missing typecasts and parentheses to _mm512_mask_i64gather_ps. My macro cleanup script I used on the others last year must have missed it. 
llvm-svn: 298040
 2017-03-17 05:14:37 +00:00
Craig Topper 367c86ddbe [AVX-512] Replace subvector broadcast builtins with shufflevectors and selects. 
Verified that the backend codegens this equally well.

llvm-svn: 292329
 2017-01-18 02:17:10 +00:00
Craig Topper 70536f4e47 [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects. 
llvm-svn: 290580
 2016-12-27 04:04:57 +00:00
Craig Topper 32866ab800 Revert r290574 "foo" 
This was supposed to be merged with another commit with a real commit message. Sorry.

llvm-svn: 290579
 2016-12-27 04:03:29 +00:00
Craig Topper c5ab78d4c3 Revert r290575 "[AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects." 
I failed to merge this with r290574.

llvm-svn: 290578
 2016-12-27 04:03:25 +00:00
Craig Topper 6ad5bcc8ac [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects. 
llvm-svn: 290575
 2016-12-27 03:46:16 +00:00
Craig Topper 39b9e32493 foo 
llvm-svn: 290574
 2016-12-27 03:46:13 +00:00
Craig Topper 678b07fe3c [AVX-512] Remove masking from 512-bit vpermil builtins. The backend now has versions without masking so wrap it with select. 
This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking.

llvm-svn: 289351
 2016-12-11 01:26:52 +00:00
Craig Topper 6aefe00ccf [X86] Replace valignd/q builtins with appropriate __builtin_shufflevector. 
llvm-svn: 287733
 2016-11-23 01:47:12 +00:00
Simon Pilgrim 698528d83b [X86][AVX512] Replace lossless i32/u32 to f64 conversion intrinsics with generic IR 
Both the (V)CVTDQ2PD (i32 to f64) and (V)CVTUDQ2PD (u32 to f64) conversion instructions are lossless and can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics without affecting final codegen.

This patch removes the clang builtins and their use in the headers - a future patch will deal with removing the llvm intrinsics.

This is an extension patch to D20528 which dealt with the equivalent sse/avx cases.

Differential Revision: https://reviews.llvm.org/D26686

llvm-svn: 287088
 2016-11-16 09:27:40 +00:00
Craig Topper 5e0709d60b [AVX-512] Replace masked dword and qword variable shift builtins with unmasked builtins and a select. 
This is part of a set of changes to allow InstCombine in the backend to optimize variable shifts without having to know about masking.

llvm-svn: 286757
 2016-11-13 07:26:34 +00:00
Craig Topper d7e5b21914 [X86] Remove extra escaped new lines in intrinsic headers left over from an earlier conversion away from a macro. NFC 
llvm-svn: 286756
 2016-11-13 07:26:31 +00:00
Craig Topper 2c8f49e67b [AVX-512] Use scalar vfmsub/vfnmsub mask3 intrinsics instead of inverting the mask argument of a vfmadd intrinsic. 
Summary: Inverting the mask argument does not reflect the intended semantics of the intrinsic.

Reviewers: igorb, delena

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D26019

llvm-svn: 286733
 2016-11-12 23:24:34 +00:00
Craig Topper 1a44193afd [AVX-512] Convert the rest of the masked shift by immediate and by single element builtins over to the newly added unmasked builtins and a select. 
This should also fix PR30691 since the new builtins are handled like the legacy builtins in the backend.

llvm-svn: 286714
 2016-11-12 07:16:59 +00:00
Ayman Musa e60a41ca28 [X86][AVX512][Clang] Add support for mask_{move|store|load}_s{s/d} and int2mask/mask2int intrinsics. 
Differential Revision: https://reviews.llvm.org/D26021

llvm-svn: 286229
 2016-11-08 12:00:30 +00:00
Craig Topper 08bf53ffda [AVX-512] Remove masked vector insert builtins and replace with native shufflevectors and selects. 
Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.

llvm-svn: 285667
 2016-11-01 05:47:56 +00:00
Craig Topper 93ffabd28d [AVX-512] Remove masked vector extract builtins and replace with native shufflevectors and selects. 
Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.

llvm-svn: 285540
 2016-10-31 04:30:56 +00:00
Michael Zuckerman d343697f1e Fixing "type" issue for (epi32) 
and replaceing hardcoded inf with clang builtin inf "__builtin_inff()" for float ({max|min}_{pd|ps})

llvm-svn: 285519
 2016-10-30 14:54:05 +00:00
Michael Zuckerman 25eb420233 [X86][AVX512][Clang][Intrinsics][reduce] Adding missing reduce (max|min) intrinsics to Clang . 
After LGTM and Check-all 

Vector-reduction arithmetic accepts vectors as inputs and produces 
scalars as outputs.This class of vector operation forms the basis 
of many scientific computations. In vector-reduction arithmetic, 
the evaluation off is independent of the order of the input elements of V.

Reviewer: 1. craig.topper 
          2. igorb

Differential Revision: https://reviews.llvm.org/D25988

llvm-svn: 285493
 2016-10-29 10:29:20 +00:00
Michael Zuckerman edd99eb07a 1. Fixing small types issue (PD|PS) (reduce) . 
2. Cosmetic changes

llvm-svn: 285405
 2016-10-28 15:16:03 +00:00
Craig Topper f202365910 [AVX-512] Fix the operand order for all calls to __builtin_ia32_vfmaddss3_mask. 
Summary: The preserved input should be the first argument and the vector inputs should be in the same order as the intrinsics it is used to implement.

Reviewers: igorb, delena

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25902

llvm-svn: 285175
 2016-10-26 05:35:38 +00:00
Michael Zuckerman facb37cabf [X86][AVX512][Clang][Intrinsics][reduce] Adding missing reduce (Operators: +,*,&&,||) intrinsics to Clang 
Committed after LGTM and check-all

 
Vector-reduction arithmetic accepts vectors as inputs and produces scalars as outputs.
This class of vector operation forms the basis of many scientific computations.
In vector-reduction arithmetic, the evaluation off is independent of the order of the input elements of V.
 
Used bisection method. At each step, we partition the vector with previous
step in half, and the operation is performed on its two halves.
This takes log2(n) steps where n is the number of elements in the vector.
 
Reviwer: 1. igorb
         2. craig.topper    
Differential Revision: https://reviews.llvm.org/D25527

llvm-svn: 285054
 2016-10-25 07:56:04 +00:00
Michael Zuckerman 33bd5b235b revert r284963 
because new test file is failing in some OS.
test/CodeGen/avx512-reduceIntrin.c

llvm-svn: 284967
 2016-10-24 11:30:23 +00:00
Michael Zuckerman 98cb041891 [X86][AVX512][Clang][Intrinsics][reduce] Adding missing reduce (Operators: +,*,&&,||) intrinsics to Clang 
Committed after LGTM and check-all

Vector-reduction arithmetic accepts vectors as inputs and produces scalars as outputs.
This class of vector operation forms the basis of many scientific computations.
In vector-reduction arithmetic, the evaluation off is independent of the order of the input elements of V.

Used bisection method. At each step, we partition the vector with previous
step in half, and the operation is performed on its two halves.
This takes log2(n) steps where n is the number of elements in the vector.

Differential Revision: https://reviews.llvm.org/D25527

llvm-svn: 284963
 2016-10-24 10:53:20 +00:00
Craig Topper 0c5da26572 [AVX-512] Replace 512-bit pmovzx/sx builtins with native IR. 
llvm-svn: 284936
 2016-10-23 07:35:47 +00:00
Michael Zuckerman 9e43ccfe68 [Clang][AVX512][BuiltIn]Adding missing intrinsics move_{sd|ss} to clang 
Differential Revision: http://reviews.llvm.org/D21021

llvm-svn: 283314
 2016-10-05 12:56:06 +00:00
Craig Topper c4a8228bcc [AVX-512] Use native IR for masked 512-bit add/sub/mul/div ps/pd intrinsics when rounding mode isn't used. 
llvm-svn: 283073
 2016-10-02 17:43:00 +00:00
Ayman Musa 17a2819b05 Update to commit r282488, fix the buildboot failure. 
llvm-svn: 282492
 2016-09-27 15:37:31 +00:00
Ayman Musa 2e250e8845 [avx512] Add aliases to some missing avx512 intrinsics. 
Differential Revision:https: //reviews.llvm.org/D24961

llvm-svn: 282488
 2016-09-27 14:06:32 +00:00
Craig Topper f43e4a1728 [AVX-512] Remove masked integer mullo builtins and replace with native IR. 
llvm-svn: 280597
 2016-09-03 19:19:49 +00:00
Craig Topper 0e18976b8d [AVX-512] Remove masked integer add/sub builtins and replace with native IR. 
llvm-svn: 280596
 2016-09-03 18:29:35 +00:00
Asaf Badouh 356bb76809 [X86][AVX512F] minor fix of the parameter names 
add "__" prefix

Bug 28842 https://llvm.org/bugs/show_bug.cgi?id=29040

Differential Revision: https://reviews.llvm.org/D23753


 

llvm-svn: 279392
 2016-08-21 07:56:47 +00:00
Asaf Badouh 2f344b788c [AVX512] integer comparisions enumeration. 
fix Bug 28842 https://llvm.org/bugs/show_bug.cgi?id=28842

Differential Revision: https://reviews.llvm.org/D22212

 

llvm-svn: 277955
 2016-08-07 10:43:04 +00:00
Eric Christopher b638558e12 Remove unused variable. 
Fixes PR28761.

llvm-svn: 277221
 2016-07-29 22:11:11 +00:00
Craig Topper 45db56c375 [X86] Add missing __x86_64__ qualifiers on a bunch of intrinsics that assume 64-bit GPRs are available. 
Usages of these intrinsics in a 32-bit build results in assertions in the backend.

llvm-svn: 276249
 2016-07-21 07:38:39 +00:00
Asaf Badouh a0b6f8fb56 [X86][AVX512F] minor fix of the parameter names 
add "__" prefix

llvm-svn: 275384
 2016-07-14 08:40:30 +00:00
Craig Topper 4d61a3c2d8 [AVX512] Replace masked AND/OR/XOR intrinsics with native code and remove the builtins. 
llvm-svn: 275049
 2016-07-11 06:14:18 +00:00
Craig Topper 6e76fb61a7 [X86] Use __butilin_shufflevector for 512-bit shufps intrinsics. 
llvm-svn: 275012
 2016-07-10 05:57:21 +00:00
Simon Pilgrim f5a8837e1b [X86][AVX512] Converted the VBROADCAST intrinsics to generic IR 
llvm-svn: 274544
 2016-07-05 12:59:33 +00:00
Asaf Badouh 136332888a [X86][AVX512F] add float/double abs intrinsics 
add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic

Differential Revision: http://reviews.llvm.org/D21973

llvm-svn: 274542
 2016-07-05 12:24:14 +00:00
Asaf Badouh f9cdb8de7a [AVX512] minor fix in sqrt{ss|sd} intrinsics arguments 
Differential Revision: http://reviews.llvm.org/D21988

llvm-svn: 274541
 2016-07-05 11:36:21 +00:00
Craig Topper 2a383c9273 [X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. 
llvm-svn: 274525
 2016-07-04 22:18:01 +00:00
Simon Pilgrim 427154db2a [X86][AVX512] Converted the VSHUFPD intrinsics to generic IR 
llvm-svn: 274523
 2016-07-04 21:30:47 +00:00
Simon Pilgrim 30db811526 [X86][AVX512] Converted the VPERMPD/VPERMQ intrinsics to generic IR 
llvm-svn: 274502
 2016-07-04 13:34:44 +00:00
Simon Pilgrim 17388f2569 [X86][AVX512] Converted the VPERMILPD/VPERMILPS intrinsics to generic IR 
llvm-svn: 274492
 2016-07-04 11:06:15 +00:00
Simon Pilgrim 275d721485 [X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to generic IR 
llvm companion patch imminent

llvm-svn: 274442
 2016-07-02 17:16:25 +00:00
Craig Topper 79f53ca0b5 [AVX512] Replace masked unpack builtins with shufflevector and selects. 
llvm-svn: 273533
 2016-06-23 06:36:42 +00:00
Michael Zuckerman 223676d2cc [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps 
Differential Revision: http://reviews.llvm.org/D20626

llvm-svn: 272658
 2016-06-14 12:38:58 +00:00
Asaf Badouh 880f0c252b [X86][AVX512F] bugfix - sqrtps should get __mask16 as mask parameter 
CR: Michael Zuckerman
llvm-svn: 272549
 2016-06-13 15:15:57 +00:00
Simon Pilgrim beca5f295c [Clang][X86] Convert non-temporal store builtins to generic __builtin_nontemporal_store in headers 
We can now use __builtin_nontemporal_store instead of target specific builtins for naturally aligned nontemporal stores which avoids the need for handling in CGBuiltin.cpp

The scalar integer nontemporal (unaligned) store builtins will have to wait as __builtin_nontemporal_store currently assumes natural alignment and doesn't accept the 'packed struct' trick that we use for normal unaligned load/stores.

The nontemporal loads require further backend support before we can safely convert them to __builtin_nontemporal_load

Differential Revision: http://reviews.llvm.org/D21272

llvm-svn: 272540
 2016-06-13 09:57:52 +00:00
Craig Topper 7cc9263ec2 [AVX512] Implement masked and 512-bit pshufd intrinsics directly with __builtin_shufflevector and __builtin_ia32_select. 
llvm-svn: 272467
 2016-06-11 12:50:19 +00:00
Craig Topper 3a0c7260f4 [X86] Add void to the argument list of intrinsics that don't take arguments since empty argument list mean something else in C. 
llvm-svn: 272244
 2016-06-09 05:14:28 +00:00
Igor Breger aadb876200 [AVX512] Emit select instruction instead of using x86 specific instrinsics. 
This will allow us to remove the x86 instrinics from the backend.

Differential Revision: http://reviews.llvm.org/D21060

llvm-svn: 272141
 2016-06-08 13:59:20 +00:00
Craig Topper f3efec65bb [AVX512] Reformat macro intrinsics, ensure arguments have proper typecasts, ensure result is typecasted back to the generic types. 
llvm-svn: 272119
 2016-06-08 06:08:07 +00:00
Craig Topper 605894985f [X86] Put parentheses around macro arguments in intrinsics. 
llvm-svn: 272118
 2016-06-08 06:08:04 +00:00
Michael Zuckerman 95721ac863 [Clang][AVX512]Adding set4 intrinsics 
Differential Revision: http://reviews.llvm.org/D20866

llvm-svn: 271835
 2016-06-05 15:43:30 +00:00
Michael Zuckerman f36f6eb036 [Clang][AVX512][Intrinsics] Adding two definitions _mm512_setzero and _mm512_setzero_epi32 
Differential Revision: http://reviews.llvm.org/D20871

llvm-svn: 271832
 2016-06-05 15:12:52 +00:00
Craig Topper 6a77b62640 [X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. 
This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today.

llvm-svn: 271778
 2016-06-04 05:43:41 +00:00
Asaf Badouh 89f657611c [X86][AVX512] add intrinsics of Scalar FP to integer 
Differential Revision: http://reviews.llvm.org/D20861

llvm-svn: 271499
 2016-06-02 08:11:35 +00:00
Michael Zuckerman 6170c15fc6 [Clang][Intrinsics][avx512] Continue Adding round cvt to clang 
And remove trailing spaces in intrinsic f test
Differential Revision: http://reviews.llvm.org/D20810

llvm-svn: 271398
 2016-06-01 14:41:41 +00:00
Michael Zuckerman e6aa66a53d [Clang][Intrinsics][avx512] Adding round intrinsics fot max/min/sqrt instruction set to clang 
Differential Revision: http://reviews.llvm.org/D20812

llvm-svn: 271373
 2016-06-01 08:34:03 +00:00
Michael Zuckerman c301c194ec [Clang][Intrinsics][avx512] Adding round roundscale to clang 
Differential Revision: http://reviews.llvm.org/D20815

llvm-svn: 271368
 2016-06-01 07:35:44 +00:00
Michael Zuckerman 186d86738d [Clang][Intrinsics][avx512] Adding round cvt to clang 
Differential Revision: http://reviews.llvm.org/D20790

llvm-svn: 271265
 2016-05-31 11:27:34 +00:00
Michael Zuckerman 9fcf3552ad [Clang][avx512][builtin] Adding missing intrinsics for cvt 
Differential Revision: http://reviews.llvm.org/D20618

llvm-svn: 271205
 2016-05-30 13:22:12 +00:00
Ekaterina Romanova 5a7f09c5af Clean up: remove trailing spaces in x86 intrinsic headers. 
Differential Revision: http://reviews.llvm.org/D20614

llvm-svn: 271077
 2016-05-28 00:18:59 +00:00
Michael Zuckerman 22c47e606a Adding missing _mm512_castsi512_si256 intrinsic. 
llvm-svn: 270851
 2016-05-26 14:32:11 +00:00
Michael Zuckerman 6f08cebf36 [Clang][AVX512][BUILTIN] Adding intrinsics for set1 
Differential Revision: http://reviews.llvm.org/D20562

llvm-svn: 270825
 2016-05-26 06:54:52 +00:00
Michael Zuckerman d5cc6cd262 [Clang][AVX512][BUILTIN] Add missing intrinsics for cast 
Differential Revision: http://reviews.llvm.org/D20523

llvm-svn: 270699
 2016-05-25 14:04:21 +00:00
Michael Zuckerman e6542002fc [Clang][AVX512][BUILTIN]adding missing intrinsics for movdaq instruction set 
Differential Revision: http://reviews.llvm.org/D20514

llvm-svn: 270401
 2016-05-23 08:01:48 +00:00
Michael Zuckerman 178113e8cc [Clang][AVX512][intrinsics] continue completing missing set intrinsics 
Differential Revision: http://reviews.llvm.org/D20160

llvm-svn: 270047
 2016-05-19 12:07:49 +00:00
Michael Zuckerman 2cacc35343 [Clang][AVX512] completing missing intrinsics [pandnd]. 
Differential Revision: http://reviews.llvm.org/D20101

llvm-svn: 269939
 2016-05-18 15:25:53 +00:00
Craig Topper 8c18e1120d [AVX512] Add parentheses around macro arguments in AVX512F intrinsics. Remove leading underscores from macro argument names. Add explicit typecasts to all macro arguments and return values. And finally reformat after all the adjustments. 
This is a mostly mechanical change accomplished with a script. I tried to split out any changes to the typecasts that already existed into separate commits.

llvm-svn: 269746
 2016-05-17 04:41:50 +00:00
Craig Topper 58187d33b7 [AVX512] Correct types for scalar double precision FMA intrinsics and single precision getexp intrinsics. 
llvm-svn: 269737
 2016-05-17 04:41:29 +00:00
Michael Zuckerman bf05a4589e [Clang][AVX512] completing missing intrinsics for [vpabs] instruction set 
Differential Revision: http://reviews.llvm.org/D20069

llvm-svn: 269680
 2016-05-16 18:57:24 +00:00
Michael Zuckerman cb85677471 [Clang][AVX512] completing missing intrinsics [vsqrt|vrsqrt|vrcp14 ]. 
Differential Revision: http://reviews.llvm.org/D20068

llvm-svn: 269649
 2016-05-16 11:42:01 +00:00
Craig Topper 9c6c85f1ad [AVX512] Add typecasts to some intrinsics to avoid doing operations on the __m512/__m512i/__m512d types. 
llvm-svn: 269631
 2016-05-16 06:38:36 +00:00
Craig Topper 91f23d900f [X86] Remove bad cast from the 'int' return type of __builtin_ia32_kortestchi to '__mask16' before return in an 'int' intrinsic. 
llvm-svn: 269621
 2016-05-16 01:09:16 +00:00
Craig Topper dca1f230ae [AVX512] Add intrinsics for 512-bit insertf32x8/insertf32x4/inserti32x4. 
llvm-svn: 269617
 2016-05-15 21:26:20 +00:00
Craig Topper 79d05c9b3d [AVX512] Mark some integer builtin arguments that go to immediates in final instructions as an ICE. 
llvm-svn: 269613
 2016-05-15 20:10:06 +00:00
Craig Topper 9864c59c89 [AVX512] Move unary negations to the left side of typecasts to specific vector type. The __m128/__m256/__m512 types should be treated more opaquely and not have any operations performed on them. 
llvm-svn: 269612
 2016-05-15 20:10:03 +00:00
Craig Topper 4537ea74eb [X86] Change most 'void' pointers in builtin type lists to more correct types. Fix some unaligned load/store intrinsics to use a less aligned type in their pointer casts. 
llvm-svn: 269552
 2016-05-14 06:03:13 +00:00
Michael Zuckerman 13d3c002df [clang][AVX512] completing missing set intrinsics 
Differential Revision: http://reviews.llvm.org/D20099

llvm-svn: 269172
 2016-05-11 11:41:29 +00:00
Michael Zuckerman 5e2c6b6200 [clang][AVX512] completing missing intrinsics for [vpermt2d|vptestm] instruction set. 
Differential Revision: http://reviews.llvm.org/D20096

llvm-svn: 269170
 2016-05-11 11:21:18 +00:00
Michael Zuckerman e9e8e573e3 [Clang][AVX512] completing missing intrinsics [load/store] 
Differential Revision: http://reviews.llvm.org/D20063

llvm-svn: 269056
 2016-05-10 13:13:54 +00:00
Michael Zuckerman de860e5585 [Clang][AVX512] completing missing intrinsics [vmin/vmax]{sd|sq|uq|ud}. 
Differential Revision: http://reviews.llvm.org/D20064

llvm-svn: 269042
 2016-05-10 11:34:19 +00:00
Michael Zuckerman 2564d2f5fe [Clang][AVX512] completing missing intrinsics [vextractf]. 
Differential Revision: http://reviews.llvm.org/D20061

llvm-svn: 269037
 2016-05-10 10:14:50 +00:00
Michael Zuckerman 7360d8a9cc [Clang][AVX512] completing missing intrinsics [roundscale, ceil, floor] 
Differential Revision: http://reviews.llvm.org/D20070

llvm-svn: 269022
 2016-05-10 07:30:58 +00:00
Michael Zuckerman f9be3bb1d5 [clang][AVX512] completing missing intrinsics [vmin/vmax]. 
Differential Revision: http://reviews.llvm.org/D20062

llvm-svn: 268910
 2016-05-09 12:38:49 +00:00
Michael Zuckerman f15447537f [Clang][AVX512] completing missing intrinsics [CVT] 
Differential Revision: http://reviews.llvm.org/D20056

llvm-svn: 268903
 2016-05-09 10:32:51 +00:00
Michael Zuckerman e6f7389b5a [Clang][Builtin][AVX512] Adding intrinsics fot cvt{u}si2s{d|s} cvt{sd|ss}2{ss|sd} instruction set 
Differential Revision: http://reviews.llvm.org/D19765

llvm-svn: 268481
 2016-05-04 08:55:11 +00:00
Michael Zuckerman c66770313a [clang][AVX512][BuiltIn] Adding intrinsics for cast{pd|ps|si}128_{pd|ps|si}512 and castsi256_si512 instruction set 
Differential Revision: http://reviews.llvm.org/D19858

llvm-svn: 268387
 2016-05-03 14:26:52 +00:00
Michael Zuckerman 138fc5b5a8 [Clang][AVX512][Builtin] Adding intrinsics for vcvttpd2udq instruction set 
Differential Revision: http://reviews.llvm.org/D19768

llvm-svn: 268373
 2016-05-03 11:05:24 +00:00
Michael Zuckerman 708e759b86 [Clang][AVX512][BUILTIN] Adding intrinsics for compressstore{df|di|sf|si} instruction set. 
Differential Revision: http://reviews.llvm.org/D19808

llvm-svn: 268372
 2016-05-03 10:42:46 +00:00
Michael Zuckerman 5f0e96e56a [CLANG][AVX512][BUILTIN]movap{d|s}{128|256|512} 
Differential Revision: http://reviews.llvm.org/D17818

llvm-svn: 268230
 2016-05-02 14:02:01 +00:00
Michael Zuckerman d6e68ce75f [Clang][AVX512][BuiltIn] Adding intrinsics for cvtps2pd instruction set 
Differential Revision: http://reviews.llvm.org/D19774

llvm-svn: 268217
 2016-05-02 09:42:31 +00:00
Michael Zuckerman 6a0e0871db [Clang][avx512][builtin] Adding intrinsics for vexpand{d|q|ps|pd} instrctuon set 
Differential Revision: http://reviews.llvm.org/D19467

llvm-svn: 268214
 2016-05-02 08:36:41 +00:00
Michael Zuckerman c62f27e3f4 [Clang][BuiltIn][avx512] Adding intrinsics for vpshufd instruction set 
Differential Revision: http://reviews.llvm.org/D19580

llvm-svn: 268213
 2016-05-02 07:35:27 +00:00
Michael Zuckerman ac1e519944 [clang][Builtin][AVX512] Adding intrinsics for vmovshdup and vmovsldup instruction set 
Differential Revision: http://reviews.llvm.org/D19595

llvm-svn: 268196
 2016-05-01 14:43:43 +00:00
Michael Zuckerman 0b9d105a16 [clang][BuiltIn][AVX512]Adding intrinsics for cmp{ss|sd} instruction set. 
Differential Revision: http://reviews.llvm.org/D19601

llvm-svn: 268028
 2016-04-29 11:01:16 +00:00
Michael Zuckerman 41f5a37707 [Clang][AVX512][Builtin] Adding intrinsics for compress instruction set 
Differential Revision: http://reviews.llvm.org/D19599

llvm-svn: 268013
 2016-04-29 08:52:02 +00:00
Michael Zuckerman 533e065bdc [Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr instruction set 
Differential Revision: http://reviews.llvm.org/D19588

llvm-svn: 267876
 2016-04-28 12:47:30 +00:00
Michael Zuckerman 8c2900f44d [Clang][BuiltIn][AVX512] Adding intrinsics without mask for VBROADCAST and VPBROADCAST instruction set . 
Differential Revision: http://reviews.llvm.org/D19196

llvm-svn: 267696
 2016-04-27 11:43:14 +00:00
Michael Zuckerman 7c85a8cb46 [Clang][BuiltIn][AVX512]Adding intrinsics for vmovntdqa vmovntpd vmovntps instruction set 
Differential Revision: http://reviews.llvm.org/D19529

llvm-svn: 267690
 2016-04-27 10:44:15 +00:00
Michael Zuckerman fa508e8b6d [Clang][Builtin][AVX512]Adding k-register logic intrinsics KAND, KANDN, KOR, KORTEST, KXNOR, KXOR, KUNPACK instruction set. 
Differential Revision: http://reviews.llvm.org/D19466

llvm-svn: 267425
 2016-04-25 16:42:29 +00:00
Michael Zuckerman fcf32c2f00 [Clang][AVX512][BUILTIN] Adding intrinsics for VSCATTERPF{1|0}{DPS|QPS|DPD|QPD} instruction set 
Differential Revision: http://reviews.llvm.org/D19313

llvm-svn: 267398
 2016-04-25 13:01:40 +00:00
Michael Zuckerman 8938e836c4 [Clang][AVX512][BuiltIn] Adding support to intrinsics of VPERMD and VPERMW instruction set 
Differential Revision: http://reviews.llvm.org/D19195

llvm-svn: 267380
 2016-04-25 05:32:35 +00:00
Michael Zuckerman 743d68c3cb [clang][AVX512][Builtin] adding intrinsics for vf{n}madd{ss|sd} and vf{n}sub{ss|sd} instruction set 
Differential Revision: http://reviews.llvm.org/D19320

llvm-svn: 267135
 2016-04-22 10:56:24 +00:00
Michael Zuckerman a1ceca20b6 [Clang][AVX512][BUILTIN] Adding scalar intrinsics for rsqrt14 ,rcp14, getexp and getmant instruction set 
Differential Revision: http://reviews.llvm.org/D19326

llvm-svn: 267129
 2016-04-22 10:06:10 +00:00
Michael Zuckerman 4fa96af4db [Clang][AVX512][BuiltIn] Adding intrinsics of VGATHER{DPS|DPD} , VPGATHER{QD|QQ|DD|DQ} and VGATHERPF{0|1}{DPS|QPS|DPD|QPD} instruction set . 
Differential Revision: http://reviews.llvm.org/D19224

llvm-svn: 266983
 2016-04-21 12:47:27 +00:00
Michael Zuckerman 6fa512cecf [Clang][Builtin][AVX512] Adding intrinsics for VGETMANT{PD|PS} and VGETEXP{PD|PS} instruction set 
Differential Revision: http://reviews.llvm.org/D19197

llvm-svn: 266763
 2016-04-19 17:10:29 +00:00
Michael Zuckerman ef2979af50 [Clang][AVX512][BUILTIN] Adding intrinsics support to VEXTRACT{I|F} and VINSERT{I|F} instruction set 
Differential Revision: http://reviews.llvm.org/D19097

llvm-svn: 266745
 2016-04-19 15:18:23 +00:00
Michael Zuckerman 0a3508a8d3 [Clang][AVX512][BUILTIN] Adding support for intrinsics of vpmov{d|q}{b|w|d}{128|256|512} instruction set 
Differential Revision: http://reviews.llvm.org/D19055

llvm-svn: 266280
 2016-04-14 07:56:51 +00:00
Michael Zuckerman d871531687 [Clang][AVX512][Builtin] Adding intrinsics of vpmovus{d|q}{b|w|d}{128|256|512} instruction set 
Differential Revision: http://reviews.llvm.org/D19050

llvm-svn: 266278
 2016-04-14 06:48:09 +00:00
Michael Zuckerman e1680617b0 [Clang][AVX512][Builtin] Adding support to intrinsics of pmovs{d|q}{b|w|d}{128|256|512} instruction set 
Differential Revision: http://reviews.llvm.org/D19023

llvm-svn: 266202
 2016-04-13 15:02:04 +00:00
Michael Zuckerman 04fb3bc682 [Clang][BuiltIn][avx512] Adding avx512 (shuf,sqrt{ss|sd},rsqrt ) builtin to clang 
llvm-svn: 266048
 2016-04-12 07:59:39 +00:00
Michael Zuckerman 81f468c859 [Clang][AVX512][BuiltIn] Adding avx512 ( psll{d|q}512,psllv{16si|8di},psra{d|q}512,psrav{16si|8di},pternlog{d|q}{128|256|512} ) builtin to clang 
Differential Revision: http://reviews.llvm.org/D18926

llvm-svn: 265964
 2016-04-11 17:04:21 +00:00
Michael Zuckerman 6b5f4d8ad1 [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin 
Differential Revision: http://reviews.llvm.org/D17693

llvm-svn: 265952
 2016-04-11 15:46:39 +00:00
Michael Zuckerman 1af947a7b3 [Clang][AVX512][BuiltIn] Adding avx512 ( punpck{h|l}{dq|qdq}{128|256|512},rndscale{ss|sd}, {scalef{ss|sd|pd512|ps512} ) builtin to clang 
Differential Revision: http://reviews.llvm.org/D18929

llvm-svn: 265935
 2016-04-11 12:32:31 +00:00
Michael Zuckerman 07525091e6 [Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) builtin to clang 
Differential Revision: http://reviews.llvm.org/D18924

llvm-svn: 265928
 2016-04-11 10:22:07 +00:00
Michael Zuckerman d8d2f62107 [Clang][AVX512][BuiltIn] Adding avx512 ( vperm{i|t}2var, vpermil{var}{ps|pd}{256|512} ) builtin to clang. 
Differential Revision: http://reviews.llvm.org/D18933

llvm-svn: 265915
 2016-04-11 07:15:34 +00:00
Michael Zuckerman 8d16199b7b [Clang][AVX512][BuiltIn] Adding avx512 ( vcvt ) builtin to clang 
Differential Revision: http://reviews.llvm.org/D18932

llvm-svn: 265904
 2016-04-10 17:24:03 +00:00
Michael Zuckerman cdd54c83d8 Adding avx512 (unpck{h|l}{pd|ps}, rcp14{pd|ps}{128|256},vplzcnt{d|q} ) builtin to clang 
Differential Revision: http://reviews.llvm.org/D18931

llvm-svn: 265896
 2016-04-10 12:54:23 +00:00
Michael Zuckerman def78750b7 [CLANG][avx512][BUILTIN] Adding fixupimm{pd|ps|sd|ss} 
getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang


Differential Revision: http://reviews.llvm.org/D18215

llvm-svn: 264574
 2016-03-28 12:23:09 +00:00
Michael Zuckerman e71d59fc4f [CLANG][AVX512][BUILTIN] Add builtin vcomi{ss|sd} 
Differential Revision: http://reviews.llvm.org/D17919

llvm-svn: 262847
 2016-03-07 19:15:00 +00:00
Michael Zuckerman 0d67e4b5d6 [CLANG][AVX512][BUILTIN] movddup{128|256|512} 
Differential Revision: http://reviews.llvm.org/D17826

llvm-svn: 262617
 2016-03-03 13:43:05 +00:00
Michael Zuckerman ffbb67a8e2 [CLANG][AVX512][BUILTIN] movdqa{32|64}{load|store|}{128|256|512} 
Differential Revision: http://reviews.llvm.org/D17812

llvm-svn: 262598
 2016-03-03 09:26:01 +00:00
Michael Zuckerman d176d744af [CLANG][AVX512][BUILTIN] Adding PSRL{DI|QI}{128|256|512} builtin 
Differential Revision: http://reviews.llvm.org/D17714

llvm-svn: 262355
 2016-03-01 17:49:03 +00:00
Michael Zuckerman 1ac360cca4 [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin 
Differential Revision: http://reviews.llvm.org/D17693

llvm-svn: 262321
 2016-03-01 11:38:16 +00:00
Michael Zuckerman e98cc7477f [CLANG] [AVX512] [BUILTIN] Adding prorv{d|q}{128|256|512} builtin to clang 
Differential Revision: http://reviews.llvm.org/D17512

llvm-svn: 261641
 2016-02-23 15:59:47 +00:00
Michael Zuckerman 4924c7a2b5 [CLANG] [AVX512] [BUILTIN] Adding pro{lv|r}{d|q}{128|256|512} builtin to clang 
Adding closer to the end of macro }->}) 

Differential Revision: http://reviews.llvm.org/D17506

llvm-svn: 261638
 2016-02-23 14:23:53 +00:00
Michael Zuckerman 0231f1649b [CLANG] [AVX512] [BUILTIN] Adding pro{lv|r}{d|q}{128|256|512} builtin to clang 
Differential Revision: http://reviews.llvm.org/D17506

llvm-svn: 261635
 2016-02-23 13:41:13 +00:00
Michael Zuckerman 38a2727764 [CLANG] [AVX512] [BUILTIN] Adding prol{d|q|w}{128|256|512} builtin to clang . 
Differential Revision: http://reviews.llvm.org/D16985

llvm-svn: 261516
 2016-02-22 09:05:41 +00:00
Michael Zuckerman 7a33dce4ef [CLANG] [AVX512] [BUILTIN] Adding pmovzx{b|d|w}{w|d|q}{128|256|512} builtin to clang 
Differential Revision: http://reviews.llvm.org/D16961

llvm-svn: 261471
 2016-02-21 14:00:11 +00:00
Michael Zuckerman 7cdb72f7ea [CLANG] [AVX512] [BUILTIN] Adding pmovsx{b|d|w}{w|d|q}{128|256|512} builtin to clang 
Differential Revision: http://reviews.llvm.org/D16955

llvm-svn: 261196
 2016-02-18 09:09:34 +00:00
Igor Breger 9c2a0bfa13 AVX512: Change builtin function name for scalar intrinsics. Add "mask" to function name to reflect the function behavior. 
Differential Revision: http://reviews.llvm.org/D16957

llvm-svn: 260088
 2016-02-08 12:36:48 +00:00
Adam Nemet e708747129 [AVX512] Fix typo in r226298 
Hal noticed that the double/float got mixed up on the parameters for
these.

llvm-svn: 258108
 2016-01-19 02:02:25 +00:00
Asaf Badouh 5e4248b4e0 [x86][avx512] more changes in intrinsics to be align with gcc format 
Differential Revision: http://reviews.llvm.org/D15328

llvm-svn: 255012
 2015-12-08 12:34:38 +00:00
Asaf Badouh 3e5111e313 [avx512] rename gcc intrinsics to be align with gcc format 
rename the gcc intrinsics suffix : _mask ->_round

Differential Revision: http://reviews.llvm.org/D15284

llvm-svn: 254906
 2015-12-07 13:14:22 +00:00
Craig Topper 3a71f35a67 [X86] Remove temporary variables from intrinsic macros. NFC 
llvm-svn: 254247
 2015-11-29 06:50:33 +00:00