Commit Graph

18187 Commits

Author SHA1 Message Date
Chris Lattner b1ed91f397 Land the long talked about "type system rewrite" patch. This
patch brings numerous advantages to LLVM.  One way to look at it
is through diffstat:
 109 files changed, 3005 insertions(+), 5906 deletions(-)

Removing almost 3K lines of code is a good thing.  Other advantages
include:

1. Value::getType() is a simple load that can be CSE'd, not a mutating
   union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
   uniques them.  This means that the compiler doesn't merge them structurally
   which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
   struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
   in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead 
   "const Type *" everywhere.

Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.  
"LLVM 3.0" is the right time to do this.

There are still some cleanups pending after this, this patch is large enough
as-is.

llvm-svn: 134829
2011-07-09 17:41:24 +00:00
Evan Cheng 21a9772ac1 Revert accidental commit.
llvm-svn: 134800
2011-07-09 06:26:27 +00:00
Evan Cheng 91111d2706 Change createAsmParser to take a MCSubtargetInfo instead of triple,
CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.

llvm-svn: 134795
2011-07-09 05:47:46 +00:00
Eli Friedman fe2088bb1f Really force on 64bit for 64-bit targets. Should fix remaining failures on unknown x86/non-x86 targets.
llvm-svn: 134773
2011-07-08 23:43:01 +00:00
Eli Friedman 5286833f4a Revert earlier unnecessary hack. Make sure we correctly force on 64bit and cmov for 64-bit targets.
llvm-svn: 134768
2011-07-08 23:07:42 +00:00
Evan Cheng 45543ba4e8 Fix indentation.
llvm-svn: 134764
2011-07-08 22:49:55 +00:00
Evan Cheng 284b467d9f Add support for ARM / Thumb mode switching with .code 16 and .code 32.
llvm-svn: 134760
2011-07-08 22:36:29 +00:00
Jim Grosbach 39c67b5e08 Mark tBRIND as predicable.
llvm-svn: 134758
2011-07-08 22:33:49 +00:00
Evan Cheng 60fc0fca5c Restore old behavior. Always auto-detect features unless cpu or features are specified.
llvm-svn: 134757
2011-07-08 22:30:25 +00:00
Jim Grosbach 59a3ab6e46 Pseudo-ize tBRIND.
llvm-svn: 134755
2011-07-08 22:25:23 +00:00
Eli Friedman e2f76c4ade Default 64-bit target features and SSE2 on when a triple specifies x86-64. Clean up all the other hacks which are now unnecessary.
llvm-svn: 134753
2011-07-08 22:16:47 +00:00
Jim Grosbach 7471937ad7 Make tBX_RET and tBX_RET_vararg predicable.
The normal tBX instruction is predicable, so there's no reason the
pseudos for using it as a return shouldn't be. Gives us some nice code-gen
improvements as can be seen by the test changes. In particular, several
tests now have to disable if-conversion because it works too well and defeats
the test.

llvm-svn: 134746
2011-07-08 21:50:04 +00:00
Julien Lerouge 112fcc164a Add _allrem, _aullrem and _allmul to the runtime for MSVC.
http://llvm.org/bugs/show_bug.cgi?id=10305

llvm-svn: 134744
2011-07-08 21:40:25 +00:00
Cameron Zwarich f03fa189ca Add an intrinsic and codegen support for fused multiply-accumulate. The intent
is to use this for architectures that have a native FMA instruction.

llvm-svn: 134742
2011-07-08 21:39:21 +00:00
Evan Cheng 964cb5feb0 For non-x86 host, used generic as CPU name.
llvm-svn: 134741
2011-07-08 21:14:14 +00:00
Jim Grosbach d61ae786bd Pseudo-ize tBX_RET and tBX_RET_vararg.
llvm-svn: 134739
2011-07-08 21:10:35 +00:00
Benjamin Kramer debe69fb37 Plug a leak by giving the AsmParser ownership of the MCSubtargetInfo.
Found by valgrind.

llvm-svn: 134738
2011-07-08 21:06:23 +00:00
Jim Grosbach cb1b0b7130 Shuffle productions around a bit.
No functional change.

llvm-svn: 134737
2011-07-08 21:04:05 +00:00
Jim Grosbach 204c128f66 Use tPseudoExpand for tTAILJMPrND and tTAILJMPr.
llvm-svn: 134734
2011-07-08 20:39:19 +00:00
Jim Grosbach 4af8647e17 Use tPseudoExpand for tTAILJMPd and tTAILJMPdND.
llvm-svn: 134732
2011-07-08 20:32:21 +00:00
Benjamin Kramer dbdff47cb3 Silence compiler warning.
llvm-svn: 134730
2011-07-08 20:18:13 +00:00
Jim Grosbach 3840c90f73 Add more info to FIXME.
llvm-svn: 134729
2011-07-08 20:18:11 +00:00
Jim Grosbach 166cd88645 Move Thumb tail call pseudos to Thumb.td file.
Fix a FIXME.

llvm-svn: 134727
2011-07-08 20:13:35 +00:00
Evan Cheng 22e9d8f40e TargetAsmParser doesn't need reference to Target.
llvm-svn: 134721
2011-07-08 19:33:14 +00:00
Jim Grosbach dbfb29d6c0 Use ARMPseudoExpand for ARM tail calls.
llvm-svn: 134719
2011-07-08 18:50:22 +00:00
Jim Grosbach 7ddc1d709f Shuffle productions around a bit.
No functional change.

llvm-svn: 134714
2011-07-08 18:26:27 +00:00
Jim Grosbach 2dfe8e3ccd Use ARMPseudoExpand for BLr9, BLr9_pred, BXr9, and BXr9_pred.
TableGen'erated MC lowering pseudo-expansion.

llvm-svn: 134712
2011-07-08 18:15:12 +00:00
Chandler Carruth f21cebf6dd Add CMake support for the new TableGen file introduced in r134705.
llvm-svn: 134707
2011-07-08 17:54:08 +00:00
Jim Grosbach 95dee40343 Use TableGen'erated pseudo lowering for ARM.
Hook up the TableGen lowering for simple pseudo instructions for ARM and
use it for a subset of the many pseudos the backend has as proof of concept.

More conversions to come.

llvm-svn: 134705
2011-07-08 17:40:42 +00:00
Evan Cheng 4d1ca96bfc Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
  to generate asm matcher subtarget feature queries. e.g.
  "ModeThumb,FeatureThumb2" is translated to
  "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".

llvm-svn: 134678
2011-07-08 01:53:10 +00:00
Akira Hatanaka f9a85356bc Raise assertion when MachineOperand has unexpected target flag.
llvm-svn: 134671
2011-07-08 00:42:35 +00:00
Akira Hatanaka 8ccd65842d Make sure variable Kind is assigned a value to suppress warning.
llvm-svn: 134668
2011-07-08 00:26:25 +00:00
Nick Lewycky 9badf60203 Let the inline asm 'q' constraint match float, and on 64-bit double too.
Fixes PR9602!

llvm-svn: 134665
2011-07-08 00:19:27 +00:00
Eric Christopher 7a2a0f80de Go ahead and emit the barrier on x86-64 even without sse2. The
processor supports it just fine.

Fixes PR9675 and rdar://9740801

llvm-svn: 134664
2011-07-08 00:04:56 +00:00
Akira Hatanaka 9c6028f98e Lower MachineInstr to MC Inst and print to .s files.
llvm-svn: 134661
2011-07-07 23:56:50 +00:00
Eric Christopher 719c29702f Handle fpcr register.
Part of PR10299 and rdar://9740322

llvm-svn: 134653
2011-07-07 22:54:12 +00:00
Eric Christopher 9721396dab Add support for the X86 'l' constraint.
Fixes PR10149 and rdar://9738585

llvm-svn: 134648
2011-07-07 22:29:07 +00:00
Akira Hatanaka 28d6677a53 Remove unnecessary newline.
llvm-svn: 134645
2011-07-07 22:06:18 +00:00
Evan Cheng 13bcc6c1c7 Add Mode64Bit feature and sink it down to MC layer.
llvm-svn: 134641
2011-07-07 21:06:52 +00:00
Bill Wendling 1a423d8b35 Move a function out-of-line.
llvm-svn: 134640
2011-07-07 21:05:13 +00:00
Akira Hatanaka 9f6f6f6ecc Rather than having printMemOperand change the way memory operands are printed
based on a modifier, split it into two functions.

llvm-svn: 134637
2011-07-07 20:54:20 +00:00
Akira Hatanaka 77a9e6e7df Define class MipsMCInstLower.
llvm-svn: 134633
2011-07-07 20:24:54 +00:00
Akira Hatanaka ddd1265316 Change visibility of MipsAsmPrinter.
llvm-svn: 134630
2011-07-07 20:10:52 +00:00
Akira Hatanaka 04da3658c6 Define class MipsMCSymbolRefExpr.
llvm-svn: 134629
2011-07-07 19:27:22 +00:00
Akira Hatanaka 9d1936a270 Simplify MipsRegisterInfo::eliminateFrameIndex.
llvm-svn: 134628
2011-07-07 19:13:09 +00:00
Evan Cheng 6dbe713a49 Rewrite comment in English.
llvm-svn: 134627
2011-07-07 19:09:06 +00:00
Evan Cheng 1834f5dcb6 Rename attribute 'thumb' to a more descriptive 'thumb-mode'.
llvm-svn: 134626
2011-07-07 19:05:12 +00:00
Akira Hatanaka 2e766ed2f8 Reverse order of operands of address operand mem so that the base operand comes
before the offset. This change will enable simplification of function
MipsRegisterInfo::eliminateFrameIndex.

llvm-svn: 134625
2011-07-07 18:57:00 +00:00
Akira Hatanaka ac4db9251b Add missing return statement.
llvm-svn: 134622
2011-07-07 18:27:36 +00:00
Oscar Fuentes 32a45e5aeb Update CMake library dependencies
llvm-svn: 134616
2011-07-07 16:33:00 +00:00