Commit Graph

1225 Commits

Author SHA1 Message Date
Alexander Yermolovich ea6c8b013e [BOLT][DWARF] Reduce overhead for sized dealloc
This is a follow up to Fix size mismatch error with jemalloc.
4243b6582c
Although that fix works it increased memory footprint.
With this patch we go back to original memory footprint.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D117341
2022-01-14 17:32:48 -08:00
Amir Ayupov 29fe14c78d [BOLT][NFC] Remove redundant dependent template type
Summary:
Reduce code size by removing redundant dependent template type
from RewriteInstance methods.

Code size savings (via bloaty on llvm-bolt Debug build):
```
symbol,vmsize,filesize -> vmsize,filesize (delta vmsize,filesize)
updateELFSymbolTable         57096,59600 -> 56656,59048 (440,552)
updateELFSymbolTable::lambda 35957,55277 -> 35949,54485   (8,792)
getOutputSections            20592,21440 -> 20372,21156 (220,284)
getOutputSections::lambda      1792,5300 ->   1792,5372   (0,-72)

total delta (668,1556)
```

Reviewed By: maksfb

FBD33589393
2022-01-14 15:47:15 -08:00
Amir Ayupov c34adaa3ca [BOLT][CMAKE] Use IN_LIST check
Summary:
Address @smeenai feedback https://reviews.llvm.org/D117061#inline-1122106:
>CMake has if(IN_LIST) now, which you can use instead of the string(FIND)

IN_LIST is available since CMake 3.3 released in 2015.

Reviewed By: smeenai

FBD33590959
2022-01-14 15:47:14 -08:00
Vladislav Khmelevsky fb3b86fedc [BOLT][DWARF] Fix high pc patching
The DW_FORM_addr form of highPC address is written in absolute addres,
the data form is written in offset-from-low pc format.

Due to the large test binary the test is prepared separately in
https://github.com/rafaelauler/bolt-tests/pull/8

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Reviewed By: ayermolo

Differential Revision: https://reviews.llvm.org/D117217
2022-01-15 01:05:16 +03:00
Amir Ayupov d914486a9a [BOLT][NFC] Refactor reset-release to move assignment
Summary:
Follow the clang-tidy suggestion to replace reset-release with move assignment.

Move assignment's effect for unique_ptr:
> Effects: Transfers ownership from `u` to `*this` as if by calling `reset(u.release())`
followed by an assignment from `std::forward<D>(u.get_deleter())`.
2022-01-13 22:47:15 -08:00
Amir Ayupov 18bc405a09 [BOLT][NFC] Remove uses of `std::vector<bool>`
Summary:
LLVM Programmer’s Manual strongly discourages the use of `std::vector<bool>`
and suggests `llvm::BitVector` as a possible replacement.
2022-01-13 22:46:34 -08:00
Amir Ayupov 68c393c9db [BOLT] Update repo location in Dockerfile 2022-01-12 19:06:03 -08:00
Shoaib Meenai d9b2983ea1
[bolt] Fix relative links in README
The README is in the `bolt` subdirectory now, so relative links need to
be adjusted accordingly.
2022-01-12 17:28:25 -08:00
Amir Ayupov 2d97f0f2ef [BOLT][TEST] Move exceptions-instrumentation.test to X86
The aarch64 instrumentation is currently unsupported so the test is failing.

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D117102
2022-01-12 09:25:12 -08:00
Amir Ayupov 65d39942dc [BOLT] Update README build instructions
Mehdi spotted that our build instructions don't make sense in a monorepo:
https://github.com/facebookincubator/BOLT/pull/269.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D117062
2022-01-11 21:26:27 -08:00
Amir Aupov 4ed8711520 [BOLT] README: address @apinski-cavium comment
Address the comment at:
4c106cfdf7 (r63658159)

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D117083
2022-01-11 21:24:07 -08:00
Amir Ayupov b1a107db56 [BOLT][NFC] Format braced initializer lists
Summary:
Use assignment (`=`) with braced initializer lists when constructing
aggregate temporaries in expressions.

https://llvm.org/docs/CodingStandards.html#braced-initializer-lists

(cherry picked from FBD33515669)
2022-01-10 12:45:55 -08:00
Maksim Panchenko 8aab58ba65 [BOLT][NFC] Refactor AArch64MCPlusBuilder
Summary: Selectively apply clang-format to the code in AArch64MCPlusBuilder.cpp.

(cherry picked from FBD33495653)
2022-01-08 18:17:31 -08:00
Maksim Panchenko 82278a8f29 [BOLT][NFC] Refactor X86MCPlusBuilder
Summary:
Selectively apply clang-format and other minor refactoring to the code
in X86MCPlusBuilder.cpp

(cherry picked from FBD33495550)
2022-01-08 17:48:33 -08:00
Amir Ayupov 799cbbb797 [BOLT][NFC] Reuse X86BaseInfo interfaces for macrofusion checks
Summary:
Remove X86MCPlusBuilder code that duplicates checks in X86BaseInfo.
Remove isINC and isDEC as redundant.

The new code of `X86MCPlusBuilder::isMacroOpFusionPair` is functionally
equivalent to `X86AsmBackend::isMacroFused`. However, as the method is
declared/defined in X86AsmBackend.cpp and not exported in a header file,
there's no way to use it in BOLT without changes in LLVM code.

(cherry picked from FBD33440373)
2022-01-05 15:58:01 -08:00
Amir Ayupov 1d3c150748 [BOLT] Remove ineligible macro-fusion patterns
Summary:
Remove patterns ineligible for macro-fusion:
- First instruction has a memory destination

This is a temporary commit to align BOLT with LLVM MC interfaces.
(cherry picked from FBD33479340)
2022-01-07 09:40:04 -08:00
Alexander Yermolovich 4243b6582c [BOLT][DWARF] Fix size mismatch error with jemalloc
Summary:
When building with GCC and linking against jemalloc there is an
assertion when Debug Patches unique pointers are being freed from an std vector.
The base destructor gets invoked which results in type mismatch.
Added virtual destructor to the base class.

(cherry picked from FBD33489259)
2022-01-07 18:25:54 -08:00
Maksim Panchenko 330c8e42ab [BOLT][NFC] Refactor command line options in BinaryPassManager
Summary:
Reformat code and put options in lexicographical order.

Comparing to clang-format output, manual formatting looks cleaner to me.

(cherry picked from FBD33481692)
2022-01-07 11:36:22 -08:00
Alexander Yermolovich e579f5c6e7 [BOLT][DWARF] Fix race conditions for debug fission in non-deterministic mode
Summary: Adding mutexes to avoid runtime race conditions.

(cherry picked from FBD33439854)
2022-01-05 15:27:21 -08:00
Maksim Panchenko bc9032c7fa [BOLT][NFC] Use uniform DEBUG_TYPE for MCPlus builders
(cherry picked from FBD33435121)
2022-01-05 12:02:54 -08:00
Maksim Panchenko df288e8487 [BOLT][NFC] Refactor if statements in RewriteInstance
(cherry picked from FBD33341796)
2021-12-28 13:46:45 -08:00
Alexander Yermolovich 6b89327deb [BOLT][DWARF] Handling more data formats for DW_AT_high_pc
Summary:
Adding support for DW_FORM_data_2, DW_FORM_data_1, DW_FORM_udata.
With new .debug_info code only need to modify the check.

(cherry picked from FBD33302731)
2021-12-23 14:49:14 -08:00
Alexander Yermolovich 9bf7a73787 [BOLT][DWARF] Change convertToRanges to not use indirect
Summary:
Now that we are re-writing .debug_info we are not longer restricted to have same size patches.
Simplifying logic to use direct forms.

(cherry picked from FBD32971159)
2021-12-07 17:35:12 -08:00
Amir Ayupov 6bb26fcb20 [BOLT] removeAllSuccessors: handle multiple edges between basic blocks
Summary:
If `addUnknownControlFlow` in `BinaryFunction::postProcessIndirectBranches`
is invoked with a basic block that has multiple edges to the same successor,
it leads to an assertion in `BinaryBasicBlock::removePredecessor`.

For basic blocks with multiple edges to the same successor, the default
behavior of removePredecessor is to remove all occurrences of the
predecessor block in its predecessor list (Multiple=true).

Example:
```A -> B (two edges)

A->removeAllSuccessors()
  for each successor of block A: // B twice
  // this removes both occurrences of A in B's predecessors list
  B->removePredecessor(A);
  // this invocation triggers an assert as A is no longer in B's
  // predecessor list
  B->removePredecessor(A);
```
This issue is not fixed by NormalizeCFG as `removeAllSuccessor` is called
earlier (from `buildCFG` -> `postProcessIndirectBranches`).

Solve this issue by collecting the successors into a set (`SmallPtrSet`) first,
before invoking `SuccessorBB->removePredecessor(this)`.

GitHub issue: https://github.com/facebookincubator/BOLT/issues/187

(cherry picked from FBD30796979)
2021-09-07 16:58:19 -07:00
Alexander Yermolovich 1c2f4bbe99 [BOLT] Rewrite of .debug_info section
Summary:
Changed the behavior of how we handle .debug_info section.
Instead of patching it will now rewrite it.
With this approach we are no longer constrained to having new values
 of the same size.
It handles re-writing by treating .debug_info as raw data.
It copies chunks of data between patches, with new data written in
 between.

(cherry picked from FBD32519952)
2021-11-15 17:19:24 -08:00
Amir Ayupov ccc4d4397f [BOLT][DOCS] Link to README instead of the github page in Doxygen
Summary:
Link to the README page built with the rest of the documentation,
a future-proof solution.

(cherry picked from FBD33357870)
2021-12-29 17:38:06 -08:00
Vladislav Khmelevsky 513bbd3f36 [PR][BOLT] Add aarch64 backend code owner
Summary: Add Vladislav as AArch64 backend code owner.

(cherry picked from FBD33355160)
2021-12-29 18:13:28 +03:00
Amir Ayupov 883bf0e83d [BOLT][NFC] Fix braces usage in the rest of the codebase
Summary:
Refactor remaining bolt sources to follow the braces rule for if/else/loop from
[LLVM Coding Standards](https://llvm.org/docs/CodingStandards.html).

(cherry picked from FBD33345885)
2021-12-28 18:43:53 -08:00
Amir Ayupov def464aaae [BOLT][NFC] Fix braces usage in Profile
Summary:
Refactor bolt/*/Profile to follow the braces rule for if/else/loop from
[LLVM Coding Standards](https://llvm.org/docs/CodingStandards.html).

(cherry picked from FBD33345741)
2021-12-28 18:29:54 -08:00
Amir Ayupov 89ceb77997 [BOLT][NFC] Fix braces usage in Target
Summary:
Refactor bolt/lib/Target to follow the braces rule for if/else/loop from
[LLVM Coding Standards](https://llvm.org/docs/CodingStandards.html).

(cherry picked from FBD33345353)
2021-12-28 17:52:08 -08:00
Amir Ayupov 3b01fbebeb [BOLT] Fix debug logging in IndirectCallPromotion
Summary:
Access elements of a value pair in HotTargetMap debug logging/loop over
HotTargetMap key-value.

(cherry picked from FBD33344656)
2021-12-28 16:37:53 -08:00
Amir Ayupov f92ab6af35 [BOLT][NFC] Fix braces usage in Passes
Summary:
Refactor bolt/*/Passes to follow the braces rule for if/else/loop from
[LLVM Coding Standards](https://llvm.org/docs/CodingStandards.html).

(cherry picked from FBD33344642)
2021-12-28 16:36:17 -08:00
Amir Ayupov cd7a630585 [BOLT][DOCS] Build doxygen documentation
Summary:
Added doxygen configuration files and CMake directives, copy-pasta from flang.

```cmake -G Ninja ../llvm-project/llvm \
  -DLLVM_ENABLE_PROJECTS="bolt" \
  -DBOLT_INCLUDE_DOCS=YES \
  -DLLVM_ENABLE_DOXYGEN=YES
ninja doxygen-bolt
```

(cherry picked from FBD33303249)
2021-12-23 15:23:39 -08:00
Maksim Panchenko ee0e9ccb52 [BOLTRewrite][NFC] Fix braces usages
Summary:
Refactor bolt/*/Rewrite to follow the braces rule for if/else/loop from
LLVM Coding Standards.

(cherry picked from FBD33305364)
2021-12-23 12:38:33 -08:00
Vladislav Khmelevsky 2d84e344d9 [PR][BOLT] Check for end iterator in LongJmp stub lookup
Summary:
The lower_bound might return the end iterator, the ignoring of which will
cause memory corruption.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD33307803)
2021-11-28 02:56:30 +03:00
Maksim Panchenko e1eeef5b90 [BOLT][RFC] Use new LLVM license for ADRRelaxationPass
Summary: Fixes facebookincubator/BOLT#271

(cherry picked from FBD33299273)
2021-12-23 10:49:37 -08:00
Rafael Auler b392ec696b Re-enable Windows build and fix issues
Summary:
Fix missing string header file inclusion and link_fdata find
problem in lit tests. Change root-level tests to require
linux. Re-enable Windows in our root CMakeLists.txt.

(cherry picked from FBD33296290)
2021-12-23 05:59:35 -08:00
Rafael Auler 3652483c8e [BOLTCore] [NFC] Fix braces usages according to LLVM
Summary:
Fix according to Coding Standards doc, section Don't Use
Braces on Simple Single-Statement Bodies of if/else/loop Statements.
This set of changes applies to lib Core only.

(cherry picked from FBD33240028)
2021-12-20 11:07:46 -08:00
Maksim Panchenko 9a689946f2 [bughunter.sh][NFC] Fix license and file description
Summary:
Convert bughunter.sh to the new LLVM license and fix file-description
comments.

(cherry picked from FBD33298823)
2021-12-23 10:14:27 -08:00
Maksim Panchenko 2f09f445b2 [BOLT][NFC] Fix file-description comments
Summary: Fix comments at the start of source files.

(cherry picked from FBD33274597)
2021-12-21 10:21:41 -08:00
Maksim Panchenko 0f32a5e5e1 [BOLT][NFC] Clear HFSort copyright/license
Summary:
Remove the copyright/license message for the code originated from
Facebook.

(cherry picked from FBD33293101)
2021-12-22 23:34:49 -08:00
Amir Ayupov 4eb237e45d [BOLT][DOCS] Updated clang build instructions in OptimizingClang.md
Summary:
Addressing the feedback in https://lists.llvm.org/pipermail/llvm-dev/2021-December/154420.html:
Updated the instructions to reflect LLVM monorepo layout.
Resolved build issues in compiler-rt.

(cherry picked from FBD33242317)
2021-12-20 12:58:53 -08:00
Rafael Auler 07d9e014ed [BOLT] Don't use ld.lld in tests
Summary: Addressing issue 270.

(cherry picked from FBD33255608)
2021-12-21 07:36:35 -08:00
Maksim Panchenko 226c973280 [BOLT][NFC] Remove another unused function
Summary: Remove DataReader::getBranchRange().

(cherry picked from FBD32810933)
2021-12-02 13:41:59 -08:00
Maksim Panchenko cf624f2e63 [BOLT][NFC] Remove unused function
Summary: Remove BinaryFunction::getBasicBlockOriginalAddress().

(cherry picked from FBD32810127)
2021-12-02 13:14:02 -08:00
Maksim Panchenko ccb99dd126 [BOLT] Fix profile and tests for nop-removal pass
Summary:
Since nops are now removed in a separate pass, the profile is consumed
on a CFG with nops. If previously a profile was generated without nops,
the offsets in the profile could be different if branches included nops
either as a source or a destination.

This diff adjust offsets to make the profile reading backwards
compatible.

(cherry picked from FBD33231254)
2021-12-18 17:05:00 -08:00
Vladislav Khmelevsky 08f56926c2 [BOLT] Move disassemble optimizations to optimization passes
Summary:
The patch moves the shortenInstructions and nop remove to separate binary
passes. As a result when llvm-bolt optimizations stage will begin the
instructions of the binary functions will be absolutely the same as it
was in the binary. This is needed for the golang support by llvm-bolt.
Some of the tests must be changed, since bb alignment nops might create
unreachable BBs in original functions.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD32896517)
2021-12-18 17:03:35 -08:00
Rafael Auler 46e93fb427 Fix frameopt crash when processing POPF
Summary: POPF instruction was triggering an assertion in our analysis.

(cherry picked from FBD33141809)
2021-12-15 13:29:46 -08:00
Elvina Yakubova 4a4045f740 [PR] Fix update-debug-sections for AArch64
Summary:
This patch adds AArch64 relocations handling in case updating of
debug sections is enabled

Elvina Yakubova,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD33077609)
2021-12-08 16:53:38 +03:00
Rafael Auler 283a87743e Fix install-bolt_rt dependencies
Summary:
This rule depends on bolt target, since it will run
install-bolt as well.

(cherry picked from FBD33152071)
2021-12-15 18:53:52 -08:00
Maksim Panchenko 40c2e0fafe [BOLT][NFC] Reformat with clang-format
Summary: Selectively apply clang-format to BOLT code base.

(cherry picked from FBD33119052)
2021-12-14 16:52:51 -08:00
Rafael Auler 5fc8adb529 Add bolt target to cmake
Summary:
Create a new high-level target named bolt that builds all
BOLT artifacts, as well as a install-bolt target that installs them.

(cherry picked from FBD33133002)
2021-12-15 10:16:58 -08:00
Amir Ayupov 6aa735ceaf [BOLT] Split functions: support fragments with multiple parents
Summary:
Gracefully handle binaries with split functions where two fragments are folded
into one, resulting in a fragment with two parent functions.

This behavior is expected in GCC8+ with -O2 optimization level, where both
function splitting and ICF are enabled by default.

On the BOLT side, the changes are:
- BinaryFunction: allow multiple parent fragments:
  - `ParentFragment` --> `ParentFragments`,
  - `setParentFragment` --> `addParentFragment`.
- BinaryContext:
  - `populateJumpTables`: mark fragments to be skipped later,
  - `registerFragment`: add a name heuristic check, return false if it failed,
  - `processInterproceduralReferences`: check if `registerFragment`
succeeded, otherwise issue a warning,
  - `skipMarkedFragments`: move out fragment traversal and skipping from
  `populateJumpTables` into a separate function.

This change fixes an issue where unrelated functions might be registered
as fragments:

```
BOLT-WARNING: interprocedural reference between unrelated fragments:
bad_gs/1(*2) and amd_decode_mce.cold.27/1(*2)
```

(Linux kernel binary)

(cherry picked from FBD32786688)
2021-12-01 21:14:56 -08:00
Maksim Panchenko 69706eafab [BOLT] Refactor BinaryBasicBlock to use ADT
Summary:
Refactor members of BinaryBasicBlock. Replace some std containers with
ADT equivalents. The size of BinaryBasicBlock on x86-64 Linux is reduced
from 232 bytes to 192 bytes.

(cherry picked from FBD33081850)
2021-12-09 11:53:12 -08:00
Rafael Auler bb201ca3e8 Disable Windows build
Summary:
Build is already broken because VS fails to locate
llvm-boltdiff when running tests, and VS also complains that
include/bolt/Passes/InstrumentationSummary.h is lacking an include
string header. Disable this until we have a Windows buildbot to make
sure this build is sane.

(cherry picked from FBD33039972)
2021-12-10 21:19:18 -08:00
Maksim Panchenko ebe51c4d23 [BOLT] Use more ADT data structures for BinaryFunction
Summary:
Switched members of BinaryFunction to ADT where it was possible and
made sense. As a result, the size of BinaryFunction on x86-64 Linux
reduced from 1624 bytes to 1448.

(cherry picked from FBD32981555)
2021-12-08 22:59:09 -08:00
Maksim Panchenko a73b1b7289 [BOLT][NFC] Clear HFSort copyright/license
Summary:
Remove the copyright/license message for the code originated from
Facebook.

(cherry picked from FBD32998404)
2021-12-09 12:24:16 -08:00
Alexander Yermolovich 1417f607bd [BOLT][DWARF] Fix for abbrev check in DWP case
Summary:
For DWP case the AbbreviationsOffset is the offset of the abbrev
 contribution in the DWP file, so can be none zero.

(cherry picked from FBD32961240)
2021-12-08 12:04:45 -08:00
Rafael Auler a2a8fb10a7 Add code owners file
Summary: Make explicit the contact of component owners.

(cherry picked from FBD32904304)
2021-12-06 17:54:10 -08:00
Maksim Panchenko b73c87bc4f [BOLT][DWARF] Force allocation of debug_line in RuntimeDyld
Summary:
Currently, RuntimeDyld will not allocate a section without relocations
even if such a section is marked allocatable and defines symbols.

When we emit .debug_line for compile units with unchanged code, we
output original (input) data, without relocations. If all units are
emitted in this way, we will have no relocations in the emitted
.debug_line. RuntimeDyld will not allocate the section and as a result
we will write an empty .debug_line section.

To workaround the issue, always emit a relocation of RELOC_NONE type
when emitting raw contents to debug_line.

(cherry picked from FBD32909869)
2021-12-06 23:32:40 -08:00
Maksim Panchenko cbf530bf41 [BOLT] Add pass to normalize CFG
Summary:
Some optimizations may remove all instructions in a basic block.

The pass will cleanup the CFG afterwards by removing empty basic
blocks and merging duplicate CFG edges.

The normalized CFG is printed under '-print-normalized' option.

(cherry picked from FBD32774360)
2021-12-01 13:57:50 -08:00
Amir Ayupov fd71cc5163 [BOLT][TESTS] Move debugTypesBug.s test into binary tests
Summary:
Remove the test and its inputs.
(cherry picked from FBD32855788)
2021-12-03 16:57:24 -08:00
Amir Ayupov b69d487a62 [BOLT][NFC] Remove unused MCPlusBuilder::isEnter
Summary: Remove unused code identified via coverage report.

(cherry picked from FBD32818608)
2021-12-02 17:23:58 -08:00
Amir Ayupov 8e632eae56 [BOLT][NFC] Remove unused MCPlusBuilder::createIndirectCall method
Summary: Remove unused code identified via coverage report.

(cherry picked from FBD32818329)
2021-12-02 17:19:33 -08:00
Amir Ayupov 02145d20ab [BOLT] Tail duplication: disable const/copy propagation by default as a workaround
Summary:
Disable const/copy propagation as a bug workaround.
Also add the debug logging in aggressive duplication.

(cherry picked from FBD32774744)
2021-12-01 14:05:05 -08:00
Maksim Panchenko 4f91538f57 [BOLT][NFC] Remove misleading debug message
Summary:
The debug message for the last fall-through block was printed under the
reverse condition, i.e. when the block was not a fall-through. Remove
the debug message. If we'll need such information, we can add a pass
with more analysis, i.e. checking the last instruction, if the block is
reachable, etc.

(cherry picked from FBD32670816)
2021-11-25 13:14:16 -08:00
Amir Ayupov eb9f4eb6ab [BOLT][NFC] Better diagnostics for unsupported relocation types
Summary: Print the relocation name instead of just the number.

(cherry picked from FBD32704832)
2021-11-29 13:20:03 -08:00
Amir Ayupov 76cd07f9e4 [BOLT] Tail Duplication: fix jump table check
Summary: The intent is clearly to check the current basic block.

(cherry picked from FBD32658103)
2021-11-24 15:39:24 -08:00
Amir Ayupov 7261655d2c [BOLT] Tail Duplication: skip unreachable blocks
Summary:
TailDuplication::isInCacheLine makes the assumption that the block
has a valid layout index, which is not the case for unreachable blocks.
Add a check for a valid layout index.

(cherry picked from FBD32659755)
2021-11-24 16:13:42 -08:00
Vladislav Khmelevsky 4e4ef2f3e7 [PR] Disable stack protection in runtime libraries
Summary:
In some of the system stack protection is enabled by default, which will
lead in extra symbols dependencies, which we want to avoid.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD32478426)
2021-11-16 16:34:33 +03:00
Rafael Auler a23726bb33 [BOLT] Fix crash when trying to resolve external symbols for runtime libs
Summary:
As pointed out by Vladislav in issue 217, if our RTDyld-based
linker fails to locate a symbol, it will crash with segfault. Fix that.

(cherry picked from FBD32481543)
2021-11-16 16:47:02 -08:00
Amir Ayupov e4ccdfe84f [BOLT] Import bughunter script
Summary: Import the script and update it to use `-funcs-file-no-regex`

(cherry picked from FBD32636025)
2021-11-23 20:48:50 -08:00
Amir Ayupov d474dbdfcb [BOLT][NFC] Use function names passed in -funcs-no-regex as-is
Summary:
Currently there are two issues rendering the use of bughunter/BOLT on a binary
with a large number of functions (100k) impossible:
1) `selectFunctionsToProcess` has O(binary_fn * force_fn) run-time, which is up
to quadratic with the number of functions in the binary.
2) It unnecessarily treats supplied function names as regexes.

This diff proposes the following changes to address the issue:
1. Add two options that treat function names as is, not as regexes, matching
bughunter usage model: `-funcs-no-regex`/`-funcs-file-no-regex`.
These options are complementary to `-funcs`/`-funcs-file` and `-skip-funcs`/
`-skip-funcs-file`. `funcs` takes precedence over `funcs-no-regex`.
2. Use string set to speed up function eligibility checking with
`-funcs-file-no-regex` to O(binary_fn * log force_fn).

(cherry picked from FBD28917225)
2021-06-04 18:49:29 -07:00
Amir Ayupov e9ee2ca1fa [BOLT][TEST] Fix runtime/X86/retpoline-synthetic.test
Summary:
Restructure the test to prevent command echo from getting to check
statements.

(cherry picked from FBD32635888)
2021-11-23 20:33:50 -08:00
Vladislav Khmelevsky a944a487ae [PR] Fix ShrinkWrapping pop order
Summary:
The push and pop instructions might have wrong reorder due to this
error. Thanks rafaelauler for the provided test case.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD32478348)
2021-11-14 02:23:20 +03:00
Alexander Yermolovich 68b0003ee3 [BOLT][DWARF] Fix for Unsupported Debug section: debug_line.dwo warning
Summary: Probably copy and paste mistake or something.

(cherry picked from FBD32625751)
2021-11-23 11:52:25 -08:00
Maksim Panchenko 63bebdd813 [BOLT][NFC] Change guard macros in headers
Summary: Change macro names to match the new directory structure.

(cherry picked from FBD32540857)
2021-11-18 12:21:38 -08:00
Rafael Auler 2ccea6eac3 Fix shared build
Summary:
We were not tracking -DBUILD_SHARED_LIBS=ON and we introduced
some commits that break that by not specifying the correct dependencies.
Fix that.

(cherry picked from FBD32453377)
2021-11-15 20:01:48 -08:00
Rafael Auler 2f3285989e [BOLT] Fix tailcall-traps and basic-instr tests on ubuntu
Summary: These tests are failing on opensource ubuntu.

(cherry picked from FBD32514489)
2021-11-17 15:38:36 -08:00
Amir Ayupov c7f8adb87f [BOLT][TEST] Add llvm-boltdiff to build/test requirements
Summary: llvm-boltdiff is required for `runtime/meta-merge-fdata.test`

(cherry picked from FBD32442220)
2021-11-15 13:53:18 -08:00
Amir Ayupov 1d0a276c72 [BOLT][TEST] Import small tests
Summary: Imported small internal tests.

(cherry picked from FBD32405870)
2021-11-12 15:38:45 -08:00
Amir Ayupov 7ea61dab03 [BOLT][TEST] Reduce vararg.test
Summary: Reduce assembly inputs to vararg.test using CReduce

(cherry picked from FBD32405869)
2021-11-11 20:05:09 -08:00
Marius Wachtler 3b00a3a2f8 [PR] instr: change assert to allow FD 0 return by __open()
Summary: In some cases __open() is returning 0 for me.  The open
syscall will return a negative number (-1) on error so 0 should be
valid.

This happens when one compiles a BOLT instrumented executable of
pyston (python implementation) and afterwards pip installs a package
which needs to be compiled and sets CFLAGS=-pipe.  I could not reduce
it down to a small testcase but I guess it one can trigger when
manually closing std{in, out, err}.  Everything seems to work
normally when disabling the assert for 0 in getBinaryPath() - I
decided to also modify the second case in readDescriptions() even
though I did not run into that one yet.

(cherry picked from FBD32409548)
2021-11-05 16:47:30 +01:00
Rafael Auler ae585be11c [BOLT] Fix Windows build
Summary:
Make BOLT build in VisualStudio compiler and run without
crashing on a simple test. Other tests are not running.

(cherry picked from FBD32378736)
2021-11-11 18:14:53 -08:00
Amir Ayupov 0e7dd1aad1 [BOLT][TEST] Import small tests
Summary: Imported small internal tests.

(cherry picked from FBD32371964)
2021-11-11 14:28:46 -08:00
Maksim Panchenko c42d467276 [BOLT][NFC] Remove unused function
(cherry picked from FBD32337755)
2021-11-10 17:11:34 -08:00
Amir Ayupov a82502d4a8 [BOLT][NFC] AsmDump: disable printing of empty profile data
Summary:
Moved the FDATA printing under the condition of non-empty profile data.
The change reduces the assembly dumps.

(cherry picked from FBD32262675)
2021-11-08 14:14:35 -08:00
Amir Ayupov 3a16f2169d [BOLT][TEST] Import jump-table-icp.test, update link_fdata script
Summary:
Import the test. The assembly input has three functions with associated fdata.
The old link_fdata.sh script only replaces the symbol names with symbol values,
whereas fdata format expects to have symbol offsets against the anchor symbol.
Introduce the link_fdata.py script which is able to parse the input and produce
either an offset or an absolute symbol value.

(cherry picked from FBD32256351)
2021-11-08 10:56:21 -08:00
Amir Ayupov 8331f75e28 [BOLT][TEST] Rename tests to follow standard naming scheme
Summary:
The majority of tests in LLVM projects are using - instead of _ in the name,
i.e. `check-something.test` is preferred over `check_something.test`.

It makes sense for us to adopt the same naming scheme for our future tests and
to rename existing ones.

(cherry picked from FBD32185879)
2021-11-04 13:36:15 -07:00
Amir Ayupov 2e0ad6ffe4 [BOLT][TEST] Import small tests
Summary:
Imported small internal tests:
- fallthrough-to-noop.test

(cherry picked from FBD32158100)
2021-11-03 17:09:49 -07:00
Amir Ayupov d1df113e30 [BOLT][TEST] Add instrumentation test using merge-fdata
Summary:
BOLT meta test using merge-fdata tool.

This tests BOLT instrumentation for a non-trivial binary, running instrumented
binary, and using the instrumentation profile for BOLT optimizations.
The results are verified between original, instrumented, and optimized binaries.
Additional tested features: boltdiff mode and merge-fdata for two profiles.

merge-fdata tool is linked with relocs on Linux to support this test.

(cherry picked from FBD32141812)
2021-11-03 10:41:26 -07:00
Amir Ayupov f808ea00bd [BOLT][TEST] Import small tests
Summary:
Imported small internal tests:
- asm_func_debug.test
- basic_instrumentation.test
- bolt_icf.test
- ctc_and_unreachable.test
- double_jump.test
- exceptions_args.test
- exceptions_instrumentation.test
- fptr.test

(cherry picked from FBD32032684)
2021-10-29 13:31:22 -07:00
Amir Ayupov 9ab0662211 [BOLT] TailDuplication: skip non-simple functions
Summary:
Replace erroneous check for function eligibility from `Function.isIgnored()`
to `shouldOptimize(Function)`. This prevents non-simple functions from being
processed.

(cherry picked from FBD32301958)
2021-11-09 17:13:00 -08:00
Maksim Panchenko 933df2a460 [BOLT][NFC] Remove references to internal tasks
(cherry picked from FBD32272387)
2021-11-08 19:54:05 -08:00
Maksim Panchenko 45f94abcd9 [BOLT][DWARF] Fix rare problem while rewriting debug_abbrev after LTO
Summary:
With LTO, it's possible for multiple DWARF compile units to share the
same abbreviation section set, i.e. to have the same abbrev_offset.
When units sharing the same abbrev set are located next to each other
and neither of them is being processed (i.e. contain processed
functions), it can trigger a bug in BOLT. When this happened,
the abbrev set is considered empty. Additionally, different units
may patch abbrev section differently.

The fix is to not rely on the next unit offset when detecting
abbreviation set boundaries and to delay writing abbrev section
until all units are processed.

(cherry picked from FBD31985046)
2021-10-27 20:28:17 -07:00
Vladislav Khmelevsky 172deb7594 [PR] Aarch64: Add ABS32/16 relocations support
Summary:
Add R_AARCH64_ABS32 and R_AARCH64_ABS16 relocations support

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31875254)
2021-10-19 16:46:20 +03:00
Alexey Moksyakov 85ffa8e4ba [PR][BOLT][Instrumentation] Optimize eflags load/store
Summary:
This commit uses reviews.llvm.org/D6629 as a reference to optimize
X86::EFLAGS load/store in the instrumentation snippet by using lahf/sahf
instructions instead of pushf/popf.

(cherry picked from FBD31662303)
2021-10-11 16:10:06 +00:00
Rafael Auler 443f1b4ff4 Rebase: [BOLT] AsmDump: dump function assembly and profile info
Summary:
Added new functionality of dumping simple functions into assembly.
This includes:
- function control flow (basic blocks, instructions),
- profile information as `FDATA` directives, to be consumed by link_fdata,
- data labels,
- CFI directives,
- symbols for callee functions,
- jump table symbols.

Envisioned usage:
1. Find a function that triggers BOLT crash (e.g. with `bughunter.sh`).
2. Generate reproducer asm source for that function (using `-funcs`).
3. Attach it to an issue.
4. Reduce and include as a test case.

Current limitations:
1. Emitted assembly won't match input file relocations.
2. No DWARF support.
3. Data is not emitted.

(cherry picked from FBD32746857)
2021-09-27 10:51:25 -07:00
Maksim Panchenko 60b0999723 [BOLT][NFC] Do not pass BinaryContext alongside BinaryFunction
Summary:
BinaryContext is available via BinaryFunction::getBinaryContext(),
hence there's no reason to pass both as arguments to a function.

In a similar fashion, BinaryBasicBlock has an access to BinaryFunction
via getFunction(). Eliminate unneeded arguments.

(cherry picked from FBD31921680)
2021-10-26 00:06:34 -07:00
Rafael Auler 0559dab546 [BOLT] Improve cmake configs for opensource
Summary:
Change cmake config in BOLT to only support Linux. In other
platforms, we print a warning that we won't build BOLT.  Change
configs to determine whether we will build BOLT runtime libs. This
only happens in x86 hosts. If true, we will build the runtime and
enable bolt-runtime tests. New tests that depend on the bolt_rt lib
needs to be marked REQUIRES:bolt-runtime. I updated the relevant
tests.  Fix cmake to do not crash when building llvm with a target
that BOLT does not support.

(cherry picked from FBD31935760)
2021-10-26 12:26:23 -07:00
Rafael Auler a34c753fe7 Rebase: [NFC] Refactor sources to be buildable in shared mode
Summary:
Moves source files into separate components, and make explicit
component dependency on each other, so LLVM build system knows how to
build BOLT in BUILD_SHARED_LIBS=ON.

Please use the -c merge.renamelimit=230 git option when rebasing your
work on top of this change.

To achieve this, we create a new library to hold core IR files (most
classes beginning with Binary in their names), a new library to hold
Utils, some command line options shared across both RewriteInstance
and core IR files, a new library called Rewrite to hold most classes
concerned with running top-level functions coordinating the binary
rewriting process, and a new library called Profile to hold classes
dealing with profile reading and writing.

To remove the dependency from BinaryContext into X86-specific classes,
we do some refactoring on the BinaryContext constructor to receive a
reference to the specific backend directly from RewriteInstance. Then,
the dependency on X86 or AArch64-specific classes is transfered to the
Rewrite library. We can't have the Core library depend on targets
because targets depend on Core (which would create a cycle).

Files implementing the entry point of a tool are transferred to the
tools/ folder. All header files are transferred to the include/
folder. The src/ folder was renamed to lib/.

(cherry picked from FBD32746834)
2021-10-08 11:47:10 -07:00
Marius Wachtler 46bc197d72 [PR] bolt_rt: getBinaryPath() increase max file path
Summary:
Increase the hard limit from 256 to 4096.
This fixes the 'Assertion failed: failed to open binary path' error I'm seeing.

(cherry picked from FBD31911946)
2021-10-25 20:42:29 +02:00
Maksim Panchenko 1ccc3d500e [BOLT] Add Dockerfile
Summary:
Dockerfile based on Ubuntu:20.04.

Fixes facebookincubator/BOLT#214.

(cherry picked from FBD31883210)
2021-10-23 15:44:08 -07:00
Vladislav Khmelevsky 95ee12977b [PR] Introduce remove-symtab option
Summary:
This patch introduces remove-symtab option to be able to skip emitting
symtab section in the final binary.
Also this patch adds ".zdebug_*" (compressed debug section) in the list
of debug section names.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31738239)
2021-10-16 17:02:45 +03:00
Vladislav Khmelevsky 10088a1e15 [PR] Fix warning
Summary:
Fix control reaches end of non-void function warning

(cherry picked from FBD31738391)
2021-10-17 14:25:57 +03:00
Maksim Panchenko 32782574d2 [BOLT][DWARF] Keep original line info for unmodified units
Summary:
Some compilation units will contain only code that is left unmodified by
BOLT, e.g. there is no profile data available for any function from such
units as they are rarely or never executed.

To save processing time and memory, we disable building line info tables
for such units and write unmodified tables to the output file.

(cherry picked from FBD31599759)
2021-10-11 12:05:34 -07:00
Vladislav Khmelevsky cb8d701b7b [PR] Disable instrumentation and hugify build for aarch64
Summary:
This patch temporarily disables instrumentation and higufy build not for
x86 platforms to be able to build llvm-bolt tool on aarch64.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31738306)
2021-10-16 17:35:29 +03:00
Vladislav Khmelevsky dc4b32e1b1 [PR] Skip NONE static relocations
Summary:
To supress warning of unsupported relocations

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31738420)
2021-10-17 16:36:24 +03:00
Vladislav Khmelevsky dcdd37fdc2 [PR] Instrumentation: Sync file on dump
Summary:
Sync the file with storage device on data dump to stabilize
instrumentation testing

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31738021)
2021-10-15 20:46:09 +03:00
Vladislav Khmelevsky 2d431eefbf [PR] Fix constant islands handling
Summary:
After the "Allocate memory for constant islands on-demand" patch there
are couple of problems found in constant islands handling:
1. When creating constant island dependency we need to check that we
already allocated IslandInfo for BF.
2. In ADRRelaxationPass we need to set constant island check under new
hasIslandsInfo condition.
3. In binaryemitter we need to replace hasConstantIsland with
hasIslandsInfo check since originally the BF might not have constant
island, but might have access to other's BF CI.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31737935)
2021-10-16 14:44:29 +03:00
Alexander Yermolovich fdd9184db5 [BOLT][DWARF] Refactor of Loc and LocLists writers
Summary:
Refactored Loc and LocList writers to write out entries during finalization phase,
 and hid some of the details in a class.
This simplifies things from impelementation details, and also will be needed for
DWARF5 where we need to know how many locLists entries there are there.

(cherry picked from FBD31563795)
2021-10-11 17:51:05 -07:00
Elvina Yakubova 53ec21e3a1 [PR][BOLT][TEST] Fix tests
Summary:
Add lit.local.cfg to X86 and AArch64 folders.
Fix host_arch in lit config for AArch64.
Fix AArch64 and X86 tests.

Elvina Yakubova,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31702068)
2021-10-11 11:15:08 +03:00
Vladislav Khmelevsky a2214e8f0d [PR] Fix LongJmp pass
Summary:
This patch handles 2 problems with LongJmp pass:
1. The pass should be executed before FinalizeFunctions, since the pass
may add new entry points for the function, and the
BinaryFunction::addEntryPoint has an assert "CurrentState == State::CFG"
2. Replaced shortJmp implementation with position-independent code.
Currently we could handle PIC binaries with max +-4Gb offsets, the
longJmp uses absolute addreses and could could be used only in non-PIE
binaries.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31416925)
2021-10-04 19:17:01 +03:00
Maksim Panchenko 96bb090653 [BOLT][DWARF] Use MCAsmLayout to update stmt_list values
Summary:
Use MCAsmLayout to update stmt_list in updateLineTableOffsets() instead
of manually calculating the layout.

(cherry picked from FBD31623071)
2021-10-13 13:19:06 -07:00
Maksim Panchenko 93444ce8e8 [BOLT] Fix build after auto rebase
(cherry picked from FBD31550675)
2021-10-11 12:46:22 -07:00
Maksim Panchenko 9bb3908b61 [BOLT] Allocate memory for constant islands on-demand
Summary:
Allocate memory for storing constant island info only when needed.

(cherry picked from FBD31510149)
2021-10-08 11:31:45 -07:00
Amir Ayupov 01a81dca41 [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- shared_object.test
- shrinkwrapping.test
- static_exe.test
- tailcall.test
- vararg.test

(cherry picked from FBD31523478)
2021-10-08 18:23:32 -07:00
Amir Ayupov 44e08ead30 [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- sctc_bug{,2,3,4}.test

(cherry picked from FBD31517120)
2021-10-08 14:49:23 -07:00
Amir Ayupov f44e1df9d0 [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- re-optimize.test
- relaxed_tailcall.test
- remove_unused.test
- retpoline_synthetic.test

(cherry picked from FBD31516680)
2021-10-08 14:33:33 -07:00
Amir Ayupov 872013e077 [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- cfi_instrs_reordered.s
- no_entry_reordering.test
- no_relocs.test
- pie.test

(cherry picked from FBD31514823)
2021-10-08 13:39:24 -07:00
Amir Ayupov d41b4e6e2d [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- keep_aranges.test
- layout_heuristic.test
- line_number.test
- block_reordering.test
- branch_data.test
- reader.test

(cherry picked from FBD31486371)
2021-10-07 13:38:58 -07:00
Amir Ayupov c74e5bfee3 [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- jmp_optimization.test
- jmpjmp.test
- jump_table_footprint_reduction.test
- jump_table_reference.test

(cherry picked from FBD31483122)
2021-10-06 16:20:00 -07:00
Amir Ayupov 92e306de0c [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- indirect_goto.test
- indirect_goto_pie.test
- inlined_function_mixed.test

(cherry picked from FBD31446571)
2021-10-06 12:23:05 -07:00
Vladislav Khmelevsky 5f953277a9 [PR] Handle relocations in constant islands
Summary:
In non-PIC binaries compiler could save absolute addresses in constant
isalnd which we should handle properly. This patch adds relocations
handling in constant islands.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31416848)
2021-10-04 19:05:18 +03:00
Amir Ayupov 8ab49cb4aa [BOLT] link_fdata: accept symbols with slash in the name
Summary:
Change sed separator to allow replacing symbols with slash in the name.
This is required for symbol names produced by BOLT which include
"/1" suffix.

(cherry picked from FBD31324540)
2021-09-30 16:11:09 -07:00
Amir Ayupov b86c91eae0 [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- invalid_profile.test
- internal_call.test
- internal_call_instrument.test

(cherry picked from FBD31452386)
2021-10-06 14:25:29 -07:00
Vladislav Khmelevsky e424d16f0e [PR] AArch64: Add TSTBR14 and CONDB19 relocations support
Summary:
This patch adds R_AARCH64_TSTBR14 and R_AARCH64_CONDBR19 relocations
support in order to handle condition branches, cbz/cnbz and tbz/tbnz
instructions correctly

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31416734)
2021-10-03 13:41:41 +03:00
Vladislav Khmelevsky 848f07792c [PR] Update skipRelocationProcess
Summary:
The ELF::R_AARCH64_TLSDESC_LD64_LO12 and
ELF::R_AARCH64_TLSDESC_ADR_PAGE21 relocations might also be relaxed to
mov instructions, handle these cases

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31353063)
2021-10-01 22:06:15 +03:00
Amir Ayupov c637fcf24e [BOLT][NFC] Use const pointers in PrintProgramStats
Summary: Small refactoring to use const BinaryFunction pointers in PrintProgramStats.

(cherry picked from FBD31387253)
2021-10-04 22:43:01 -07:00
Rafael Auler a8cbc8093f [BOLT] Do not process DWARF relocs
Summary:
Use the new API introduced in https://reviews.llvm.org/D106624
to request LLVM do not process relocations for debug sections, since
BOLT processes final binaries that are already relocated.

(cherry picked from FBD31449206)
2021-10-06 13:03:56 -07:00
Maksim Panchenko 8ef3b27834 [BOLT][DWARF] Properly emit of end-of-sequence entries for line tables
Summary:
When the compiler emits line table program, it emits EOS using the label
at the end of the containing code section. Since each compilation unit
has its own set of code sections it works as expected (* see the excerpt
from the standard below). However, in BOLT the code from many CUs is
combined into a common section, such as hot text or cold text.
As a result, the symbol at the end of the section may point way past the
code sequence for a given unit.

Since we can emit functions in any order, we conservatively emit
end-of-sequence at the end of every emitted function.

Fixes a problem while intermixing source code with disassembly in
binutils' objdump.

(*) DWARF v4 6.2.5.3:
"Every line number program sequence must end with a DW_LNE_end_sequence
instruction which creates a row whose address is that of the byte after
the last target machine instruction of the sequence."

(cherry picked from FBD31347870)
2021-09-30 17:47:50 -07:00
Maksim Panchenko 98bc9876fb [BOLT][DWARF] Change line info emission for unmodified functions
Summary:
Generate line tables for original/unmodified functions directly from
input line tables, bypassing conversion into intermediate structures,
such as BinaryLineDivisions.

Emit end-of-sequence markers only when necessary, i.e. when the line
sequence is not adjacent to the next one, or at the end of the line
sequence for the compilation unit.

If the sequence starts with ambiguous line info (multiple lines per
address), make sure we emit all such lines.

Reduce memory consumption when updating debug info by eliminating
intermediate data structures allocation.

(cherry picked from FBD30829448)
2021-09-08 10:22:19 -07:00
Amir Ayupov e903671bbf [BOLT][TEST] Imported small tests, removed duplicate input
Summary:
Imported small internal tests.
- call_zero.s
- cfi_expr_rewrite.s
- cfi_insts_count.s
- exceptions_pic.test
- exceptions_run.test

Removed duplicate input file (switch_statement.cpp)

(cherry picked from FBD31355466)
2021-10-01 15:35:43 -07:00
Maksim Panchenko 7b61cb7812 [BOLT][DWARF] Deprecate usage of DWARFAbbreviationDeclaration::findAttribute()
Summary: Deprecate the usage of extension to LLVM API.

(cherry picked from FBD31360154)
2021-10-01 21:01:05 -07:00
Maksim Panchenko d4a0e8526a [BOLT][DWARF] Move line info emission into BOLT
Summary:
BOLT needs to generate line info tables using absolute addresses as well
as using the standard MC way of labels attached to instructions. Move
line table generation code under BOLT.

Ideally, we should be able to extend existing interfaces in LLVM, but
without other users of the interface it will be hard to justify the
change.

(cherry picked from FBD30723466)
2021-09-01 21:40:54 -07:00
Maksim Panchenko ba1f503f1b [BOLT][NFC] Remove redundant code
Summary:
For historical reasons, we are populating FailedAddresses twice in
RewriteInstance. Remove the second (happening later) call to avoid the
confusion.

(cherry picked from FBD31278956)
2021-09-29 11:40:16 -07:00
Maksim Panchenko e3b901aaee [BOLT][DWARF] Fix abbrev offsets for type units
Summary:
When rewriting .debug_abbrev section, update abbrev offsets for type
units in addition to compile units.

Reuse abbreviation entries if they were shared by multiple compile/type
units.

(cherry picked from FBD31262326)
2021-09-28 23:30:06 -07:00
Amir Ayupov 47455e98b3 [BOLT][TEST] Imported small tests
Summary:
Imported small internal tests:
- R_X86_64_64.pic.lld.cpp
- avx512_trap.test
- bad_exe.test
- bolt_info.test

(cherry picked from FBD31251439)
2021-09-28 15:47:51 -07:00
Rafael Auler 62550dd22c Rebase: [PR] Fix build instructions
Summary:
As titled.

(cherry picked from FBD32740596)
2021-09-25 21:20:47 +03:00
Amir Ayupov 4157682fd9 [BOLT][TEST] Import internal_call_instrument.s
Summary: Imported standalone assembly test

(cherry picked from FBD31161181)
2021-09-23 14:28:13 -07:00
Amir Ayupov 6b4eb0b94a [BOLT][TEST] Split runtime tests into test/runtime folder
Summary:
Create bolt/test/runtime folder and move tests that execute the binary.
Move lit.local.cfg with host_arch check to the corresponding folder.
Addresses issue facebookincubator/BOLT#132.

AArch64/tls.c shows a different behavior with clang hence marked as XFAIL

TODO: add a check for non-exec tests for a corresponding LLVM_TARGETS_TO_BUILD.

(cherry picked from FBD31132234)
2021-09-22 17:58:33 -07:00
Maksim Panchenko 122254bc35 [BOLT][DWARF][NFC] Get rid of updateRangeBase() helper function
Summary:
Move attribute patching code out of updateRangesBase into
convertToRanges() functions.

(cherry picked from FBD31154742)
2021-09-23 14:08:15 -07:00
Maksim Panchenko 64db3e7b7c [BOLT][DWARF][NFC] Use only skeleton/main CUs to update .debug_aranges
Summary:
Previously, we were registering all CUs with aranges writer. Since DWO
CUs have offsets set to 0, and we were registering them after the
skeleton unit at offset 0 was already registered, it was mostly
harmless as DWO CUs were effectively ignored.

(cherry picked from FBD31162621)
2021-09-23 19:08:54 -07:00
Maksim Panchenko 4d5cd1bf82 [BOLT][DWARF] Write new .debug_abbrev sections
Summary:
Instead of patching the original .debug_abbrev section contents,
generate new section data based on parsed compilation unit
abbreviations.

This eliminates the dependency on the LLVM extension that records
abbreviation attribute offsets while parsing .debug_abbrev contents.

The output with this patch should stay the same (NFC).

(cherry picked from FBD31133611)
2021-09-17 14:48:14 -07:00
Vladislav Khmelevsky e1da1539e3 [PR] Add AARCH64_MOVW_UABS_G* relocations support
Summary:
This patch fixes issue facebookincubator/BOLT#177

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31130162)
2021-09-23 00:52:36 +03:00
Amir Ayupov d4fdc98140 [BOLT][TEST] Remove dependence on host_cc and host_cxx
Summary: Add dependency on clang and clangxx instead.

(cherry picked from FBD31128140)
2021-09-22 15:53:38 -07:00
Maksim Panchenko 43fffff671 [BOLT][DWARF][NFC] Refactor code
Summary: Minor refactoring to improve code readability.

(cherry picked from FBD31122375)
2021-09-22 13:10:19 -07:00
Vladislav Khmelevsky 00c0659b13 [PR] AArch64: Skip some of the relocations processing
Summary:
There are some cases, when relocations must not be processed by bolt.
This patch handles three of such cases:
* The linker might eliminate the instruction and replace it with NOP
* The linker might perform TLS relocations relaxations, replacing the
got to direct TP + offset access.
* Due to errata 843419 the linker might create a veneer, replacing the
load/store instruction with branching.

In both cases linker leaves old relocations, that are no longer matches
the instruction emmited to binary, so we must avoid processing of these
relocations.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31002384)
2021-09-08 13:37:19 +03:00
Vladislav Khmelevsky 542c03c3a3 [PR] Fix aarch64 TLS relocations handling
Summary:
There are few problems found when dealing with TLS relocations for
aarch64.

* RewriteInstance.cpp
** While analyzing TLS relocation we don't have to modify
SymbolAddress (which is the offset from the TLS section), so we need to
just skip verifiction
** The non-got related TLS relocations on aarch64 might be skipped too
** The forse relocation must be applied for GOT relocations on
Aarch64. The symbol adress for GOT relocation might no be pointing
on GOT section (for example ADRP GOT may point to the wrong section,
since GOT table is not page-aligned), so we won't try to get section by
the symbol address.

* Relocation.cpp - Remove R_AARCH64_TLSLE_ADD_TPREL_HI12 and
R_AARCH64_TLSLE_ADD_TPREL_LO12_NC from isGOT check, since they are not
got-related relocations

* BinaryFunction.h
** Remove R_AARCH64_TLSLE_ADD_TPREL_HI12 and
R_AARCH64_TLSLE_ADD_TPREL_LO12_NC from adding to relocation list, since
this is actually an offset in TLS section and BOLT does not change it we
don't need to do something with this relocations, the value won't change
in new binary files
** Refactor the code, separating aarch64 and x86 relocations

* AArch64MCPlusBuilder.cpp
** Add forgotten LO12 relocations to switch case to getTargetExprFor

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD31003349)
2021-09-02 21:04:33 +03:00
Maksim Panchenko 48fbeb1a46 [BOLT] Fix warnings from LLVM DWARF reading library
Summary:
LLVM started printing warnings when DWARFDebugInfoEntry::extractFast()
is invoked trying to read a DIE past the current unit limits. This
results in verbose warnings from BOLT which are harmless but confusing
to the user. Check the boundaries before calling the API above.

(cherry picked from FBD31097271)
2021-09-21 15:39:35 -07:00
Rafael Auler 1ca3a8b824 [NFC] Fix warnings when building with clang
Summary:
Fix switch-cases that don't handle all MCCFIInstruction
enumeration types. Fix range-loop iterator forced copy.

(cherry picked from FBD31068505)
2021-09-20 15:16:01 -07:00
Rafael Auler 47ce9b39e4 [BOLT] [NFC] Cleanup old code in mapCodeSections
Summary:
In "Add initial function injection support", Laith added this
code because injected functions would use the original text section as
the section to emit their code to. Now, what happens is that functions
are mapped to either their own section in non-reloc mode, or mapped to
a particular section in the pass reassign sections. So this section does
not need to have an output address anymore and this code is obsolete.

(cherry picked from FBD30980450)
2021-09-15 18:03:50 -07:00
Rafael Auler 7b779f819f [BOLT] Fix binary corruption in non-reloc mode
Summary:
We have a problem where we will emit sections that we are not supposed
to emit (with no output offset assigned). This will make us write at
file offset 0 and corrupt the first sections in the binary (usually
.interp section will be corrupted and bash will refuse to run the
binary).

This only happens in non-reloc mode when using JTS_BASIC and when we
do not emit a function that has a jump table (if it gets too large).

Using -update-debug-sections will trigger the pass
check-large-functions, which will mark large funcs as non-simple
and will hide this bug.

(cherry picked from FBD30882012)
2021-09-10 16:19:50 -07:00
Vasily Leonenko 9aa134dc2d [PR] Instrumentation: use TryLock for SimpleHashTable getter
Summary:
This commit introduces TryLock usage for SimpleHashTable getter to
avoid deadlock and relax syscalls usage which causes significant
overhead in runtime.
The old behavior left under -conservative-instrumentation option passed
to instrumentation library.
Also, this commit includes a corresponding test case: instrumentation of
executable which performs indirect calls from common code and signal
handler.

Note: in case if TryLock was failed to acquire the lock - this indirect
call will not be accounted in the resulting profile.

Vasily Leonenko,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30821949)
2021-08-08 04:50:06 +08:00
Vasily Leonenko e2480fcc98 [PR] LIT: add checking if maxIndividualTestTime is availabe on the platform
Summary:
This commit adds checking if maxIndividualTestTime is availabe on
the platform. If available - it sets per test timeout to 60sec and
declares lit-max-individual-test-time feature for further checking
by particular test cases.
Based on https://reviews.llvm.org/D64251 implementation.

Vasily Leonenko,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30821986)
2021-08-27 21:56:24 +03:00
Vladislav Khmelevsky 856299594c [PR] ReorderAlgorithm.cpp: Fix iterator types
Summary:
The clang 12 doesn't want to build this place due to unrelated
types of iterator element and std vector.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30821177)
2021-09-06 20:30:22 +03:00
Alexander Yermolovich 23fc454f68 [BOLT] Refactor to use new APIs for getting offset of attribute
Summary: Changing to use the new APIs for getting offset of attribute from .debug_info. They were split in to multiple ones so that Offset can be gotten seperatly.

(cherry picked from FBD30616705)
2021-08-27 13:48:31 -07:00
Joey Thaman 3e8af67a95 [BOLT] Optimize the three way branch
Summary:
Three way branches commonly appear
in HHVM. They have one test and then two jumps.  The
jump's destinations are not currently optimized.
This pass attempts to optimize which is the first branch.

(cherry picked from FBD30460441)
2021-08-17 10:15:21 -07:00
Vladislav Khmelevsky c040431fe6 [PR] AArch64: Fix ADR instruction handling
Summary:
There are 2 problems found when handling ADR instruction:
1. When extracting value from the ADR instruction we need to do
it another way, then we do it for ADRP instruction.
2. When creating target expression the VariantKind should be other for
ADR instruction.

And we introduces R_AARCH64_ADR_PREL_LO21,
R_AARCH64_TLSDESC_ADR_PREL21 and R_AARCH64_ADR_PREL_PG_HI21_NC
relocations support.

Also this patch introduces AdrPass, which will replace non-local
pointing ADR instructions with ADRP + ADD instructions sequence due to
small offset range of ADR instruction, so after BOLT magic there are no
guarantees that ADR instruction will still be in the range of
just +- 1MB from its target. The instruction replacement needs
relocations to be avalailable, so we won't remove "IsFromCode"
relocations after disassembly from BF anymore. Also we need original
offset of ADR instruction to be available so we add offset annotation
for these instructions.

The last thing this patch adds is ARM testing directory, which will be
used only on ARM testing servers. The common tests (non-assembler tests
which are platform-independent) might be moved from the X86 directory to
the parent one in the future, so such tests could be tested on both X86
and ARM machines.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30497379)
2021-08-20 03:07:01 +03:00
Vladislav Khmelevsky a1036e42da [PR] Print relocations warning if failed to process
Summary:
Currently most of the warnings are printed only in debug mode. Since
relocations are very important for binary correct work I suggest to
print number of failed to process relocations to pay extra attention in
case some problems with them were met

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30500629)
2021-08-22 02:44:30 +03:00
Joey Thaman ef6186c822 [BOLT] Added Constant and Copy Propagation to tail duplicated blocks
Summary:
Added a function in TailDuplication
that will do Constant and Copy Propagation for blocks that
we duplicated as a part of tail duplication.  Added supporting
functions to MCPlusBuilder to find src registers and replace
registers

(cherry picked from FBD30231907)
2021-08-10 10:02:32 -07:00
Vladislav Khmelevsky 2a5790b670 [PR] Fdata: Escape whitespaces in symbol names
Summary:
This patch is part of preparation for golang support. The golang symbols
might have spaces in the name (for example "type..eq.[10]interface {}").
Since fdata uses spaces as a field separator such names brakes the fdata
format, so we need to escape whitespaces and backslashes in symbol names
using the backslash character.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD29999491)
2021-06-29 19:54:08 +03:00
Amir Ayupov b64de07569 [BOLT][NFC][PR] Removed unused singletonSet
Summary:
Remove unused code introduced a while ago (2016), with its use removed
since then.

PR facebookincubator/BOLT#198

Author: Amir Aupov <aaupov@fb.com>

(cherry picked from FBD30376537)
2021-08-12 14:46:50 -07:00
Vladislav Khmelevsky 8459c14c68 [PR] Fix AARCH64 ADR* relocations
Summary:
The ADRP instructions has 21 bits to store page offsets + 12 lowest bits
are zero, that give us a total of 33 bits (32 bits for address + 1 sign
bit, to address +- 4GB).

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30283044)
2021-08-11 22:21:37 +03:00
Rafael Auler faee814fb9 Fix NFC tests
Summary:
Our NFC tests are failing on debug-fission-single.s. Fix the test
to be compliant with our checking script.

(cherry picked from FBD30352415)
2021-08-16 11:33:20 -07:00
Rafael Auler d217e2f338 Rebase: [BOLT] DWP output support
Summary:
Added support for writing out DWP file. Works with regular dwo as input or DWP as input.

(cherry picked from FBD31361619)
2021-06-29 15:28:52 -07:00
Vasily Leonenko 900914d3c6 [PR] Tests: add instrumentation tests for PIE exec & shared libs
Summary:
This commit adds dummy tests for checking instrumentation
support for PIE executables and shared libraries.

Vasily Leonenko,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092729)
2021-06-19 23:01:28 +08:00
Vladislav Khmelevsky af58da4ef3 [PR] Instrumentation: Avoid generating GOT table in instrumentation library
Summary:
To avoid RELATIVE relocations avoid using of GOT table
by using hidden visibility for all symbols in library.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092712)
2021-07-22 00:04:28 +03:00
Vladislav Khmelevsky 553f28e921 [PR] Instrumentation: Fix start and fini trampoline pointers
Summary:
The trampolines are no loger pointers to the functions.  For
propper name resolving by bolt use extern "C" for all external symbols
in instr.cpp

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092698)
2021-07-31 00:29:23 +03:00
Vasily Leonenko 519cbbaa9a [PR] Instrumentation: Introduce instrumentation-binpath argument
Summary:
This commit introduces -instrumentation-binpath argument used
to point instuqmented binary in runtime in case if /proc/self/map_files
path is not accessible due to access restriction issues.

Vasily Leonenko
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092681)
2021-07-30 18:07:53 +03:00
Vasily Leonenko 285ac26d16 [PR] README: remove note about experimental status of instrumentation
Summary:
Vasily Leonenko,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092666)
2021-06-25 16:27:47 +08:00
Vladislav Khmelevsky 361f3b5576 [PR] Instrumentation: Fix runtime handlers for PIE files
Summary:
This commit fixes runtime instrumentation handlers for PIE
binaries case.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092522)
2021-06-23 18:24:09 +00:00
Vasily Leonenko 9b39a823ea [PR] Instrumentation: Initial support for static executables
Summary:
This commit introduces static binaries instrumentation
support.  Note that current implementation does not support profile
output on the instrumented binary finalization. So it requires to use
-instrumentation-sleep-time=N (N>0) option usage.  Note: There is
unhandled case with static PIE executable which might have dynamic
header.

Vasily Leonenko,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092471)
2021-06-21 01:59:38 +08:00
Elvina Yakubova 2ffd6e2b43 [PR] Instrumentation: Add support for opening libs based on links /proc/self/map_files
Summary:
This commit adds support for opening libs based on links
/proc/self/map_files.  For this we're getting current virtual address
and searching the lib in the directory with such address range. After
that, we're getting full path to the binary by using readlink
function. Direct read from link in /proc/self/map_files entries is not
possible because of lack of permissions.

Elvina Yakubova,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092422)
2021-01-19 02:08:55 +08:00
Elvina Yakubova 6665c628ea [PR] Instrumentation: Add readlink and getdents support
Summary:
This commit adds support for getting directory entries and
reading value of a symbolic link in instrumentation runtime library

Elvina Yakubova,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092362)
2021-01-18 22:08:10 +08:00
Vasily Leonenko ad79d51778 [PR] Instrumentation: Generate and use _start and _fini trampolines
Summary:
This commit implements new method for _start & _fini functions hooking
which allows to use relative jumps for future PIE & .so library support.
Instead of using absolute address of _start & _fini functions known on
linking stage - we'll use dynamically created trampoline functions and
use corresponding symbols in instrumentation runtime library.

As we would like to use instrumentation for dynamically loaded binaries
(with PIE & .so), thus we need to compile instrumentation library with
"-fPIC" flag to support relative address resolution for functions and
data.

For shared libraries we need to handle initialization of instrumentation
library case by using DT_INIT section entry point.

Also this commit adds detection if the binary is executable or shared
library based on existence of PT_INTERP header. In case of shared
library we save information about real library init function address
for further usage for instrumentation library init trampoline function
creation and also update DT_INIT to point instrumentation library init
function.

Functions called from init/fini functions should be called with forced
stack alignment to avoid issues with instructions which relies on it.
E.g. optimized string operations.

Vasily Leonenko,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30092316)
2021-06-19 04:08:35 +08:00
Amir Ayupov 60b10a8ead [BOLT][NFC] Unify isTailCall interface across X86 and AArch64
Summary:
Move the common code into MCPlusBuilder.h.
Use group 1 `kTailCall` MCAnnotation instead of dynamically allocated
annotation.
This diff reduces the processing time overhead to 1.5% vs using
TAILJMP opcode.

(cherry picked from FBD30055585)
2021-07-29 17:28:51 -07:00
Maksim Panchenko 89a2e16037 [BOLT] Support PLT sections with variable entry sizes
Summary:
The linker can generate 8- or 16-byte entries in .plt.got and .plt.sec
sections. On X86, the main differentiator is the presence of endbr64
instruction at the beginning of the entry. Detect the instruction and
adjust the size accordingly.

(cherry picked from FBD29847639)
2021-07-14 01:35:34 -07:00
Amir Ayupov c33f08e7df [BOLT] Update build instructions in README
Summary: Remove llvm.patch from build instructions.

(cherry picked from FBD29973395)
2021-07-28 14:45:10 -07:00
Joey Thaman a7e2a8f946 [BOLT] Tail Duplication active pass
Summary:
Amended the Tail Duplication
analysis pass to do the tail duplication in question

(cherry picked from FBD29833794)
2021-07-16 11:45:44 -07:00
Vasily Leonenko 68be8caf3f RewriteInstance: account .stab and .stabstr as debug sections
Summary:
.stab and .stabstr are special sections containing debugging
information and strings associated with the debugging information.
This commit adds them to the list of debugging sections, so
these sections can be removed for output binary.

Vasily Leonenko,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD29746153)
2021-06-25 15:42:56 +08:00
James Luo 0df7bf7b8b [BOLT][CSSPGO] Handle indirect call promotion in Pseudo Probe Integration
Summary:
Match new direct call generated during ICP to correct pseudo probe

New call is matched to the probes of original call instruction.

(cherry picked from FBD29591662)
2021-07-16 16:05:18 -07:00
James Luo 3e55dea4dd [BOLT][CSSPGO] Encode pseudo probe section to binary
Summary:
Update .pseudo_probe section in input binary

DFS inline tree and emit pseudo probes with updated addresses

(cherry picked from FBD29522142)
2021-07-15 14:58:32 -07:00
Joey Thaman 2f46660559 [BOLT] Tail duplication analysis pass
Summary:
Created a binary pass that records how many
times tail duplication would be used and how many cache
misses it would theoretically stop

(cherry picked from FBD29619858)
2021-07-01 07:11:26 -07:00
Zino Benaissa 60b15062e1 [BOLT] Dump dynamic execution per instruction opcode
Summary:
We extended DynoStats to dump the histogram per instruction opcode. By
default the dump is turned off. Use '-print-dyno-opcode-stats' to enable
the dump.

BOLT also dumps for each instruction opcode the maximum execution count and
corresponding function name and basic block offsets where the instruction
occurs. Below is a sample of the dump:

                   Opcode,    Execution Count,      Max Exec Count, Function Name:Offset
                  SHR8rCL,                232,                 232, _ZNK5folly14AsyncSSLSocket4goodEv:53
                VPADDDYrr,              13956,                 388, chacha20_encrypt_bytes.part.0/3:736
               PMOVSXBWrr,                  4,                   2, ares_expand_name/1:264
                VMOVAPSmr,               1082,                  43, chacha20_encrypt_bytes.part.0/3:2864
                VPSHUFBrr,               9540,                1667, chacha20_encrypt_bytes.part.0/3:4416
            VPUNPCKLDQYrr,               1102,                 188, jsimd_ycc_rgb_convert_avx2/1:125
          VPBROADCASTQYrm,                 39,                  39, chacha20_encrypt_bytes.part.0/3:400
               PMOVSXWDrr,                  8,                   2, ares_expand_name/1:264
                   VPORrr,                817,                 129, jsimd_idct_islow_avx2/1:41
                  PSLLDri,            8690752,               65644, blockmix_salsa8_xor/1:1424

(cherry picked from FBD28859624)
2021-05-24 21:33:43 -07:00
Maksim Panchenko c9f5f47b51 [BOLT] Add support for .plt.sec and refactor PLT-reading code
Summary:
A binary can contain multiple PLT sections with different name and
attributes (such as an entry size). Extend the support to .plt.sec and
refactor the code to make future extensions simpler.

(cherry picked from FBD29502107)
2021-06-30 14:41:41 -07:00
Joey Thaman 4c12afc1f4 [BOLT][NFC] Resolved all clang-12 warnings for bolt
Summary:
clang-12 now compiles bolt without warnings.
Some warnings were fixed if possible while others were suppressed by
doing (void)variable for unused variable warnings or moving code inside
assert statements of LLVM_DEBUG blocks.

(cherry picked from FBD29469054)
2021-06-29 12:11:56 -07:00
Maksim Panchenko 1de0746790 [BOLT] Read all dynamic relocations and refactor code
Summary:
Add code to read more dynamic relocations (DT_JMPREL) and enforce strict
checks that corresponding sections sizes match .dynamic entry
description.

(cherry picked from FBD29502109)
2021-06-30 14:38:50 -07:00
Alexander Yermolovich f7499c6711 [BOLT][DWARF] Fix writing out dwo with DWP as input
Summary:
The code for writing out dwo files wasn't handling case where DWP is an input.
Because all the sections are part of the same binary.

One note with current implementation. .debug-str.dwo will have strings for all the dwo objects.
This is because llvm-dwp de-duplicates strings and combines them in to one section. It then re-writes .debug-str-offsets.dwo to point to new .debug-str.dwo section.

(cherry picked from FBD29244835)
2021-06-18 15:57:34 -07:00
Maksim Panchenko 3e5ce1f282 [BOLT][TESTS] Remove dynamic relocations from YAML tests
Summary:
Our YAML objects contain references to dynamic relocations via .dynamic,
but there are no corresponding relocation sections. Change .dynamic
contents to specify no dynamic relocations.

(cherry picked from FBD29502108)
2021-06-30 14:33:59 -07:00
Amir Ayupov a07d24cc4b [BOLT][NFC] Un-inline checking AArch64 linker veneers out of disassemble loop
Summary:
Move the AArch64 `matchLinkerVeneer` check out of a for-loop
in `BinaryFunction::disassemble`

(cherry picked from FBD29411348)
2021-06-25 17:52:51 -07:00
Amir Ayupov c7c0803b59 [BOLT][NFC] Un-inline indirect branch handling out of disassemble loop
Summary:
Move the `processIndirectBranch` switch statement out of a for-loop
in `BinaryFunction::disassemble`

(cherry picked from FBD29411346)
2021-06-25 17:49:43 -07:00
Amir Ayupov 8f751bc058 [BOLT][NFC] Un-inline adding external references out of disassemble loop
Summary:
Move the code that handles true external references (non-unreachable)
out of a for-loop in `BinaryFunction::disassemble`.

(cherry picked from FBD29411345)
2021-06-25 17:32:25 -07:00
Amir Ayupov 8f7a400629 [BOLT][NFC] Delete MoveRelocations entirely
Summary: MoveRelocations are unused. Remove interfaces and emission part.

(cherry picked from FBD29468409)
2021-06-25 17:06:21 -07:00
Maksim Panchenko 38c5887992 [BOLT][NFC] Always process runtime relocations
Summary:
Dynamic relocations applied at runtime should be processed even in
non-relocation mode.

(cherry picked from FBD29311906)
2021-06-22 13:46:06 -07:00
Amir Ayupov ef1b1e7184 [BOLT][NFC] Refactor handlePCRelOperand
Summary: Move error logging to handlePCRelOperand, reduce code duplication

(cherry picked from FBD29309702)
2021-06-17 17:41:28 -07:00
Amir Ayupov b964e852d5 [BOLT][NFC] Readability improvements in X86,Aarch64 MCPlusBuilder
Summary: Minor refactorings in target specific MCPlusBuilders to improve readability

(cherry picked from FBD29309701)
2021-06-17 18:22:32 -07:00
James Luo dea6c247d9 [BOLT][CSSPGO] Relate decoded pseudo probe basic blocks
Summary:
Assign decoded pseudo probe to correlated output block

Pseudo probes can then be encoded to a proper address

(cherry picked from FBD29211688)
2021-06-25 11:42:58 -07:00
Amir Ayupov 521a61b056 [BOLT][NFC] Use MCPlusBuilder::isPseudo
Summary: Consistently use this interface across BOLT codebase

(cherry picked from FBD29171718)
2021-06-16 12:10:20 -07:00
Amir Ayupov da276d73c7 [BOLT] Handle R_X86_64_64 in flushPendingRelocations
Summary:
Handle R_X86_64_64 the same way as R_X86_64_32;
`getSizeForType` takes care of the size:

```x86_64 ABI relocation types
Name        Value Field  Calculation
R_X86_64_64 1     word64 S + A
R_X86_64_32 10    word32 S + A
```

(cherry picked from FBD29370417)
2021-06-24 12:18:16 -07:00