Commit Graph

367934 Commits

Author SHA1 Message Date
Mircea Trofin 17640c5aac [NFC] Let (MC)Register APIs check isStackSlot
The user is expected to make the isStackSlot check before calling isPhysicalRegister
or isVirtualRegister. The APIs assert otherwise. We can improve the usability
of these APIs by carrying out the check in the 2 APIs: they become a
complete "source of truth" and remove an extra responsibility from the
user.

Differential Revision: https://reviews.llvm.org/D88598
2020-10-01 09:55:20 -07:00
Shoaib Meenai dcb5b6dfbf [runtimes] Remove TOOLCHAIN_TOOLS specialization
https://reviews.llvm.org/D88310 fixed the AIX issue in LLVMExternalProjectUtils,
so we shouldn't need the workaround in the runtimes build anymore. I'm
reverting it because it prevents the target-specific tool selection in
LLVMExternalProjectUtils from taking effect, which we rely on for our
runtimes builds.

Reviewed By: daltenty

Differential Revision: https://reviews.llvm.org/D88627
2020-10-01 09:53:10 -07:00
MaheshRavishankar c6ea095b97 [mlir][Linalg] NFC : Move fusion on tensors to separate file.
Differential Revision: https://reviews.llvm.org/D88633
2020-10-01 09:50:37 -07:00
Vy Nguyen cb3fd715f3 Reland rG4fcd1a8e6528:[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking.
This is mostly for the benefit of the LBR latency mode.
Right now, it performs no checking. If this is run on non-supported hardware, it will produce all zeroes for latency.

      Differential Revision: https://reviews.llvm.org/D85254

New change: Updated lit.local.cfg to use pass the right argument to llvm-exegesis to actually request the LBR mode.

Differential Revision: https://reviews.llvm.org/D88670
2020-10-01 12:21:16 -04:00
Utkarsh Saxena 45698ac005 [clangd] Split DecisionForest Evaluate() into one func per tree.
This allows us MSAN to instrument this function. Previous version is not
instrumentable due to it shear volume.

Differential Revision: https://reviews.llvm.org/D88536
2020-10-01 18:07:23 +02:00
Martin Storsjö f4b9dfd9bc [AArch64] Don't merge sp decrement into later stores when using WinCFI
This matches the corresponding existing case in
AArch64LoadStoreOpt::findMatchingUpdateInsnForward.

Both cases could also be modified to check
MBBI->getFlag(FrameSetup/FrameDestroy) instead of forbidding any
optimization involving SP, but the effect is probably pretty much
the same.

Differential Revision: https://reviews.llvm.org/D88541
2020-10-01 19:03:27 +03:00
Martin Storsjö 51e74e21aa [AArch64] Remove a duplicate call to setHasWinCFI. NFCI.
The function already has a cleanup scope that calls the same whenever
the function is exited. When reading the code, seeing that this return
codepath has an explicit call while other return paths lack it is
confusing.

In the hypothetical case of a function having a prologue that
set the HasWinCFI flag in the MF, but the epilogue containing no
WinCFI instructions, the HasWinCFI flag in the MF would end up reset back
to false.

Differential Revision: https://reviews.llvm.org/D88636
2020-10-01 19:03:27 +03:00
Simon Pilgrim 29ac9fae54 [InstCombine] collectBitParts - convert to use PatterMatch matchers and avoid IntegerType casts.
Make sure we're using getScalarSizeInBits instead of cast<IntegerType> to get Type bit widths.

This is preliminary cleanup before we can start adding vector support to the bswap/bitreverse (element level) matching.
2020-10-01 16:44:14 +01:00
Michael Liao 8c36eaf037 [clang][opencl][codegen] Remove the insertion of `correctly-rounded-divide-sqrt-fp-math` fn-attr.
- `-cl-fp32-correctly-rounded-divide-sqrt` is already handled in a
  per-instruction manner by annotating the accuracy required. There's no
  need to add that fn-attr. So far, there's no in-tree backend handling
  that attr and that OpenCL specific option.
- In case that out-of-tree backends are broken, this change could be
  reverted if those backends could not be fixed.

Differential Revision: https://reviews.llvm.org/D88424
2020-10-01 11:07:39 -04:00
Meera Nakrani 48c9e8244b [ARM] Removed hasSideEffects from signed/unsigned saturates
Removed hasSideEffects from SSAT and USAT so that they are no longer
marked as unpredictable.

Differential Revision: https://reviews.llvm.org/D88545
2020-10-01 14:55:01 +00:00
Louis Dionne 79410ddb96 [libc++][ci] Add a configuration testing Apple's system library build
Differential Revision: https://reviews.llvm.org/D88650
2020-10-01 10:37:36 -04:00
Valentin Clement 91b49fc257 [flang][openacc] Fix unparsing of combined construct (bug 47659)
This patch fixes the bug report in https://bugs.llvm.org/show_bug.cgi?id=47659

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D88597
2020-10-01 10:35:06 -04:00
Jay Foad e20f459229 [AMDGPU] Simplify getNumFlatOffsetBits. NFC.
Remove some checks that have already been done in the only caller.
2020-10-01 15:24:09 +01:00
LLVM GN Syncbot 56d8a37216 [gn build] Port f6b1323bc6 2020-10-01 14:18:52 +00:00
Sam McCall f6b1323bc6 Reland [clangd] clangd --check: standalone diagnosis of common problems
This reverts commit 30d07b14a2.

Test failures have (hopefully) been fixed.
2020-10-01 16:18:18 +02:00
Sam McCall 30d07b14a2 Revert "[clangd] clangd --check: standalone diagnosis of common problems"
This reverts commit 79fbcbff41.

The fallback command fails to parse for the test files if there's no
compile_commands.json in the tree.
2020-10-01 16:10:03 +02:00
Eduardo Caldas 5011d43108 Migrate Declarators to use the List API
After this change all nodes that have a delimited-list are using the
`List` API.

Implementation details:
Let's look at a declaration with multiple declarators:
`int a, b;`
To generate a declarator list node we need to have the range of
declarators: `a, b`:
However, the `ClangAST` actually stores them as separate declarations:
`int a   ;`
`int    b;`
We solve that by appropriately marking the declarators on each separate
declaration in the `ClangAST` and then for the final declarator `int
b`, shrinking its range to fit to the already marked declarators.

Differential Revision: https://reviews.llvm.org/D88403
2020-10-01 13:56:31 +00:00
Sam McCall 79fbcbff41 [clangd] clangd --check: standalone diagnosis of common problems
This is a tool to simply parse a file as clangd would, and run some
common features (code actions, go-to-definition, hover) in an attempt to
trigger or reproduce crashes, error diagnostics, etc.

This is easier and more predictable than loading the file in clangd, because:
 - there's no editor/plugin variation to worry about
 - there's no accidental variation of user behavior or other extraneous requests
 - we trigger features at every token, rather than guessing
 - everything is synchronoous, logs are easier to reason about
 - it's easier to (get users to) capture logs when running on the command-line

This is a fairly lightweight variant of this idea.
We could do a lot more with it, and maybe we should.
But I can't in the near future, and experience will tell us if we made
the right tradeoffs and if it's worth investing further.

Differential Revision: https://reviews.llvm.org/D88338
2020-10-01 15:47:47 +02:00
David Tenty 5665ec4e18 [compiler-rt][cmake][powerpc] Remove TEST_BIG_ENDIAN from base-config-ix.cmake
It's actually not safe to call TEST_BIG_ENDIAN here, since we may be
running from the builtins build (i.e builtins-config-ix) context where
TEST_COMPILE_ONLY  is set since without builtins already built we may
fail to link, and TEST_BIG_ENDIAN internally performs tests which may
fail to link without builtins.

Fortunately powerpc is the only target that uses this information here and
we actually already know the whether we are targeting the LE variant due
to earlier macro checks, so we can simply this to remove our reliance on
TEST_BIG_ENDIAN.

Reviewed By: hubert.reinterpretcast, Whitney

Differential Revision: https://reviews.llvm.org/D88608
2020-10-01 09:45:07 -04:00
Simon Pilgrim 567049f892 [InstCombine] Use m_FAbs matcher helper. NFCI. 2020-10-01 14:42:34 +01:00
Simon Pilgrim 95a440b936 [IR] PatternMatch - add m_FShl/m_FShr funnel shift intrinsic matchers. NFCI. 2020-10-01 14:42:34 +01:00
Jay Foad 866d9b03f2 [AMDGPU] Tiny cleanup in isLegalFLATOffset. NFC. 2020-10-01 14:26:03 +01:00
David Sherwood 15474d7691 [SVE][CodeGen] Replace use of TypeSize operator< in GlobalMerge::doMerge
We don't support global variables with scalable vector types so I've
changed the code to compare the fixed sizes instead.

Differential Revision: https://reviews.llvm.org/D88564
2020-10-01 14:06:59 +01:00
James Henderson a20168d030 [Archive] Don't throw away errors for malformed archive members
When adding an archive member with a problem, e.g. a new bitcode with an
old archiver, containing an unsupported attribute, or an ELF file with a
malformed symbol table, the archiver would throw away the error and
simply add the member to the archive without any symbol entries. This
meant that the resultant archive could be silently unusable when not
using --whole-archive, and result in unexpected undefined symbols.

This change fixes this issue by addressing two FIXMEs and only throwing
away not-an-object errors. However, this meant that some LLD tests which
didn't need symbol tables and were using invalid members deliberately to
test the linker's malformed input handling no longer worked, so this
patch also stops the archiver from looking for symbols in an object if
it doesn't require a symbol table, and updates the tests accordingly.

Differential Revision: https://reviews.llvm.org/D88288

Reviewed by: grimar, rupprecht, MaskRay
2020-10-01 14:03:34 +01:00
LLVM GN Syncbot 5101e7e8dd [gn build] Port d53b4bee0c 2020-10-01 12:55:59 +00:00
Sjoerd Meijer d53b4bee0c [LoopFlatten] Add a loop-flattening pass
This is a simple pass that flattens nested loops.  The intention is to optimise
loop nests like this, which together access an array linearly:

  for (int i = 0; i < N; ++i)
    for (int j = 0; j < M; ++j)
      f(A[i*M+j]);

into one loop:

  for (int i = 0; i < (N*M); ++i)
    f(A[i]);

It can also flatten loops where the induction variables are not used in the
loop. This can help with codesize and runtime, especially on simple cpus
without advanced branch prediction.

This is only worth flattening if the induction variables are only used in an
expression like i*M+j. If they had any other uses, we would have to insert a
div/mod to reconstruct the original values, so this wouldn't be profitable.

This partially fixes PR40581 as this pass triggers on one of the two cases. I
will follow up on this to learn LoopFlatten a few more (small) tricks. Please
note that LoopFlatten is not yet enabled by default.

Patch by Oliver Stannard, with minor tweaks from Dave Green and myself.

Differential Revision: https://reviews.llvm.org/D42365
2020-10-01 13:54:45 +01:00
Sam Parker 7e02bc81c6 [NFC][ARM] LowOverheadLoop DEBUG statements 2020-10-01 13:38:16 +01:00
Raphael Isemann cccb7cf1a5 [lldb] Add missing import for LLDB test decorators to TestStopHookScripted
This test wasn't using decorators before and was missing the import, so my
previous commit broke the test.
2020-10-01 14:33:13 +02:00
Louis Dionne 4f13b99929 [libc++] Simplify how we re-export symbols from libc++abi
Instead of managing two copies of the symbol lists, reuse the same list
in libc++abi and libc++.

Differential Revision: https://reviews.llvm.org/D88623
2020-10-01 08:30:27 -04:00
Raphael Isemann b272250221 [lldb] Skip the flakey part of TestStopHookScripted on Linux
This test seems to randomly fail on Linux machines. It's only one part of the
test failing randomly, so let's just skip it instead of reverting the whole
patch (again).
2020-10-01 14:24:38 +02:00
Simon Pilgrim bc730b5e43 [InstCombine] collectBitParts - use APInt directly to check for out of range bit shifts. NFCI. 2020-10-01 12:50:36 +01:00
Andrew Paverd ef4e971e5e [CFGuard] Add address-taken IAT tables and delay-load support
This patch adds support for creating Guard Address-Taken IAT Entry Tables (.giats$y sections) in object files, matching the behavior of MSVC. These contain lists of address-taken imported functions, which are used by the linker to create the final GIATS table.
Additionally, if any DLLs are delay-loaded, the linker must look through the .giats tables and add the respective load thunks of address-taken imports to the GFIDS table, as these are also valid call targets.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D87544
2020-10-01 12:45:07 +01:00
Kerry McLaughlin fcf70e1e3b [SVE][CodeGen] Lower scalable fp_extend & fp_round operations
This patch adds FP_EXTEND_MERGE_PASSTHRU & FP_ROUND_MERGE_PASSTHRU
ISD nodes, used to lower scalable vector fp_extend/fp_round operations.
fp_round has an additional argument, the 'trunc' flag, which is an integer of zero or one.

This also fixes a warning introduced by the new tests added to sve-split-fcvt.ll,
resulting from an implicit TypeSize -> uint64_t cast in SplitVecOp_FP_ROUND.

Reviewed By: sdesmalen, paulwalker-arm

Differential Revision: https://reviews.llvm.org/D88321
2020-10-01 12:17:37 +01:00
Nicolas Vasilache a81b938b6d [mlir][Linalg] Fix ASAN bug
```
 LinalgTilingOptions &setTileSizes(ValueRange ts)
```
makes it all too easy to create stack-use-after-return errors.

In particular, c694588fc5 introduced one such issue.

Instead just take a copy in the lambda and be done with it.
2020-10-01 06:57:35 -04:00
Max Kazantsev 69acdfe075 [SCEV] Prove implicaitons via AddRec start
If we know that some predicate is true for AddRec and an invariant
(w.r.t. this AddRec's loop), this fact is, in particular, true on the first
iteration. We can try to prove the facts we need using the start value.

The motivating example is proving things like
```
  isImpliedCondOperands(>=, X, 0, {X,+,-1}, 0}
```

Differential Revision: https://reviews.llvm.org/D88208
Reviewed By: reames
2020-10-01 17:09:38 +07:00
Sam Parker 38f625d0d1 [ARM][LowOverheadLoops] Adjust Start insertion.
Try to move the insertion point to become the terminator of the
block, usually the preheader.

Differential Revision: https://reviews.llvm.org/D88638
2020-10-01 10:49:19 +01:00
Kerry McLaughlin 75db7cf78a [SVE][CodeGen] Legalisation of integer -> floating point conversions
Splitting the operand of a scalable [S|U]INT_TO_FP results in a
concat_vectors operation where the operands are unpacked FP
scalable vectors (e.g. nxv2f32).
This patch adds custom lowering of concat_vectors which
checks that the number of operands is 2, and isel patterns
to match concat_vectors of scalable FP types with uzp1.

Reviewed By: efriedma, paulwalker-arm

Differential Revision: https://reviews.llvm.org/D88033
2020-10-01 10:43:20 +01:00
Paul Walker 8931c3d682 [NFC] Iterate across an explicit list of scalable MVTs when driving setOperationAction.
Iterating across all of integer_scalable_vector_valuetypes seems
wasteful when there's only a handful we care about.

Also removes some rouge whitespace.

Differential Revision: https://reviews.llvm.org/D88552
2020-10-01 10:17:59 +01:00
Sam Parker 6ec5f32497 [ARM][LowOverheadLoops] Iteration count liveness
Before deciding to insert a [W|D]LSTP, check that defining LR with
the element count won't affect any other instructions that should be
taking the iteration count.

Differential Revision: https://reviews.llvm.org/D88549
2020-10-01 10:11:10 +01:00
Sam Parker 7b90516d47 [ARM][LowOverheadLoops] Start insertion point
If possible, try not to move the start position earlier than it
already is.

Differential Revision: https://reviews.llvm.org/D88542
2020-10-01 10:05:25 +01:00
Stefan Gränitz 306571cc46 [ORC][examples] Temporarily remove LLJITWithChildProcess until ORC TPC lands
This solves a phase ordering problem: OrcV2 remote process support depends on OrcV2 removable code, OrcV2 removable code depends on OrcV1 removal, OrcV1 removal depends on LLJITWithChildProcess migration, and LLJITWithChildProcess migration depends on OrcV2 TargetProcessControl support.
2020-10-01 10:25:13 +02:00
Stefan Gränitz e5795a1b36 [ORC][examples] Remove ThinLtoJIT example after LLJITWithThinLTOSummaries landed in OrcV2Examples
The ThinLtoJIT example was aiming to utilize ThinLTO summaries and concurrency in ORC for speculative compilation. The latter is heavily dependent on asynchronous task scheduling which is probably done better out-of-tree with a mature library like Boost-ASIO. The pure utilization of ThinLTO summaries in ORC is demonstrated in OrcV2Examples/LLJITWithThinLTOSummaries.
2020-10-01 10:22:09 +02:00
Vitaly Buka 456974ac78 [sanitizer] Fix SymbolizedStack leak 2020-10-01 00:50:45 -07:00
Sam Parker dfa2c14b8f [ARM][LowOverheadLoops] Use iterator for InsertPt.
Use a MachineBasicBlock::iterator instead of a MachineInstr* for the
position of our LoopStart instruction. NFCish, as it change debug
info.
2020-10-01 08:32:35 +01:00
Fangrui Song 1e8fbb3b74 [MC] Inline MCExpr::printVariantKind & remove UseParensForSymbolVariantBit
Note, MAI may be nullptr in -show-encoding.
2020-10-01 00:10:06 -07:00
Amara Emerson da11479fd1 [AArch64][GlobalISel] Select all-zero G_BUILD_VECTOR into a zero mov.
Unfortunately the leaf SDAG patterns aren't supported yet so we need to do
this manually, but it's not a significant amount of code anyway.

Differential Revision: https://reviews.llvm.org/D87924
2020-09-30 23:53:38 -07:00
Andrew Dona-Couch 1fedd90cc7 [AVR] fix interrupt stack pointer restoration
This patch fixes a corruption of the stack pointer and several registers in any AVR interrupt with non-empty stack frame.  Previously, the callee-saved registers were popped before restoring the stack pointer, causing the pointer math to use the wrong base value while also corrupting the caller's register.  This change fixes the code to restore the stack pointer last before exiting the interrupt service routine.

https://bugs.llvm.org/show_bug.cgi?id=47253

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D87735

Patch by Andrew Dona-Couch.
2020-10-01 18:52:13 +13:00
Chris Lattner 71dcbe1e88 We don't need two different ways to get commit access, just simplify
the policy here so that old SVN users and new contributors do the same
thing.
2020-09-30 22:36:44 -07:00
Muhammad Omair Javaid 3d27a99b2e [LLDB] Remove AArch64/Linux xfail decorator from TestGuiBasicDebug
This test now passes on AArch64/Linux after following change by Jonas:
d689570d7d
2020-10-01 10:20:22 +05:00
Igor Chervatyuk de973e0b07 [RISCV][ASAN] implementation for previous/next pc routines for riscv64
[7/11] patch series to port ASAN for riscv64

Depends On D87575

Reviewed By: eugenis, vitalybuka, luismarques

Differential Revision: https://reviews.llvm.org/D87577
2020-10-01 08:14:44 +03:00