Commit Graph

97 Commits

Author SHA1 Message Date
Chris Lattner 054574666a rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin.
llvm-svn: 79773
2009-08-22 21:03:30 +00:00
Chris Lattner 7b26fce23e Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
llvm-svn: 79763
2009-08-22 20:48:53 +00:00
Evan Cheng 6ddd7bcdd1 Turn on if-conversion for thumb2.
llvm-svn: 79084
2009-08-15 07:59:10 +00:00
Daniel Dunbar 86c065dd68 Revert 78892 and 78895, these break generating working executables on
x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp

llvm-svn: 78919
2009-08-13 17:03:38 +00:00
Chris Lattner eb68198145 fix a minor fixme. When building with SL and later tools, the ".eh" symbols
don't need to be exported from the .o files.

llvm-svn: 78892
2009-08-13 05:30:22 +00:00
Chris Lattner 9a6cf91261 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
2009-08-12 07:22:17 +00:00
Chris Lattner 2c30970b22 pass the TargetTriple down from each target ctor to the
LLVMTargetMachine ctor.  It is currently unused.

llvm-svn: 78711
2009-08-11 20:42:37 +00:00
Jim Grosbach f24f9d9cb6 Whitespace cleanup. Remove trailing whitespace.
llvm-svn: 78666
2009-08-11 15:33:49 +00:00
Evan Cheng 6e62e93a8d Adding a blank line back.
llvm-svn: 78654
2009-08-11 07:32:58 +00:00
Evan Cheng 475f8a4fa2 Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.
llvm-svn: 78622
2009-08-10 23:56:04 +00:00
Evan Cheng 1be453b462 Add a skeleton Thumb2 instruction size reduction pass.
llvm-svn: 78456
2009-08-08 03:21:23 +00:00
Bob Wilson e148ceaf65 Add a new pre-allocation pass to assign adjacent registers for Neon instructions
that have that constraint.  This is currently just assigning a fixed set of
registers, and it only handles VLDn for n=2,3,4 with DPR registers.
I'm going to expand it to handle more operations next; we can make it smarter
once everything is working correctly.

llvm-svn: 78256
2009-08-05 23:12:45 +00:00
Bob Wilson 85f60cc5a8 Oops. I didn't mean to commit this piece yet.
llvm-svn: 78146
2009-08-05 02:47:13 +00:00
Bob Wilson 20f79e321e Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.
Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions.  The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.

llvm-svn: 78136
2009-08-05 00:49:09 +00:00
Evan Cheng 783b65b546 Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
llvm-svn: 78104
2009-08-04 21:12:13 +00:00
Daniel Dunbar c3719c36e6 Move most targets TargetMachine constructor to only taking a target triple.
- The C, C++, MSIL, and Mips backends still need the module.

llvm-svn: 77927
2009-08-02 23:37:13 +00:00
Daniel Dunbar 31b44e8f6c Normalize Subtarget constructors to take a target triple string instead of
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918
2009-08-02 22:11:08 +00:00
Chris Lattner 8a0db7516e ARM TAI no longer needs a TM, but createTargetAsmInfo() still does.
llvm-svn: 77878
2009-08-02 05:23:52 +00:00
Chris Lattner 375a01c34a remove dead code.
llvm-svn: 77233
2009-07-27 19:00:33 +00:00
Daniel Dunbar 5680b4f285 Add new helpers for registering targets.
- Less boilerplate == good.

llvm-svn: 77052
2009-07-25 06:49:55 +00:00
Daniel Dunbar 67038c1333 Put Target definitions inside Target specific header, and llvm namespace.
llvm-svn: 76344
2009-07-18 23:03:22 +00:00
Daniel Dunbar c151c51ea0 Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink
variables.
 - Module initialization functions supplanted the need for these.

llvm-svn: 75886
2009-07-16 01:55:13 +00:00
Daniel Dunbar d97db682a3 Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.

llvm-svn: 75859
2009-07-15 23:34:19 +00:00
Daniel Dunbar c901392ba4 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.

llvm-svn: 75848
2009-07-15 22:33:19 +00:00
Daniel Dunbar 5302288c90 Remove old style hacks to register AsmPrinter into TargetMachine.
- No intended functionality change.

llvm-svn: 75843
2009-07-15 22:01:32 +00:00
Daniel Dunbar e833810a5e Reapply TargetRegistry refactoring commits.
--- Reverse-merging r75799 into '.':
 U   test/Analysis/PointerTracking
U    include/llvm/Target/TargetMachineRegistry.h
U    include/llvm/Target/TargetMachine.h
U    include/llvm/Target/TargetRegistry.h
U    include/llvm/Target/TargetSelect.h
U    tools/lto/LTOCodeGenerator.cpp
U    tools/lto/LTOModule.cpp
U    tools/llc/llc.cpp
U    lib/Target/PowerPC/PPCTargetMachine.h
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/PowerPC/PPCTargetMachine.cpp
U    lib/Target/PowerPC/PPC.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/ARMTargetMachine.h
U    lib/Target/ARM/ARM.h
U    lib/Target/XCore/XCoreTargetMachine.cpp
U    lib/Target/XCore/XCoreTargetMachine.h
U    lib/Target/PIC16/PIC16TargetMachine.cpp
U    lib/Target/PIC16/PIC16TargetMachine.h
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/Alpha/AlphaTargetMachine.cpp
U    lib/Target/Alpha/AlphaTargetMachine.h
U    lib/Target/X86/X86TargetMachine.h
U    lib/Target/X86/X86.h
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.h
U    lib/Target/CppBackend/CPPTargetMachine.h
U    lib/Target/CppBackend/CPPBackend.cpp
U    lib/Target/CBackend/CTargetMachine.h
U    lib/Target/CBackend/CBackend.cpp
U    lib/Target/TargetMachine.cpp
U    lib/Target/IA64/IA64TargetMachine.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/IA64/IA64TargetMachine.h
U    lib/Target/IA64/IA64.h
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.h
U    lib/Target/CellSPU/SPU.h
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U    lib/Target/Mips/MipsTargetMachine.cpp
U    lib/Target/Mips/MipsTargetMachine.h
U    lib/Target/Mips/Mips.h
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Sparc/SparcTargetMachine.cpp
U    lib/Target/Sparc/SparcTargetMachine.h
U    lib/ExecutionEngine/JIT/TargetSelect.cpp
U    lib/Support/TargetRegistry.cpp

llvm-svn: 75820
2009-07-15 20:24:03 +00:00
Stuart Hastings 338191cd67 Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.

llvm-svn: 75799
2009-07-15 17:27:11 +00:00
Daniel Dunbar eb8c83b4c3 Replace large swaths of copy-n-paste code with obvious helper function...
- Which was already present in the module!

 - I skipped this xform for Alpha, since it runs an extra pass during assembly
   emission, but not when emitting assembly via the DumpAsm flag.

 - No functionality change.

--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
  18 -      PM.add(AsmPrinterCtor(ferrs(), *this, true));
  18 -    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
  18 -    if (AsmPrinterCtor)
  18 -  if (DumpAsm) {
  18 -  }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
  18 +    addAssemblyEmitter(PM, OptLevel, true, ferrs());
  18 +  if (DumpAsm)
--

llvm-svn: 75782
2009-07-15 12:49:15 +00:00
Daniel Dunbar 863e587d27 Kill off old (TargetMachine level, not Target level) match quality functions.
llvm-svn: 75780
2009-07-15 12:26:05 +00:00
Daniel Dunbar 6db8134e80 Provide TargetMachine implementations with reference to Target they were created
from.
 - This commit is almost entirely propogating the reference through the
   TargetMachine subclasses' constructor calls.

llvm-svn: 75778
2009-07-15 12:11:05 +00:00
Daniel Dunbar b22f50e4c4 Register Target's TargetMachine and AsmPrinter in the new registry.
- This abuses TargetMachineRegistry's constructor for now, this will get
   cleaned up in time.

llvm-svn: 75762
2009-07-15 09:22:31 +00:00
David Greene a31f96cf2b Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.

llvm-svn: 75670
2009-07-14 20:18:05 +00:00
Evan Cheng 0f9cce7951 Add a thumb2 pass to insert IT blocks.
llvm-svn: 75218
2009-07-10 01:54:42 +00:00
Bruno Cardoso Lopes 5661ea68e7 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
2009-07-06 05:09:34 +00:00
David Goodwin ade05a37f1 Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
llvm-svn: 74731
2009-07-02 22:18:33 +00:00
Daniel Dunbar 75c12e1569 Remove unused AsmPrinter OptLevel argument, and propogate.
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.

llvm-svn: 74579
2009-07-01 01:48:54 +00:00
Anton Korobeynikov 99152f3a2c Split thumb-related stuff into separate classes.
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

llvm-svn: 74329
2009-06-26 21:28:53 +00:00
Bob Wilson 5a495fea07 Provide InitializeAllTargets and InitializeNativeTarget functions in the
C bindings.  Change all the backend "Initialize" functions to have C linkage.
Change the "llvm/Config/Targets.def" header to use C-style comments to avoid
compile warnings.

llvm-svn: 74026
2009-06-23 23:59:40 +00:00
Evan Cheng b4b20bbb7d Enable arm pre-allocation load / store multiple optimization pass.
llvm-svn: 73791
2009-06-19 23:17:27 +00:00
Evan Cheng 4e712de541 Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits.
llvm-svn: 73747
2009-06-19 01:51:50 +00:00
Douglas Gregor 1b731d5dbe Introduce new headers whose inclusion forces linking and
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.

llvm-svn: 73543
2009-06-16 20:12:29 +00:00
Evan Cheng 185c9ef0a2 Add a ARM specific pre-allocation pass that re-schedule loads / stores from
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.

llvm-svn: 73291
2009-06-13 09:12:55 +00:00
Bruno Cardoso Lopes a194c3a69e First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631
2009-05-30 20:51:52 +00:00
Bill Wendling 026e5d7667 Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
2009-04-29 23:29:43 +00:00
Bill Wendling 084669a1c9 Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
2009-04-29 00:15:41 +00:00
Bill Wendling 56f2987a87 r70270 isn't ready yet. Back this out. Sorry for the noise.
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
Bill Wendling d0ae15946c Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270
2009-04-28 00:21:31 +00:00
Evan Cheng 5e5a63cf8f CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
Evan Cheng 0ee0da841d ARM target now also recognize triplets like thumbv6-apple-darwin and set thumb mode and arch subversion. Eventually thumb triplets will go way and replaced with function notes.
llvm-svn: 66435
2009-03-09 20:25:39 +00:00
Bill Wendling c5437ea429 Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.

llvm-svn: 65379
2009-02-24 08:30:20 +00:00