Commit Graph

183607 Commits

Author SHA1 Message Date
Seiya Nuta dee9546b8f [llvm-objcopy][MachO] Implement a layout algorithm for executables
Summary: The layout algorithm for relocatable objects and for executable are somewhat different. This patch implements the latter one based on the algorithm in LLD (MachOFileLayout).

Reviewers: alexshap, rupprecht, jhenderson

Reviewed By: alexshap

Subscribers: jakehehrlich, abrachet, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65539

llvm-svn: 369231
2019-08-19 05:41:33 +00:00
Seiya Nuta 4a198a7f99 [llvm-objcopy][MachO] Support load commands used in executables/shared libraries
Summary:
This patch implements copying some load commands that appear in executables/shared libraries such as the indirect symbol table.

I don't add tests intentionally because this patch is incomplete: we need a layout algorithm for executables/shared libraries. I'll submit it as a separate patch with tests.

Reviewers: alexshap, rupprecht, jhenderson, compnerd

Reviewed By: alexshap

Subscribers: abrachet, mgorny, mgrang, MaskRay, mtrent, jakehehrlich, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63395

llvm-svn: 369230
2019-08-19 05:37:38 +00:00
Craig Topper e47437a6ef [X86] Fix the lower1BitShuffle code added in r369215 to correctly pass the widened vector to the KSHIFT node.
Not sure how to test this as we have tests that exercise this code,
but nothing failed for the types not matching. Since all the k-registers
use equivalent register classes everything just ends up working.

llvm-svn: 369228
2019-08-19 04:08:44 +00:00
Craig Topper 269c6b1c15 [X86] Teach lower1BitShuffle to match KSHIFTR that doesn't use Zeroable and only relies on undef.
This allows us to widen the type when the KSHIFTR instruction
doesn't exist for the type. If we need to shift in zeroes into
the upper elements we would need more work to guarantee zeroes
when widening.

llvm-svn: 369227
2019-08-19 04:08:40 +00:00
Craig Topper 2eb7951da3 [X86] Teach lower1BitShuffle to recognize padding a subvector with zeros with V2 as the source and V1 as the zero vector.
Shuffle canonicalization can swap the sources so the zero vector
might be V1 and the subvector that's being padded can be V2.

llvm-svn: 369226
2019-08-19 00:39:22 +00:00
Craig Topper c9ee4c7c22 [X86] Add test case for missed opportunity to recognize a vXi1 shuffle as an insert into a zero vector.
We are currently missing this because shuffle canonicalization
puts the zero vector as V1 and the subvector as V2. Our current
code doesn't recognize this case.

llvm-svn: 369225
2019-08-19 00:39:18 +00:00
Craig Topper 2ee46c7c4b [X86] Add a special case to LowerCONCAT_VECTORSvXi1 to handle concatenating zero vectors followed by one non-zero vector followed by undef vectors.
For such a case we should only need a KSHIFTL, but we were
previously generating a KSHIFTL followed by a KSHIFTR because
we mistakenly believed we need to zero the undef elements.

llvm-svn: 369224
2019-08-18 23:30:11 +00:00
Craig Topper 6bd2e8eff8 [X86] Add test cases for suboptimal insertion of a vXi1 vector into a larger vector with zeros in the lower elements and undef upper elements.
Currently we generate kshifts to clear both the upper and lower
elements, but we only need one kshift.

llvm-svn: 369223
2019-08-18 23:30:07 +00:00
Craig Topper 388b8dd94a [X86] Replace uses of getZeroVector for vXi1 vectors with DAG.getConstant.
vXi1 vectors don't need special handling.

llvm-svn: 369222
2019-08-18 23:30:03 +00:00
Hubert Tong c313944da6 [cmake] Move blocks out of redundant else( MSVC ); NFC
Address post-commit comment on D66256 regarding the `else( MSVC )` block
containing only blocks guarded with `LLVM_COMPILER_IS_GCC_COMPATIBLE`,
which would imply `NOT MSVC`.

llvm-svn: 369221
2019-08-18 22:02:24 +00:00
Lang Hames cf276ba82e [ORC] Make sure we linker-mangle symbol names in the SpeculationLayer.
If mangling is not performed then speculative lookups will fail.

llvm-svn: 369219
2019-08-18 21:29:57 +00:00
Lang Hames a264b6074a [ORC] Remove some dead code.
llvm-svn: 369218
2019-08-18 21:22:14 +00:00
DeForest Richards c944438dfd [Docs] Test commit
Fixes typo - Removes extra space between last word of sentence and period.

llvm-svn: 369216
2019-08-18 19:07:10 +00:00
Craig Topper 9e074c06fe [X86] Improve lower1BitShuffle handling for KSHIFTL on narrow vectors.
We can insert the value into a larger legal type and shift that
by the desired amount.

llvm-svn: 369215
2019-08-18 18:52:46 +00:00
Simon Pilgrim 63b3c56fca Fix signed/unsigned comparison warning. NFCI.
llvm-svn: 369213
2019-08-18 17:26:30 +00:00
Simon Pilgrim fee2546f3f [X86] isTargetShuffleEquivalent - add BUILD_VECTOR matching
Add similar functionality to isShuffleEquivalent - if the mask elements don't match, try matching the BUILD_VECTOR scalars instead.

As target shuffles need to handle SM_Sentinel values, this can get a bit tricky, so commit just adds actual mask element index handling - full SM_SentinelZero support will be added when the need arises.

Also, enables support in matchVectorShuffleWithPACK

llvm-svn: 369212
2019-08-18 17:15:26 +00:00
Simon Pilgrim a66edd86e2 [X86] isTargetShuffleEquivalent - early out on illegal shuffle masks. NFCI.
Simplifies shuffle mask comparisons by just bailing out if the shuffle mask has any out of range values - will make an upcoming patch much simpler.

llvm-svn: 369211
2019-08-18 16:37:58 +00:00
Simon Pilgrim 133e2d7bf8 [X86][SSE] Improve PACKSS shuffle tests to better match codegen from D61129
D61129 creates 'concat + trunc' style patterns (at the 128-bit subvector level)

llvm-svn: 369209
2019-08-18 15:39:04 +00:00
Simon Pilgrim 000dfdab2d [MC] MCFixup - Fix cppcheck + MSVC analyzer uninitialized member variable warnings. NFCI.
llvm-svn: 369208
2019-08-18 13:29:12 +00:00
Roman Lebedev 9b957d3321 [InstCombine] Cherry-pick NFC cleanups of foldShiftIntoShiftInAnotherHandOfAndInICmp() from D66383
llvm-svn: 369207
2019-08-18 12:26:33 +00:00
Craig Topper 74168ded03 [TargetLowering] Teach computeRegisterProperties to only widen v3i16/v3f16 vectors to the next power of 2 type if that's legal.
These were recently made simple types. This restores their
behavior back to something like their EVT legalization.

We might be able to fix the code in type legalization where the
assert was failing, but I didn't investigate too much as I had
already looked at the computeRegisterProperties code during the
review for v3i16/v3f16.

Most of the test changes restore the X86 codegen back to what
it looked like before the recent change. The test case in
vec_setcc.ll and is a reduced version of the reproducer from
the fuzzer.

Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=16490

llvm-svn: 369205
2019-08-18 06:28:06 +00:00
Craig Topper f43106e341 [SelectionDAG] Add a node creation debug message to getMachineNode.
llvm-svn: 369204
2019-08-18 06:28:00 +00:00
Matt Arsenault 479f3bdb2c AMDGPU: Fix iterator error when lowering SI_END_CF
If the instruction is the last in the block, there is no next
instruction but the iteration still needs to look at the new block.

llvm-svn: 369203
2019-08-18 00:20:44 +00:00
Matt Arsenault cfdc2b9bd9 AMDGPU: Disambiguate v3f16 format in load/store tables
Currently the searchable tables report the number of dwords. These
round to the same number for 3 and 4 component d16
instructions. Change this to report the number of elements so this
isn't ambiguous.

llvm-svn: 369202
2019-08-18 00:20:43 +00:00
Matt Arsenault 8651ec6a84 TableGen: Revert changes from r369038
These aren't needed for a specific use yet, and I meant to not commit
these.

llvm-svn: 369201
2019-08-18 00:20:42 +00:00
Craig Topper 31f829f0cd [X86] Add a one use check to the combineStore code that handles v16i16->v16i8 truncate+store by extending to v16i32 and then emitting a v16i32->v16i8 truncstore.
This prevent us from emitting a separate truncate and a truncating
store instruction.

llvm-svn: 369200
2019-08-17 22:46:15 +00:00
Yonghong Song a8dad5c79b [BPF] Fix bpf llvm-objdump issues.
Commit https://reviews.llvm.org/D57939 ("[DWARF] Refactor
RelocVisitor and fix computation of SHT_RELA-typed relocation entries)
made a change for relocation resolution when operating
on an object file.

The change unfortunately broke BPF as given SymbolValue (S) and
Addent (A), previously relocation is resolved to
    S + A
and after the change, it is resolved to
    S

This patch fixed the issue by resolving relocation correctly.

It looks not all relocation resolution reaches here and I did not
trace down exactly when. But I do find if the object file includes
codes in two different ELF sections than default ".text",
the above bug will be triggered.

This patch included a trivial two function source code to
demonstrate this issue. The relocation for .debug_loc is resolved
incorrectly due to this and llvm-objdump cannot display source
annotated assembly.

Differential Revision: https://reviews.llvm.org/D66372

llvm-svn: 369199
2019-08-17 22:12:00 +00:00
Roman Lebedev e8f666f48d [NFC][InstCombine] Some tests for 'shift amount reassoc in bit test - trunc-of-lshr' (PR42399)
Finally, the fold i was looking forward to :)

The legality check is muddy, i doubt  i've groked the full generalization,
but it handles all the cases i care about, and can come up with:
https://rise4fun.com/Alive/26j

https://bugs.llvm.org/show_bug.cgi?id=42399

llvm-svn: 369197
2019-08-17 21:35:33 +00:00
George Rimar e3fb2d549b Recommit r369190 "[llvm-readobj/llvm-readelf] - Improve/cleanup the error reporting API."
Fix: Add a `consumeError` call removed by mistake to 'printStackSize',
this should fix the "Expected<T> must be checked before access or destruction." reported by following bot:
http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/9743/steps/stage%201%20check/logs/stdio

Original commit message:
Currently we have the following functions for error reporting:

LLVM_ATTRIBUTE_NORETURN void reportError(Twine Msg);
void reportError(Error Err, StringRef Input); 
void reportWarning(Twine Msg);
void reportWarning(StringRef Input, Error Err);
void warn(llvm::Error Err);
void error(std::error_code EC);

Problems are: naming is inconsistent, arguments order is inconsistent,
some of the functions looks excessive.

After applying this patch we have:

void reportError(Error Err, StringRef Input); 
void reportError(std::error_code EC, StringRef Input);
void reportWarning(Error Err, StringRef Input);

I'd be happy to remove reportError(std::error_code EC, StringRef Input) too, but it
is used by COFF heavily.

Test cases were updated, they show an improvement introduced.

Differential revision: https://reviews.llvm.org/D66286

llvm-svn: 369194
2019-08-17 16:07:18 +00:00
George Rimar c35d4c900d Revert r369190, r369192 ([llvm-readobj/llvm-readelf] - Improve/cleanup the error reporting API.)
It caused multiple BB failtures:

http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/9743/steps/stage%201%20check/logs/stdio
http://lab.llvm.org:8011/builders/clang-cmake-x86_64-sde-avx512-linux/builds/26042/steps/ninja%20check%201/logs/FAIL%3A%20LLVM%3A%3Astack-sizes.test

llvm-svn: 369193
2019-08-17 15:36:06 +00:00
George Rimar e9f28133a9 [llvm-readobj] - An attemp to fix BB after r369191.
Few BB failed with the following error:

Command Output (stderr):
--
/home/buildbots/ppc64be-clang-lnt-test/clang-ppc64be-lnt/llvm/test/tools/llvm-readobj/stack-sizes.test:263:19: error: BADSECTION-OUT: expected string not found in input
# BADSECTION-OUT: 8 ?
                  ^
<stdin>:4:1: note: scanning from here

^

It doesn't reproduce on ubuntu/windows I have. Also, seems many of the bots
are happy too.

This slightly reorders the code to make fouts().flush() call earlier,
like it was before the r369191.

llvm-svn: 369192
2019-08-17 15:24:16 +00:00
Kang Zhang b3d258fc44 [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks
Summary:

Fix a bug of preducessors.

In `block-placement` pass, it will create some patterns for unconditional we can do the simple early retrun.
But the `early-ret` pass is before `block-placement`, we don't want to run it again.
This patch is to do the simple early return to optimize the blocks at the last of `block-placement`.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D63972

llvm-svn: 369191
2019-08-17 14:37:05 +00:00
George Rimar bb56755f15 [llvm-readobj/llvm-readelf] - Improve/cleanup the error reporting API.
urrently we have the following functions for error reporting:

--
LLVM_ATTRIBUTE_NORETURN void reportError(Twine Msg);
void reportError(Error Err, StringRef Input); 
void reportWarning(Twine Msg);
void reportWarning(StringRef Input, Error Err);
void warn(llvm::Error Err);
void error(std::error_code EC);
---

Problems are: naming is inconsistent, arguments order is inconsistent,
some of the functions looks excessive.

After applying this patch we have:

---
LLVM_ATTRIBUTE_NORETURN void reportError(Error Err, StringRef Input); 
LLVM_ATTRIBUTE_NORETURN void reportError(std::error_code EC, StringRef Input);
void reportWarning(Error Err, StringRef Input);
---

I'd be happy to remove reportError(std::error_code EC, StringRef Input) too, but it
is used by COFF heavily.

Test cases were updated, they show an improvement introduced.

Differential revision: https://reviews.llvm.org/D66286

llvm-svn: 369190
2019-08-17 14:36:40 +00:00
George Rimar 50166f8107 [test] - Remove precomiled openbsd-phdrs.elf-x86-64 objects.
There are 2 similar openbsd-phdrs.elf-x86-64 objects committed and
used in test/Object and test/tools/llvm-objdump test cases.

There is no reason to have them, we can use YAML instead. Patch does that.

Differential revision: https://reviews.llvm.org/D66342

llvm-svn: 369189
2019-08-17 14:23:30 +00:00
Troy A. Johnson 30cde4e2e6 [circular_raw_ostream] Delegate is_displayed to contained stream
raw_ostream has an is_displayed() member function that determines if the stream
is connected to a console for display or is connected to a file/pipe. By
default, is_displayed() returns false, and derived classes like raw_fd_ostream
override it. Because circular_raw_ostream wraps another stream, its result for
is_displayed() should be the same as that stream.

Differential Revision: https://reviews.llvm.org/D66026

llvm-svn: 369188
2019-08-17 14:20:41 +00:00
Paul Walker 26295676a4 Revert Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for meta instructions.
This reverts r369132 (git commit 19301d75f0)

llvm-svn: 369186
2019-08-17 09:22:36 +00:00
Paul Walker 93c7a4a47c Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for meta instructions.
This reverts r369133 (git commit 2632c677f8)

llvm-svn: 369185
2019-08-17 09:22:28 +00:00
Alina Sbirlea f92109dc01 [MemorySSA] Loop passes should mark MSSA preserved when available.
This patch applies only to the new pass manager.
Currently, when MSSA Analysis is available, and pass to each loop pass, it will be preserved by that loop pass.
Hence, mark the analysis preserved based on that condition, vs the current `EnableMSSALoopDependency`. This leaves the global flag to affect only the entry point in the loop pass manager (in FunctionToLoopPassAdaptor).

llvm-svn: 369181
2019-08-17 01:02:12 +00:00
Petr Hosek 0b5ecef299 [llvm-readobj] Unwrap the value first to avoid the error
This addresses the issue introduced in r369169, we need to unwrap
the value first before we can check whether it's empty. This also
swaps the two branches to put the common path first which should
be NFC.

llvm-svn: 369177
2019-08-17 00:07:26 +00:00
Adrian Prantl 43c8b19546 Add LLDB dataformatters for llvm::StringRef and lldb_private::ConstString
These data formatters make the string value appear in Xcode's
variables view (and on the command line) without having to expand the
data structure.

Differential Revision: https://reviews.llvm.org/D66354

llvm-svn: 369175
2019-08-16 23:47:57 +00:00
Sanjay Patel a53ad0e157 Revert r367891 - "[InstCombine] combine mul+shl separated by zext"
This reverts commit 5dbb90bfe1.

As noted in the post-commit thread for r367891, this can create
a multiply that is lowered to a libcall that may not exist.

We need to improve the backend decomposition for integer multiply
before trying to re-land this (if it's still worthwhile after
doing the backend work).

llvm-svn: 369174
2019-08-16 23:36:28 +00:00
Jian Cai 16fa8b0970 Reland "[ARM] push LR before __gnu_mcount_nc"
This relands r369147 with fixes to unit tests.

https://reviews.llvm.org/D65019

llvm-svn: 369173
2019-08-16 23:30:16 +00:00
Amara Emerson 57ec292ab8 [AArch64][GlobalISel] Fix an assertion during G_UNMERGE selection for s128 types.
llvm-svn: 369172
2019-08-16 23:23:40 +00:00
Lang Hames 8e2837e549 [ORC] Re-introduce self-dependence accidentally dropped from a unit test.
llvm-svn: 369171
2019-08-16 23:20:54 +00:00
Petr Hosek 7da81b5e4d [llvm-readobj] Fallback to PT_NOTE if file doesn't have sections
This is useful when trying to read notes from stripped files and matches
the behavior of GNU readelf and eu-readelf.

Differential Revision: https://reviews.llvm.org/D66358

llvm-svn: 369169
2019-08-16 23:15:40 +00:00
Sanjay Patel acceedb15f [CodeGenPrepare] Fix use-after-free
If OptimizeExtractBits() encountered a shift instruction with no operands at all,
it would erase the instruction, but still return false.

This previously didn’t matter because its caller would always return after
processing the instruction, but https://reviews.llvm.org/D63233 changed the
function’s caller to fall through if it returned false, which would then cause
a use-after-free detectable by ASAN.

This change makes OptimizeExtractBits return true if it removes a shift
instruction with no users, terminating processing of the instruction.

Patch by: @brentdax (Brent Royal-Gordon)

Differential Revision: https://reviews.llvm.org/D66330

llvm-svn: 369168
2019-08-16 23:10:34 +00:00
Jordan Rupprecht d0797ece46 Revert [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (reapplied)
This reverts r368662 (git commit 1a8d790cf5)

The compile-time regression repro is in https://bugs.llvm.org/show_bug.cgi?id=43024

llvm-svn: 369167
2019-08-16 23:08:56 +00:00
Roman Lebedev 515ad8fe4a [InstCombine][NFC] reuse-constant-from-select-in-icmp.ll - check branch_weights too
llvm-svn: 369166
2019-08-16 23:06:37 +00:00
Roman Lebedev 97176bd2bc [InstCombine][NFC] Revisit tests in reuse-constant-from-select-in-icmp.ll
llvm-svn: 369163
2019-08-16 22:40:06 +00:00
Eli Friedman eaff844fe9 [ARM] Preserve liveness in ARMConstantIslands.
We currently don't use liveness information after this point, but it can
be useful to catch bugs using -verify-machineinstrs, and optimizations
could potentially use this information in the future.

Differential Revision: https://reviews.llvm.org/D66319

llvm-svn: 369162
2019-08-16 22:20:14 +00:00
Johannes Doerfert f72d9b1c97 [Attributor] Fix: Do not partially resolve returned calls.
By partially resolving returned calls we did not record that they were
not fully resolved which caused odd behavior down the line. We could
also end up with some, but not all, returned values of the callee in the
returned values map of the caller, another odd behavior we want to
avoid.

llvm-svn: 369160
2019-08-16 21:59:52 +00:00
Johannes Doerfert cbaf1fdea2 [Attributor] Fix: Make sure we set the changed flag
The flag was updated *before* we actually run the visitor callback so we
might miss updates.

llvm-svn: 369159
2019-08-16 21:55:01 +00:00
Johannes Doerfert 17cb918536 [CaptureTracking] Allow null to be in either icmp operand
Summary:
Before we required the comparison against null to be "canonical", hence
null to be operand #1. This patch allows null to be in either operand,
similar to the handling of loaded globals that follows.

Reviewers: sanjoy, hfinkel, aykevl, sstefan1, uenoku

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66321

llvm-svn: 369158
2019-08-16 21:53:49 +00:00
Sanjay Patel 8341a847a2 [CodeGenPrepare] fix RUN line settings
I'm not sure if this was running as expected with a broken triple.

llvm-svn: 369156
2019-08-16 21:37:49 +00:00
Johannes Doerfert 6dedc78d9d [Attributor] Add all missing attribute definitions/symbols
As a preparation to "on-demand" abstract attribute generation we need
implementations for all attributes (as they can be queried and then
created on-demand where we now fail to find one).

Reviewers: uenoku, sstefan1

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66129

llvm-svn: 369155
2019-08-16 21:31:11 +00:00
Jonas Devlieghere f4bdbea02f [RWMutex] Simplify availability check
Check for the actual version number for the scenarios where the macOS
version isn't available (__MAC_10_12).

llvm-svn: 369154
2019-08-16 21:25:40 +00:00
Craig Topper a17d1d2250 [X86] Use Register/MCRegister in more places in X86
This was a quick pass through some obvious places. I haven't tried the clang-tidy check.

I also replaced the zeroes in getX86SubSuperRegister with X86::NoRegister which is the real sentinel name.

Differential Revision: https://reviews.llvm.org/D66363

llvm-svn: 369151
2019-08-16 20:50:23 +00:00
Jian Cai 2d957cfe02 Revert "[ARM] push LR before __gnu_mcount_nc"
This reverts commit f4cf3b9593.

llvm-svn: 369149
2019-08-16 20:40:21 +00:00
Jian Cai f4cf3b9593 [ARM] push LR before __gnu_mcount_nc
Push LR register before calling __gnu_mcount_nc as it expects the value of LR register to be the top value of
the stack on ARM32.

Differential Revision: https://reviews.llvm.org/D65019

llvm-svn: 369147
2019-08-16 20:21:08 +00:00
Johannes Doerfert 234eda563d [Attributor] Towards a more structured deduction pattern
Summary:
This is the first commit aiming to structure the attribute deduction.
The base idea is that we have default propagation patterns as listed
below on top of which we can add specific, e.g., context sensitive,
logic.

Deduction patterns used in this patch:
  - argument states are determined from call site argument states,
    see AAAlignArgument and AAArgumentFromCallSiteArguments.
  - call site argument states are determined as if they were floating
    values, see AAAlignCallSiteArgument and AAAlignFloating.
  - floating value states are determined by traversing the def-use chain
    and combining the states determined for the leaves, see
    AAAlignFloating and genericValueTraversal.
  - call site return states are determined from function return states,
    see AAAlignCallSiteReturned and AACallSiteReturnedFromReturned.
  - function return states are determined from returned value states,
    see AAAlignReturned and AAReturnedFromReturnedValues.

Through this strategy all logic for alignment is concentrated in the
AAAlignFloating::updateImpl method.

Note: This commit works on its own but is part of a larger change that
involves "on-demand" creation of abstract attributes that will
participate in the fixpoint iteration. Without this part, we sometimes
do not have an AAAlign abstract attribute to query, loosing information
we determined before. All tests have appropriate FIXMEs and the
information will be recovered once we added all parts.

Reviewers: sstefan1, uenoku

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66126

llvm-svn: 369144
2019-08-16 19:51:23 +00:00
Johannes Doerfert 66cf87e290 [Attributor][NFC] Introduce aliases for call site attributes
Until we have call site specific liveness and/or value information there
is no need to do call site specific deduction. Though, we need the
symbols in follow up patches that make Attributor::getAAFor return a
reference.

llvm-svn: 369143
2019-08-16 19:49:00 +00:00
Johannes Doerfert fe6dbadc0d [Attributor] Introduce initialize calls and move code to keep attributes concise
Summary:
This patch should not change the behavior except that the added
initialize methods might indicate an optimistic fixpoint earlier. The
code movement is done to keep the attribute definitions in a single
block where it makes sense. No functional changes intended there.

Reviewers: uenoku, sstefan1

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66258

llvm-svn: 369142
2019-08-16 19:36:17 +00:00
Lang Hames 9bb9a0c10b [ORC] Remove some stray debugging output accidentally left in r368707
llvm-svn: 369141
2019-08-16 19:33:37 +00:00
Sanjay Patel 39eb2324f7 [InstCombine] canonicalize a scalar-select-of-vectors to vector select
This pattern may arise more frequently with an enhancement to SLP vectorization suggested in PR42755:
https://bugs.llvm.org/show_bug.cgi?id=42755
...but we should handle this pattern to make things easier for the backend either way.

For all in-tree targets that I looked at, codegen for typical vector sizes looks better when we change
to a vector select, so this is safe to do without a cost model (in other words, as a target-independent
canonicalization).

For example, if the condition of the select is a scalar, we end up with something like this on x86:

	vpcmpgtd	%xmm0, %xmm1, %xmm0
	vpextrb	$12, %xmm0, %eax
	testb	$1, %al
	jne	LBB0_2
  ## %bb.1:
	vmovaps	%xmm3, %xmm2
  LBB0_2:
	vmovaps	%xmm2, %xmm0

Rather than the splat-condition variant:

	vpcmpgtd	%xmm0, %xmm1, %xmm0
	vpshufd	$255, %xmm0, %xmm0      ## xmm0 = xmm0[3,3,3,3]
	vblendvps	%xmm0, %xmm2, %xmm3, %xmm0

Differential Revision: https://reviews.llvm.org/D66095

llvm-svn: 369140
2019-08-16 18:51:30 +00:00
Evgeniy Stepanov 187c63f145 Escape % in printf format string.
Fixes branch-relax-block-size.mir on the ASan builder.

llvm-svn: 369138
2019-08-16 18:23:54 +00:00
Guanzhong Chen b1cb9fd1aa [WebAssembly] Forbid use of EM_ASM with setjmp/longjmp
Summary:
We tried to support EM_ASM with setjmp/longjmp in binaryen. But with dynamic
linking thrown into the mix, the code is no longer understandable and cannot
be maintained. We also discovered more bugs in the EM_ASM handling code.

To ensure maintainability and correctness of the binaryen code, EM_ASM will
no longer be supported with setjmp/longjmp. This is probably fine since the
support was added recently and haven't be published.

Reviewers: tlively, sbc100, jgravelle-google, kripken

Reviewed By: tlively, kripken

Subscribers: dschuff, hiraditya, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66356

llvm-svn: 369137
2019-08-16 18:21:08 +00:00
Simon Pilgrim 63b78b678b [X86] resolveTargetShuffleInputs - add DemandedElts variant. NFCI.
Nothing calls this yet, everything still goes through the non (all) DemandedElts wrapper.

llvm-svn: 369136
2019-08-16 18:13:22 +00:00
Amara Emerson c809230a69 [AArch64][GlobalISel] Lower G_SHUFFLE_VECTOR with 1 elt src and 1 elt mask.
Again, it's weird that these are allowed. Since lowering support was added in
r368709 we started crashing on compiling the neon intrinsics test in the test
suite. This fixes the lowering to fold the 1 elt src/mask case into copies.

llvm-svn: 369135
2019-08-16 18:06:53 +00:00
Simon Pilgrim 8ff1b7de4d [X86] combineExtractWithShuffle - handle extract(truncate(x), 0)
Eventually we need to generalize combineExtractWithShuffle to handle all faux shuffles and handle truncate (and X86ISD::VTRUNC etc.) there, but we're not ready yet (still creates nodes on the fly, incomplete DemandedElts support, bad use of recursive Depth limit).

llvm-svn: 369134
2019-08-16 17:35:08 +00:00
Paul Walker 2632c677f8 [AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for meta instructions.
Recommit with fixes for mac builders.

Summary:
AArch64InstrInfo::getInstSizeInBytes is incorrectly treating meta
instructions (e.g. CFI_INSTRUCTION) as normal instructions and
giving them a size of 4.

This results in branch relaxation calculating block sizes wrong.
Branch relaxation also considers alignment and thus a single
mistake can result in later blocks being incorrectly sized even
when they themselves do not contain meta instructions.

The net result is we might not relax a branch whose destination is
not within range.

Reviewers: nickdesaulniers, peter.smith

Reviewed By: peter.smith

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66337

> llvm-svn: 369111

llvm-svn: 369133
2019-08-16 17:29:53 +00:00
Paul Walker 19301d75f0 Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for meta instructions.
This reverts r369111 (git commit 3ccee5f7c4)

llvm-svn: 369132
2019-08-16 17:29:42 +00:00
Vasileios Porpodas 1d254f3dae [SLPVectorizer] Make the scheduler aware of the TreeEntry operands.
Summary:
The scheduler's dependence graph gets the use-def dependencies by accessing the operands of the instructions in a bundle. However, buildTree_rec() may change the order of the operands in TreeEntry, and the scheduler is currently not aware of this. This is not causing any functional issues currently, because reordering is restricted to the operands of a single instruction. Once we support operand reordering across multiple TreeEntries, as shown here: http://www.llvm.org/devmtg/2019-04/slides/Poster-Porpodas-Supernode_SLP.pdf , the scheduler will need to get the correct operands from TreeEntry and not from the individual instructions.

In short, this patch:
- Connects the scheduler's bundle with the corresponding TreeEntry. It introduces new TE and Lane fields in ScheduleData.
- Moves the location where the operands of the TreeEntry are initialized. This used to take place in newTreeEntry() setting one operand at a time, but is now moved pre-order just before the recursion of buildTree_rec(). This is required because the scheduler needs to access both operands of the TreeEntry in tryScheduleBundle().
- Updates the scheduler to access the instruction operands through the TreeEntry operands instead of accessing the instruction operands directly.

Reviewers: ABataev, RKSimon, dtemirbulatov, Ayal, dorit, hfinkel

Reviewed By: ABataev

Subscribers: hiraditya, llvm-commits, lebedev.ri, rcorcs

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62432

llvm-svn: 369131
2019-08-16 17:21:18 +00:00
Jonas Devlieghere 7e106445ef [ADT] Remove llvm::make_unique utility.
All uses of llvm::make_unique should have been replaced with
std::make_unique. This patch represents the last part of the migration
and removes the utility from LLVM.

Differential revision: https://reviews.llvm.org/D66259

llvm-svn: 369130
2019-08-16 17:19:57 +00:00
Jordan Rose ea0ace75e0 Fix llvm-config support for CMake build-mode-style builds
At some point we and/or CMake changed our build-mode-style builds from
  $LLVM_OBJ_ROOT/bin/$CMAKE_CFG_INTDIR/
to
  $LLVM_OBJ_ROOT/$CMAKE_CFG_INTDIR/bin/
which is way easier to use. But no one updated llvm-config.

https://reviews.llvm.org/D66326

llvm-svn: 369129
2019-08-16 17:17:45 +00:00
Sanjay Patel 144903310f [SLP] add tests for PR16739; NFC
llvm-svn: 369127
2019-08-16 17:01:26 +00:00
Simon Pilgrim 3a8c698771 [X86] Alphabetize pass initialization definitions. NFCI.
llvm-svn: 369126
2019-08-16 16:41:38 +00:00
Guozhi Wei e03f6a1631 [CodeGen/Analysis] Intrinsic llvm.assume should not block tail call optimization
In function Analysis.cpp:isInTailCallPosition, instructions between call and ret are checked to see if they block tail call optimization. If an instruction is an intrinsic call, only llvm.lifetime_end is allowed and other intrinsic functions block tail call. When compiling tcmalloc, we found llvm.assume between a hot function call and ret, it blocks the optimization. But llvm.assume doesn't generate instructions, it should not block tail call.

Differential Revision: https://reviews.llvm.org/D66096

llvm-svn: 369125
2019-08-16 16:26:12 +00:00
Krzysztof Parzyszek ac83aab035 [Hexagon] Generate min/max instructions for 64-bit vectors
llvm-svn: 369124
2019-08-16 16:16:27 +00:00
Sander de Smalen f28e1128d9 Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
Changes:
There was a condition for `!NeedsFrameRecord` missing in the assert. The
assert in question has changed to:

+    assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg2 != AArch64::FP ||
+            RPI.Reg1 == AArch64::LR) &&
+           "FrameRecord must be allocated together with LR");

This addresses PR43016.

llvm-svn: 369122
2019-08-16 15:42:28 +00:00
Evandro Menezes 05e9c2ac2e [InstCombine] Simplify pow(2.0, itofp(y)) to ldexp(1.0, y)
Simplify `pow(2.0, itofp(y))` to `ldexp(1.0, y)`.

Differential revision: https://reviews.llvm.org/D65979

llvm-svn: 369120
2019-08-16 15:33:41 +00:00
Cyndy Ishida 5f865ecf06 [TextAPI] Update reader to be supported by lib/Object
Summary:
To be able to use the TextAPI/Reader for tbd file consumption (by libObject)
it gets passed a MemoryBufferRef which isn't castable to MemoryBuffer.
Updated the tests to expect that input as well.

Reviewers: ributzka, steven_wu

Reviewed By: steven_wu

Subscribers: hiraditya, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66147

llvm-svn: 369119
2019-08-16 15:30:48 +00:00
David Green b782e61e47 [ARM] MVE sext of a load is free
MVE also has some sext of loads, which will be free just as scalar
instructions are.

Differential Revision: https://reviews.llvm.org/D66008

llvm-svn: 369118
2019-08-16 15:13:37 +00:00
Roman Lebedev 16244fccfe [InstCombine] Shift amount reassociation in bittest: trunc-of-shl (PR42399)
Summary:
This is continuation of D63829 / https://bugs.llvm.org/show_bug.cgi?id=42399

I thought naive pattern would solve my issue, but nope, it involved truncation,
thus more folds needed.. This isn't really the fold i'm interested in,
i need trunc-of-lshr, but i'we decided to start with `shl` because it's simpler.

In this case, no extra legality checks are needed:
https://rise4fun.com/Alive/CAb

We should be careful about not increasing instruction count,
since we need to produce `zext` because `and` is done in wider type.

Reviewers: spatel, nikic, xbolva00

Reviewed By: spatel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66057

llvm-svn: 369117
2019-08-16 15:10:41 +00:00
Simon Pilgrim 429aa7c1e6 [X86][SSE] Add shuffled load tests from PR16739
llvm-svn: 369116
2019-08-16 14:47:59 +00:00
Simon Pilgrim 1051f4f9bf Revert rL369112 : [X86][SSE] Add shuffled load tests from PR16739
I left typos in this from a WIP copy - reverting and I'll recommit.

llvm-svn: 369115
2019-08-16 14:31:45 +00:00
Luis Marques fa06e95898 [RISCV] Convert registers from unsigned to Register
Only in public interfaces that have not yet been converted should there remain
registers with unsigned type.

Differential Revision: https://reviews.llvm.org/D66252

llvm-svn: 369114
2019-08-16 14:27:50 +00:00
Simon Pilgrim 213edc3492 [X86][SSE] Add shuffled load tests from PR16739
llvm-svn: 369112
2019-08-16 14:26:11 +00:00
Paul Walker 3ccee5f7c4 [AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for meta instructions.
Summary:
AArch64InstrInfo::getInstSizeInBytes is incorrectly treating meta
instructions (e.g. CFI_INSTRUCTION) as normal instructions and
giving them a size of 4.

This results in branch relaxation calculating block sizes wrong.
Branch relaxation also considers alignment and thus a single
mistake can result in later blocks being incorrectly sized even
when they themselves do not contain meta instructions.

The net result is we might not relax a branch whose destination is
not within range.

Reviewers: nickdesaulniers, peter.smith

Reviewed By: peter.smith

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66337

llvm-svn: 369111
2019-08-16 14:17:52 +00:00
Simon Pilgrim 9da4989c52 [X86] Remove unused include. NFCI.
We don't use anything from TargetOptions.h directly and its included via TargetLowering.h anyhow.

llvm-svn: 369110
2019-08-16 14:05:46 +00:00
David Green 6e1ac42474 [ARM] Correct register for narrowing and widening MVE loads and stores.
The widening and narrowing MVE instructions like VLDRH.32 are only permitted to
use low tGPR registers. This means that if they are used for a stack slot,
where the register used is only decided during frame setup, we need to be able
to correctly pick a thumb1 register over a normal GPR.

This attempts to add the required logic into eliminateFrameIndex and
rewriteT2FrameIndex, only picking the FrameReg if it is a valid register for
the operands register class, and picking a valid scratch register for the
register class.

Differential Revision: https://reviews.llvm.org/D66285

llvm-svn: 369108
2019-08-16 13:42:39 +00:00
Sanjay Patel 5dcec7ce7a [x86] fix fdiv test; NFC
The test was just added with rL369106, but forgot to update the instruction
along with the test name.

llvm-svn: 369107
2019-08-16 13:31:23 +00:00
Sanjay Patel 15fb2a73f9 [x86] add tests for fdiv with variable operands; NFC
D66050 proposes to change the estimate sequence, but we
don't seem to have test coverage for the common case.

llvm-svn: 369106
2019-08-16 13:23:52 +00:00
Florian Hahn 403e85cbc5 Revert [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks
This reverts r368997 (git commit 2a903c0b67)

It looks like this commit adds invalid predecessors to MBBs. The example
below fails the verifier after MachineBlockPlacement (run llc
-verify-machineinstrs):

@global.4 = external constant i8*

declare i32 @zot(...)

define i16* @snork.67() personality i8* bitcast (i32 (...)* @zot to i8*) {
bb:
  invoke void undef()
          to label %bb5 unwind label %bb4

bb4:                                              ; preds = %bb
  %tmp = landingpad { i8*, i32 }
          catch i8* null
  unreachable

bb5:                                              ; preds = %bb
  %tmp6 = load i32, i32* null, align 4
  %tmp7 = icmp eq i32 %tmp6, 0
  br i1 %tmp7, label %bb14, label %bb8

bb8:                                              ; preds = %bb11, %bb5
  invoke void undef()
          to label %bb9 unwind label %bb11

bb9:                                              ; preds = %bb8
  %tmp10 = invoke i16* undef()
          to label %bb14 unwind label %bb11

bb11:                                             ; preds = %bb9, %bb8
  %tmp12 = landingpad { i8*, i32 }
          cleanup
          catch i8* bitcast (i8** @global.4 to i8*)
  %tmp13 = icmp ult i64 undef, undef
  br i1 %tmp13, label %bb8, label %bb14

bb14:                                             ; preds = %bb11, %bb9, %bb5
  %tmp15 = phi i16* [ null, %bb5 ], [ null, %bb11 ], [ %tmp10, %bb9 ]
  ret i16* %tmp15
}

llvm-svn: 369104
2019-08-16 13:19:29 +00:00
Bjorn Pettersson 9dddd26e31 [DAGCombiner] Add simple folds for SMULFIX/UMULFIX/SMULFIXSAT
Summary:
Add the following DAGCombiner folds for mulfix being
one of SMULFIX/UMULFIX/SMULFIXSAT:
  (mulfix x, undef, scale) -> 0
  (mulfix x, 0, scale) -> 0

Also added canonicalization of constants to RHS.

Reviewers: RKSimon, craig.topper, spatel

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66052

llvm-svn: 369103
2019-08-16 13:16:48 +00:00
Bjorn Pettersson 6a75061e36 [X86] Add test case for future MULFIX DAG combine folds. NFC
Add some test cases displaying the lack of DAG combine
folds for SMULFIX/UMULFIX/SMULFIXSAT when either
multiplicand is undef or zero.

It seems like widening vector legalization for X86 can
introduce fixed point multiplication of undef values.
So that is one way that such operations could appear
during ISel.

Multiplication with zero is probably more unlikely, and
could potentially be handled by InstCombine. But I do
not think it would hurt to do such folds in DAGCombiner.

This patch only adds the test case. The folds will be
added in a follow up patch.

llvm-svn: 369102
2019-08-16 13:16:38 +00:00
David Green 8c2c5f5045 [ARM] Don't pretend we know how to generate MVE VLDn
We don't yet know how to generate these instructions for MVE. And in the case
of VLD3, we don't even have the instruction. For the moment don't tell the
vectoriser that we have VLD4, just to end up serialising the results.

Differential Revision: https://reviews.llvm.org/D66009

llvm-svn: 369101
2019-08-16 13:06:49 +00:00
Lewis Revill d3f774d33c [RISCV] Allow parsing of bare symbols with offsets
This patch allows symbols followed by an expression for an offset to be
parsed as bare symbols.

Differential Revision: https://reviews.llvm.org/D57332

llvm-svn: 369097
2019-08-16 12:00:56 +00:00
Benjamin Kramer 31a47f9890 Revert "[CallGraph] Refine call graph for indirect calls with !callees metadata"
This reverts commit r369025. Crashes clang, test case is on the mailing
list.

llvm-svn: 369096
2019-08-16 10:59:18 +00:00
Lewis Revill 7abf863f76 [RISCV] Lower inline asm constraint A for RISC-V
This allows arguments with the constraint A to be lowered to input nodes
for RISC-V, which implies a memory address stored in a register.

This patch adds the minimal amount of code required to get operands with
the right constraints to compile.

https://reviews.llvm.org/D54296

llvm-svn: 369095
2019-08-16 10:28:34 +00:00
Simon Pilgrim 59894d4668 [SLPVectorizer] Silence null dereference warning. NFCI.
cppcheck + MSVC analyzer both over zealously warn that we might dereference a null Bundle pointer - add an assertion to check for null to silence the warning, plus its a good idea to check that we succeeded in finding a schedule bundle anyway....

llvm-svn: 369094
2019-08-16 10:28:23 +00:00