Dmitry Preobrazhensky
4ccb7f8c45
[AMDGPU][MC] Corrected parsing of branch offsets
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See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D64629
llvm-svn: 366571
2019-07-19 13:12:47 +00:00
Dmitry Preobrazhensky
1fca3b1972
[AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg
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See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D61125
llvm-svn: 363255
2019-06-13 12:46:37 +00:00
Dmitry Preobrazhensky
5ae3113969
[AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_fork
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See https://bugs.llvm.org/show_bug.cgi?id=41888
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D62016
llvm-svn: 361040
2019-05-17 14:57:04 +00:00
Stanislav Mekhanoshin
9d287358a8
[AMDGPU] gfx1010 SOP instructions
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Differential Revision: https://reviews.llvm.org/D61080
llvm-svn: 359139
2019-04-24 20:44:34 +00:00
Dmitry Preobrazhensky
ae31223ba7
[AMDGPU][MC][GFX9] Added s_call_b64
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See bug 36843: https://bugs.llvm.org/show_bug.cgi?id=36843
Differential Revision: https://reviews.llvm.org/D45268
Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329440
2018-04-06 18:24:49 +00:00
Dmitry Preobrazhensky
306b1a0119
[AMDGPU][MC][GFX9] Added instruction s_endpgm_ordered_ps_done
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See bug 36844: https://bugs.llvm.org/show_bug.cgi?id=36844
Differential Revision: https://reviews.llvm.org/D45313
Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329430
2018-04-06 17:25:00 +00:00
Stanislav Mekhanoshin
62875fcd6c
[AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32
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Differential Revision: https://reviews.llvm.org/D41617
llvm-svn: 322500
2018-01-15 18:49:15 +00:00
Matt Arsenault
36b4b0bed7
AMDGPU: Remove -mcpu=SI
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Leftover from before amdgcn/r600 split.
llvm-svn: 310277
2017-08-07 18:30:35 +00:00
Dmitry Preobrazhensky
c7d35a0d6a
[AMDGPU][MC] Added check for truncation of SOPK imm operand
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See bug 30827: https://bugs.llvm.org//show_bug.cgi?id=30827
Reviewers: artem.tamazov, vpykhtin
Differential Revision: https://reviews.llvm.org/D32535
llvm-svn: 301418
2017-04-26 15:34:19 +00:00
Artem Tamazov
5cd55b1784
[AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers.
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Possibility to specify code of hardware register kept.
Disassemble to symbolic name, if name is known.
Tests updated/added.
Differential Revision: http://reviews.llvm.org/D19335
llvm-svn: 267724
2016-04-27 15:17:03 +00:00
Artem Tamazov
d6468666b5
[AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax.
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Added hwreg(reg[,offset,width]) syntax.
Default offset = 0, default width = 32.
Possibility to specify 16-bit immediate kept.
Added out-of-range checks.
Disassembling is always to hwreg(...) format.
Tests updated/added.
Differential Revision: http://reviews.llvm.org/D19329
llvm-svn: 267410
2016-04-25 14:13:51 +00:00
Artem Tamazov
e2762423c2
[AMDGPU][llvm-mc] s_setreg* - Fix order of operands
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Order should match the sp3 syntax, where destination (simm16 denoting the hwreg) is coming first.
Differential Revision: http://reviews.llvm.org/D19161
llvm-svn: 266617
2016-04-18 14:54:26 +00:00
Nikolay Haustov
cb9dddb1d7
[AMDGPU] Assembler: Update SOP* tests
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Add VI encodings.
Reformat sopp.s to match style of other files.
Differential Revision: http://reviews.llvm.org/D18084
llvm-svn: 263540
2016-03-15 07:44:57 +00:00
Tom Stellard
45bb48ea19
R600 -> AMDGPU rename
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llvm-svn: 239657
2015-06-13 03:28:10 +00:00