5 Commits

Author	SHA1	Message	Date
Zlatko Buljan	29813620bc	[mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions ... Differential Revision: http://reviews.llvm.org/D17989 llvm-svn: 267693	2016-04-27 11:02:23 +00:00
David Blaikie	a79ac14fa6	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction ... Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794	2015-02-27 21:17:42 +00:00
Zoran Jovanovic	9f99723d92	ps][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions ... llvm-svn: 221369	2014-11-05 17:38:31 +00:00
Zoran Jovanovic	a87308c84c	Reverted revisions 221351, 221352 and 221353. ... llvm-svn: 221354	2014-11-05 16:19:59 +00:00
Zoran Jovanovic	f4f5f1e272	[mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions ... Differential Revision: http://reviews.llvm.org/D5933 llvm-svn: 221352	2014-11-05 15:46:53 +00:00