Commit Graph

38 Commits

Author SHA1 Message Date
Oren Ben Simhon 140c1fb9ec [X86] Adding avx512_vpopcntdq feature set and its intrinsics
AVX512_VPOPCNTDQ is a new feature set that was published by Intel.
The patch represents the Clang side of the addition of six intrinsics for two new machine instructions (vpopcntd and vpopcntq).
It also includes the addition of the new feature set.

Differential Revision: https://reviews.llvm.org/D33170

llvm-svn: 303857
2017-05-25 13:44:11 +00:00
Ekaterina Romanova dffe45b3e6 [DOXYGEN] Improved doxygen comments for x86 intrinsics.
Improved doxygen comments for the following intrinsics headers:  __wmmintrin_pclmul.h, bmiintrin.h, emmintrin.h, f16cintrin.h, immintrin.h, mmintrin.h, pmmintrin.h, tmmintrin.h

Added \n commands to insert a line breaks where necessary, since one long line of documentation is nearly unreadable.
Formatted comments to fit into 80 chars.
In some cases added \a command in front of the parameter names to display them in italics.

llvm-svn: 290561
2016-12-27 00:49:38 +00:00
Ekaterina Romanova 0c1c3bbc78 [DOXYGEN] Improved doxygen comments for x86 intrinsics headers.
Tagged instruction names with <c> INSTR_NAME </c> to display them in typewriter font.

In the past, \c command was used, unfortunately it applied to only one word. 
<c> .. </c> has the same meaning, but applies to all words in between the tags.

llvm-svn: 289249
2016-12-09 18:35:50 +00:00
Ekaterina Romanova bf667b21ac Add doxygen comments to immintrin.h's intrinsics.
The doxygen comments are automatically generated based on Sony's intrinsics docu
ment.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream. This patch was internally reviewed by Charles Li.

llvm-svn: 287483
2016-11-20 08:35:05 +00:00
Michael Zuckerman b920665493 [Clang][Feature] Adding CLFLUSHOPT feature and intrinsic to clang
Differential Revision: http://reviews.llvm.org/D21792

llvm-svn: 274559
2016-07-05 15:56:03 +00:00
David Majnemer d423574fde [immintrin] Reimplement _bit_scan_{forward,reverse}
There is no need to use a target-specific intrinsic to implement
_bit_scan_forward or _bit_scan_reverse, reimplementing them using
generic intrinsics makes it more likely that the middle end will
understand what's going on.

llvm-svn: 272564
2016-06-13 17:26:16 +00:00
Michael Zuckerman e54093fcc0 Adding front-end support to several intrinsics (bit scanning, conversion and state reading intrinsics)
Adding LLVM front-end support to two intrinsics dealing with bit scan: _bit_scan_forward and _bit_scan_reverse.
 Their functionality is as described in Intel intrinsics guide:
 https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bit_scan_forward&expand=371,370
 https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bit_scan_reverse&expand=371,370

 Furthermore, adding clang front-end support to these conversion intrinsics: _mm256_cvtsd_f64, _mm256_cvtsi256_si32 and _mm256_cvtss_f32.

 Finally, adding tests to all of the above, as well as to the state reading intrinsics _rdpmc and _rdtsc.
  Their functionality is also specified in the Intel intrinsics guide.


Commit on behalf of Omer Paparo Bivas

llvm-svn: 271387
2016-06-01 12:21:00 +00:00
Nico Weber 379a1952b3 [ms] Reintroduce feature guards in intrinsic headers in Microsoft mode
Visual Studio's C++ standard library headers include intrin.h, so the intrinsic
headers get included a lot more often in Microsoft mode than elsewhere. The
AVX512 intrinsics are a lot of code (0.7 MB, causing 30% compile time overhead
for small programs including e.g. <string> and 6% compile time overhead for
larger projects like e.g. v8). Since multiversioning can't be relied on in
Microsoft mode (cl.exe doesn't support it), having faster compiles seems like
the much better tradeoff until we have a better intrinsic story going forward
(which we'll need for e.g. PR19898).

Actually using intrinsics on Windows already requires the right /arch:
settings, so this patch should have no big behavior change.

See also thread "The intrinsics headers (especially avx512) are too big. What
to do about it?" on cfe-dev.

http://reviews.llvm.org/D20291

llvm-svn: 269675
2016-05-16 18:14:07 +00:00
Michael Zuckerman 8c2900f44d [Clang][BuiltIn][AVX512] Adding intrinsics without mask for VBROADCAST and VPBROADCAST instruction set .
Differential Revision: http://reviews.llvm.org/D19196

llvm-svn: 267696
2016-04-27 11:43:14 +00:00
Michael Zuckerman 4fa96af4db [Clang][AVX512][BuiltIn] Adding intrinsics of VGATHER{DPS|DPD} , VPGATHER{QD|QQ|DD|DQ} and VGATHERPF{0|1}{DPS|QPS|DPD|QPD} instruction set .
Differential Revision: http://reviews.llvm.org/D19224

llvm-svn: 266983
2016-04-21 12:47:27 +00:00
Michael Zuckerman 9f33848f04 [CLANG][AVX512][BUILTIN] Adding new feature flag headed files and new BUILTIN vpermi2varq{i|t}{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17917

llvm-svn: 262834
2016-03-07 17:04:11 +00:00
Michael Zuckerman 0190c65571 [CLANG][AVX512][BUILTIN] Adding new feature flag header file and new builtin vpmadd52{h|l}uq{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17915

llvm-svn: 262820
2016-03-07 09:55:55 +00:00
Asaf Badouh a9d1e18f48 [X86][PKU] add clang intrinsic for {RD|WR}PKRU
Differential Revision: http://reviews.llvm.org/D15837

llvm-svn: 256672
2015-12-31 14:14:07 +00:00
Paul Robinson 941bc91518 Move _mm256_cvtps_ph and _mm256_cvtph_ps to immintrin.h.
This more closely matches their locations as described by Intel
documentation, and lets us remove a pair of redundant typedefs.

Differential Revision: http://reviews.llvm.org/D15127

llvm-svn: 254528
2015-12-02 18:41:52 +00:00
Amjad Aboud 2b9b8a5921 [X86] Add XSAVE intrinsic family
Add intrinsics for the
  XSAVE instructions (XSAVE/XSAVE64/XRSTOR/XRSTOR64)
  XSAVEOPT instructions (XSAVEOPT/XSAVEOPT64)
  XSAVEC instructions (XSAVEC/XSAVEC64)
  XSAVES instructions (XSAVES/XSAVES64/XRSTORS/XRSTORS64)

Differential Revision: http://reviews.llvm.org/D13014

llvm-svn: 250158
2015-10-13 12:29:35 +00:00
Michael Kuperstein b62c5bc64d Revert r245923 since it breaks mingw.
llvm-svn: 245929
2015-08-25 11:42:31 +00:00
Michael Kuperstein 2c8f9c2c23 [X86] Expose the various _rot intrinsics on non-MS platforms
_rotl, _rotwl and _lrotl (and their right-shift counterparts) are official x86
intrinsics, and should be supported regardless of environment. This is in contrast
to _rotl8, _rotl16, and _rotl64 which are MS-specific.

Note that the MS documentation for _lrotl is different from the Intel 
documentation. Intel explicitly documents it as a 64-bit rotate, while for MS,
since sizeof(unsigned long) for MSVC is always 4, a 32-bit rotate is implied.

Differential Revision: http://reviews.llvm.org/D12271

llvm-svn: 245923
2015-08-25 07:21:33 +00:00
Michael Kuperstein a3c7b74208 [X86] Add FXSR intrinsics
Add intrinsics for the FXSR instructions (FXSAVE/FXSAVE64/FXRSTOR/FXRSTOR64)

These were previously declared in Intrin.h for MSVC compatibility, but now
that we have them implemented, these declarations can be removed.

llvm-svn: 241053
2015-06-30 09:45:38 +00:00
Asaf Badouh a45b7cab7b [x86][AVX512CD] Add conflict and lzcnt intrinsics in their 512bit versions
include tests

review
http://reviews.llvm.org/D10795

llvm-svn: 240941
2015-06-29 12:51:53 +00:00
Eric Christopher 3d920eed5d Move xtest to its own file to match the gcc header organization.
llvm-svn: 239926
2015-06-17 18:42:07 +00:00
Eric Christopher 29b78091e7 Update comments on HLE, RTM, and ADX support for intrinsics.
llvm-svn: 239925
2015-06-17 18:42:03 +00:00
Eric Christopher 9fc7fb274e Update the intel intrinsic headers to use the target attribute support.
This involved removing the conditional inclusion and replacing them
with target attributes matching the original conditional inclusion
and checks. The testcase update removes the macro checks for each
file and replaces them with usage of the __target__ attribute, e.g.:

int __attribute__((__target__(("sse3")))) foo(int a) {
  _mm_mwait(0, 0);
  return 4;
}

This usage does require the enclosing function have the requisite
__target__ attribute for inlining and code generation - also for
any macro intrinsic uses in the enclosing function. There's no change
for existing uses of the intrinsic headers.

llvm-svn: 239883
2015-06-17 07:09:32 +00:00
Elena Demikhovsky e7d4c2e229 AVX-512: Added AVX-512 intrinsics and tests
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236218
2015-04-30 09:24:29 +00:00
Craig Topper 8c7f251e98 Add FSGSBASE intrinsics to x86 intrinsic headers.
llvm-svn: 221130
2014-11-03 06:51:41 +00:00
Robert Khasanov b9f3a911c9 [AVX512] Added VPCMPEQ intrinisics to headers.
Added tests.

Patch by Maxim Blumenthal <maxim.blumenthal@intel.com>

llvm-svn: 219319
2014-10-08 17:18:13 +00:00
Robert Khasanov 83c419b349 [x86] Added _addcarryx_u32, _addcarryx_u64 intrinsics
llvm-svn: 218117
2014-09-19 10:17:06 +00:00
Elena Demikhovsky fcc6df310d AVX-512: Added intrinsics to clang.
The set is small, that what I have right now.
Everybody is welcome to add more.

llvm-svn: 213641
2014-07-22 11:31:39 +00:00
Roman Divacky b8322b13f8 The wmmintrin.h header includes two different sub-headers: one for AES support
and one for PCLMUL support.  The current immintrin.h header only includes
wmmintrin.h if AES support is enabled.  It should include it if either AES or
PCLMUL is enabled (GCC's version of immintrin.h does this).

Patch by John Baldwin!

llvm-svn: 202871
2014-03-04 18:26:12 +00:00
Ben Langmuir 6efe3a886e Move sha intrinsics to immintrin.h
This is consistent with ICC and Intel's SHA-enabled GCC version.

llvm-svn: 191002
2013-09-19 14:00:22 +00:00
Michael Liao 4442f796a4 Add XTEST intrinsic defined in TSX extension
llvm-svn: 178330
2013-03-29 05:14:06 +00:00
Michael Liao 625a875f05 Add clang support of RTM from TSX
- New options '-mrtm'/'-mno-rtm' are added to enable/disable RTM feature
- Builtin macro '__RTM__' is defined if RTM feature is enabled
- RTM intrinsic header is added and introduces 3 new intrinsics, namely
  '_xbegin', '_xend', and '_xabort'.
- 3 new builtins are added to keep compatible with gcc, namely
  '__builtin_ia32_xbegin', '__builtin_ia32_xend', and '__builtin_ia32_xabort'.
- Test cases for pre-defined macro and new intrinsic codegen are added.

llvm-svn: 167665
2012-11-10 05:17:46 +00:00
Benjamin Kramer a43b6999ff Add _rdrand{16,32,64}_step intrinsics to immintrin.h
llvm-svn: 160118
2012-07-12 09:33:03 +00:00
Craig Topper 2b1eda344a Add fma3 intrinsic header file.
llvm-svn: 157913
2012-06-04 03:42:47 +00:00
Craig Topper c334dd68a7 Add BMI2 intrinsics.
llvm-svn: 147275
2011-12-26 02:31:10 +00:00
Craig Topper f2855ade2b Add intrinsics for lzcnt and tzcnt instructions.
llvm-svn: 147263
2011-12-25 06:25:37 +00:00
Craig Topper 22967d4a61 Add BMI, BMI2, and LZCNT feature flags to enable adding intrinsics.
llvm-svn: 147262
2011-12-25 05:06:45 +00:00
Craig Topper dec792ebb5 Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table.
llvm-svn: 146855
2011-12-19 05:04:33 +00:00
Benjamin Kramer 65b9f7b255 Add immintrin meta header.
- This is the official way to get AVX intrinsics, we might want to disallow
  direct inclusion of avxintrin.h, just like GCC does.

llvm-svn: 111660
2010-08-20 18:04:07 +00:00