Commit Graph

371844 Commits

Author SHA1 Message Date
Simon Pilgrim fe9403df06 [CostModel][X86] Remove unused check-prefixes 2020-11-10 12:48:35 +00:00
Wang, Pengfei a6428fcd32 [CodeGen][X86] Remove unused check-prefixes from more avx512 tests. NFCI. 2020-11-10 20:43:03 +08:00
Pablo Barrio 642b21beba [AArch64] Enable RAS 1.1 system registers in all AArch64
Some use cases (e.g. kernel devs) have strict requirements to only enable
features available with -march=armv8-a, e.g. no armv8.1-a. Enabling RAS 1.1 in
all AArch64 means they can consider to support it.

Bear in mind that the first versions of the Armv8 architecture still do not
support RAS 1.1. This patch only lets devs write code with the user-friendly
register mnemonic instead of the ugly generic S<op0>_<op1>_<Cn>_<Cm>_<op2>.
They still need to place runtime checks to make sure that the CPU to run on
supports RAS 1.1.

Differential Revision: https://reviews.llvm.org/D90594
2020-11-10 12:13:33 +00:00
Haojian Wu a97d7b9159 Fix the buildbot failure.
Looks like we hit a bug in iterator of DeclContextLookupResult, workaround
by a forloop.

http://45.33.8.238/win/27605/step_4.txt
2020-11-10 13:11:54 +01:00
Kirill Bobyrev 47fcf233ce
[clangd] Fix recommended gRPC version
Typo: 1.32.2 does not exist, it should be 1.33.2 https://github.com/grpc/grpc/releases/tag/v1.33.2
2020-11-10 15:07:03 +03:00
Sanne Wouda dd03881bd5 Add loop distribution to the LTO pipeline
The LoopDistribute pass is missing from the LTO pipeline, so
-enable-loop-distribute has no effect during post-link. The pre-link
loop distribution doesn't seem to survive the LTO pipeline either.

With this patch (and -flto -mllvm -enable-loop-distribute) we see a 43%
uplift on SPEC 2006 hmmer for AArch64. The rest of SPECINT 2006 is
unaffected.

Differential Revision: https://reviews.llvm.org/D89896
2020-11-10 12:04:32 +00:00
Wang, Pengfei bd01a66675 [CodeGen][X86] Remove unused check-prefixes from some avx512 tests. NFCI. 2020-11-10 20:03:43 +08:00
Kazushi (Jam) Marukawa c84b2c49be [VE] Support inline assembly with vector regsiters
Support inline assembly with vector registers.  Add a regression test also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91146
2020-11-10 20:55:38 +09:00
Sander de Smalen f47573f9bf [LoopVectorizer] NFC: Propagate ElementCount to more interfaces.
Interfaces changed to take `ElementCount` as parameters:
* LoopVectorizationPlanner::buildVPlans
* LoopVectorizationPlanner::buildVPlansWithVPRecipes
* LoopVectorizationCostModel::selectVectorizationFactor

This patch is NFC for fixed-width vectors.

Reviewed By: dmgreen, ctetreau

Differential Revision: https://reviews.llvm.org/D90879
2020-11-10 11:11:02 +00:00
Michał Górny 311cca8bbf [lldb] [test] Rename '.categories' to 'categories'
Make category-specifying files visible.  There is really no good reason
to keep them hidden, and having them visible increases the chances
that someone will actually spot them.

Differential Revision: https://reviews.llvm.org/D91065
2020-11-10 12:02:38 +01:00
Michał Górny a852cf66ea [lldb] [test] Skip ObjC-based tests via 'objc' category
Replace the plethora of ObjC-implied 'skipUnlessDarwin' decorators
with marking tests as 'objc' category (whenever missing), and skip all
ObjC tests on non-Darwin platforms.  I have used '.categories' file
wherever it was present already or all (>1) tests were relying on ObjC,
and explicit add_test_categories() where there was only one test.

Differential Revision: https://reviews.llvm.org/D91056
2020-11-10 12:02:38 +01:00
Joe Ellis 462dd4f803 [SVE][AArch64] Improve specificity of vectorization legality TypeSize test
The test was using -O2, where -loop-vectorize will suffice.

Reviewed By: fpetrogalli

Differential Revision: https://reviews.llvm.org/D90685
2020-11-10 10:55:25 +00:00
Simon Pilgrim a45a903a21 [X86] Remove unused check-prefixes from some vector tests 2020-11-10 10:48:48 +00:00
Simon Pilgrim defc59734a Add a llvm_unreachable to fix MSVC unhandled enum warning. NFCI. 2020-11-10 10:43:45 +00:00
Stefan Gränitz 203b4774b8 [lldb][ObjectFile] Relocate sections for in-memory objects (e.g. received via JITLoaderGDB)
Part 2 of a fix for JITed code debugging. This has been a regression from 5.0 to 6.0 and it's still reproducible on current master: https://bugs.llvm.org/show_bug.cgi?id=36209 Part 1 was D61611 a while ago.

The in-memory object files we obtain from JITLoaderGDB are not yet relocated. It looks like this used to happen on the LLDB side and my guess is that it broke with D38142. (However, it's hard to tell because the whole thing was broken already due to the bug in part 1.) The patch moved relocation resolution to a later point in time and didn't apply it to in-memory objects. I am not aware of any reason why we wouldn't resolve relocations per-se, so I made it unconditional here. On Debian, it fixes the bug for me and all tests in `check-lldb` are still fine.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D90769
2020-11-10 11:37:53 +01:00
Mirko Brkusanin a75d6178b8 [GlobalISel] Add combine for (x | mask) -> x when (x | mask) == x
If we have a mask, and a value x, where (x | mask) == x, we can drop the OR
and just use x.

Differential Revision: https://reviews.llvm.org/D90952
2020-11-10 11:32:13 +01:00
Mirko Brkusanin fb36ab0a42 [GlobalISel] Expand combine for (x & mask) -> x when (x & mask) == x
We can use KnownBitsAnalysis to cover cases when mask is not trivial. It can
also help with cases when mask is not constant but can still be folded into
one. Since 'and' is comutative we should treat both operands as possible
replacements.

Differential Revision: https://reviews.llvm.org/D90674
2020-11-10 11:32:13 +01:00
Mirko Brkusanin 53ae95c946 [AMDGPU][GlobalISel] Combine shift + logic + shift with constant operands
This sequence of instructions can be simplified if they are single use and
some operands are constants. Additional combines may be applied afterwards.

Differential Revision: https://reviews.llvm.org/D90223
2020-11-10 11:32:13 +01:00
Mirko Brkusanin de719586a8 [AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands
Sequence of same shift instructions with constant operands can be combined into
a single shift instruction.

Differential Revision: https://reviews.llvm.org/D90217
2020-11-10 11:32:12 +01:00
James Henderson d2f7f775ca [lld][ELF][test] Add additional --symbol-ordering-file testing
This covers a few cases that aren't otherwise tested:
1) Non-ascii symbol names are ordered.
2) Comments, whitespace and blank lines are trimmed.
3) Missing order files result in an error.

Reviewed by: MaskRay, grimar

Differential Revision: https://reviews.llvm.org/D90933
2020-11-10 10:28:47 +00:00
James Henderson 439341b9bf [lld][ELF] Add additional time trace categories
I noticed when running a large link with the --time-trace option that
there were several areas which were missing any specific time trace
categories (aside from the generic link/ExecuteLinker categories). This
patch adds new categories to fill most of the "gaps", or to provide more
detail than was previously provided.

Reviewed by: MaskRay, grimar, russell.gallop

Differential Revision: https://reviews.llvm.org/D90686
2020-11-10 10:28:46 +00:00
Alex Zinenko fd407e1f1e [mlir] ODS-backed python binding generator for custom op classes
Introduce an ODS/Tablegen backend producing Op wrappers for Python bindings
based on the ODS operation definition. Usage:

  mlir-tblgen -gen-python-op-bindings -Iinclude <path/to/Ops.td> \
              -bind-dialect=<dialect-name>

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D90960
2020-11-10 10:58:29 +01:00
Kazushi (Jam) Marukawa b65ef65b22 [VE] Support inline assembly
Support inline assembly with scalar registers.  Add a regression test also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91119
2020-11-10 18:56:22 +09:00
Alex Zinenko 6c7e6b2c9a [mlir] Support slicing for operands in results in Python bindings
Slicing, that is element access with `[being🔚step]` structure, is
a common Python idiom for sequence-like containers. It is also necessary
to support custom accessor for operations with variadic operands and
results (an operation an return a slice of its operands that correspond
to the given variadic group).

Add generic utility to support slicing in Python bindings and use it
for operation operands and results.

Depends On D90923

Reviewed By: stellaraccident, mehdi_amini

Differential Revision: https://reviews.llvm.org/D90936
2020-11-10 10:46:21 +01:00
Haojian Wu 71064b0270 [clangd] Bump index version number.
https://reviews.llvm.org/D89670 changed the Ref structure, we need to
bump the version to invalidate all stored stale data, otherwise we will
get ` Error while reading shard: malformed or truncated refs` when
building the background index.

Differential Revision: https://reviews.llvm.org/D91131
2020-11-10 10:31:59 +01:00
Kirill Bobyrev 085f900830 [clangd] Update remote index documentation
* Even though remote index is still somewhat experimental, it can now be
  used withing clangd itself: this should be the primary way of trying
  it out
* Remove `protobuf-compiler` from list of needed Debian packages as it
  `protobuf-compiler-grpc` already depends on it
* Bump recommended gRPC version to 1.32.3
2020-11-10 10:18:38 +01:00
Jay Foad 0ad4d04002 [AMDGPU] Remove an unused return value. NFC.
Differential Revision: https://reviews.llvm.org/D91063
2020-11-10 09:15:14 +00:00
Kirill Bobyrev ca892f46fe
[clangd] Enhance Clangd rename testing coverage
We plan to eliminate error-prone and obsolete Clang-Rename API from Clangd. To
do that, we will introduce Decl canonicalization rules that will make renaming
code simpler and easier to maintain (D71880).

To ensure smooth transition to the new implementation, many Clang-Rename tests
will be adopted in Clangd to prevent any possible regressions. This patch is
the first in the chain of test migration patches. It improves existing tests
and adopts tests from Clang-Rename's alias, class and enum testing files.

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D91102
2020-11-10 10:08:49 +01:00
Wang, Pengfei 97fbc785f9 [CodeGen][X86] Remove unused check-prefixes. NFCI. 2020-11-10 16:50:28 +08:00
Artur Bialas 3035e676a3 [mlir][spirv] Add VectorInsertDynamicOp and vector.insertelement lowering
VectorInsertDynamicOp in SPIRV dialect
conversion from vector.insertelement to spirv VectorInsertDynamicOp

Differential Revision: https://reviews.llvm.org/D90927
2020-11-10 09:49:12 +01:00
Martin Storsjö 539ce1d288 [libcxx] [test] Simplify the fs helper header for posix cases. NFC.
Differential Revision: https://reviews.llvm.org/D91073
2020-11-10 10:39:15 +02:00
Martin Storsjö c41bda7f5f [libcxx] [test] Call create_directory_symlink where relevant
Differential Revision: https://reviews.llvm.org/D91072
2020-11-10 10:39:15 +02:00
Martin Storsjö 8f5f6ee27e [libcxx] [test] Make a separate create_directory_symlink helper
This more closely mirrors the public API, instead of using an
obscure bool parameter.

Differential Revision: https://reviews.llvm.org/D91071
2020-11-10 10:39:15 +02:00
Martin Probst 16212b8b3e clang-format: [JS] support new assignment operators.
Before:

    a && = b;

After:

    a &&= b;

These operators are new additions in ES2021.

Differential Revision: https://reviews.llvm.org/D91132
2020-11-10 09:26:46 +01:00
Max Kazantsev 25755a0159 [NFC] Add flag to disable IV widening in indvar instance
This allows us to have control over IV widening in the pipeline.
2020-11-10 15:10:44 +07:00
Haojian Wu daa736da10 [clangd] Add basic conflict detection for the rename.
With this patch, we reject the rename if the new name would conflict with
any other decls in the decl context of the renamed decl.

Differential Revision: https://reviews.llvm.org/D89790
2020-11-10 08:52:30 +01:00
David Blaikie 724877e219 Roll otherwise-unused variable into assert 2020-11-09 23:27:47 -08:00
Esme-Yi 6e0ad5bc8c [PowerPC] Add an ISEL pattern for Mul with Imm.
Summary: This patch try to do the following transformation if the multiplier doen't fit int16:
			(mul X, c1 << c2) -> (rldicr (mulli X, c1) c2)

Reviewed By: jsji, steven.zhang

Differential Revision: https://reviews.llvm.org/D87384
2020-11-10 06:52:39 +00:00
Max Kazantsev 3ec69c16c3 [NFC] Different way of getting step 2020-11-10 13:48:02 +07:00
Richard Smith b637148ecb [c++20] For P0732R2 / P1907R1: Basic code generation and name
mangling support for non-type template parameters of class type and
template parameter objects.

The Itanium side of this follows the approach I proposed in
https://github.com/itanium-cxx-abi/cxx-abi/issues/47 on 2020-09-06.

The MSVC side of this was determined empirically by observing MSVC's
output.

Differential Revision: https://reviews.llvm.org/D89998
2020-11-09 22:10:27 -08:00
River Riddle 892605b449 [mlir][Asm] Add support for using an alias for trailing operation locations
Locations often get very long and clutter up operations when printed inline with them. This revision adds support for using aliases with trailing operation locations, and makes printing with aliases the default behavior. Aliases in the trailing location take the form `loc(<alias>)`, such as `loc(#loc0)`. As with all aliases, using `mlir-print-local-scope` can be used to disable them and get the inline behavior.

Differential Revision: https://reviews.llvm.org/D90652
2020-11-09 21:54:47 -08:00
River Riddle ebcc022507 [mlir][AsmPrinter] Refactor printing to only print aliases for attributes/types that will exist in the output.
This revision refactors the way that attributes/types are considered when generating aliases. Instead of considering all of the attributes/types of every operation, we perform a "fake" print step that prints the operations using a dummy printer to collect the attributes and types that would actually be printed during the real process. This removes a lot of attributes/types from consideration that generally won't end up in the final output, e.g. affine map attributes in an `affine.apply`/`affine.for`.

This resolves a long standing TODO w.r.t aliases, and helps to have a much cleaner textual output format. As a datapoint to the latter, as part of this change several tests were identified as testing for the presence of attributes aliases that weren't actually referenced by the custom form of any operation.

To ensure that this wouldn't cause a large degradation in compile time due to the second full print, I benchmarked this change on a very large module with a lot of operations(The file is ~673M/~4.7 million lines long). This file before this change take ~6.9 seconds to print in the custom form, and ~7 seconds after this change. In the custom assembly case, this added an average of a little over ~100 miliseconds to the compile time. This increase was due to the way that argument attributes on functions are structured and how they get printed; i.e. with a better representation the negative impact here can be greatly decreased. When printing in the generic form, this revision had no observable impact on the compile time. This benchmarking leads me to believe that the impact of this change on compile time w.r.t printing is closely related to `print` methods that perform a lot of additional/complex processing outside of the OpAsmPrinter.

Differential Revision: https://reviews.llvm.org/D90512
2020-11-09 21:54:47 -08:00
Max Kazantsev 6022a8b7e8 [SCEV] Drop cached ranges of AddRecs after flag update
Our range computation methods benefit from no-wrap flags. But if the ranges
were first computed before the flags were set, the cached range will be too
pessimistic.

We need to drop cached ranges whenever we sharpen AddRec's no wrap flags.

Differential Revision: https://reviews.llvm.org/D89847
Reviewed By: fhahn
2020-11-10 12:37:12 +07:00
Haowei Wu d93287cac8 [scan-build] Supprot relative 'file' in cdb.
Excluded folders in scan build is turned to absolute path before
comapre to 'file' in cdb. 'file' in cdb might be a path relative
to 'directory', so we need to turn it to absolute path before
comparison.

Patch by Yu Shan

Differential Revision: https://reviews.llvm.org/D90362
2020-11-09 20:06:20 -08:00
Carl Ritson fde8351743 [AMDGPU] Fix lowering of S_MOV_{B32,B64}_term
If the source of S_MOV_{B32,B64}_term is an immediate then it
cannot be lowered to a COPY.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D90451
2020-11-10 12:16:31 +09:00
Qiu Chaofan 979a4d268a [PowerPC] [Clang] Port SSE4.1-compatible insert intrinsics
This patch adds three intrinsics compatible to x86's SSE 4.1 on PowerPC
target, with tests:

- _mm_insert_epi8
- _mm_insert_epi32
- _mm_insert_epi64

The intrinsics implementation is contributed by Paul Clarke.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D89242
2020-11-10 10:52:13 +08:00
Arthur Eubanks 1cbf8e89b5 [NewPM] Port -separate-const-offset-from-gep
Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D91095
2020-11-09 17:42:36 -08:00
Michael Kruse e5dba2d7e5 [OMPIRBuilder] Start 'Create' methods with lower case. NFC.
For consistency with the IRBuilder, OpenMPIRBuilder has method names starting with 'Create'. However, the LLVM coding style has methods names starting with lower case letters, as all other OpenMPIRBuilder already methods do. The clang-tidy configuration used by Phabricator also warns about the naming violation, adding noise to the reviews.

This patch renames all `OpenMPIRBuilder::CreateXYZ` methods to `OpenMPIRBuilder::createXYZ`, and updates all in-tree callers.

I tested check-llvm, check-clang, check-mlir and check-flang to ensure that I did not miss a caller.

Reviewed By: mehdi_amini, fghanim

Differential Revision: https://reviews.llvm.org/D91109
2020-11-09 19:35:11 -06:00
Kazu Hirata 2f1038c7b6 [BranchProbabilityInfo] Use SmallVector (NFC)
This patch simplifies BranchProbabilityInfo by changing the type of
Probs.

Without this patch:

  DenseMap<Edge, BranchProbability> Probs

maps an ordered pair of a BasicBlock* and a successor index to an edge
probability.

With this patch:

  DenseMap<const BasicBlock *, SmallVector<BranchProbability, 2>> Probs

maps a BasicBlock* to a vector of edge probabilities.

BranchProbabilityInfo has a property that for a given basic block, we
either have edge probabilities for all successors or do not have any
edge probability at all.  This property combined with the current map
type leads to a somewhat complicated algorithm in eraseBlock to erase
map entries one by one while increasing the successor index.

The new map type allows us to remove the all edge probabilities for a
given basic block in a more intuitive manner, namely:

  Probs.erase(BB);

Differential Revision: https://reviews.llvm.org/D91017
2020-11-09 17:29:40 -08:00
Xun Li c2cb093d9b [Coroutine] Move all used local allocas to the .resume function
Prior to D89768, any alloca that's used after suspension points will be put on to the coroutine frame, and hence they will always be reloaded in the resume function.
However D89768 introduced a more precise way to determine whether an alloca should live on the frame. Allocas that are only used within one suspension region (hence does not need to live across suspension points) will not be put on the frame. They will remain local to the resume function.
When creating the new entry for the .resume function, the existing logic only moved all the allocas from the old entry to the new entry. This covers every alloca from the old entry. However allocas that's defined afer coro.begin are put into a separate basic block during CoroSplit (the PostSpill basic block). We need to make sure these allocas are moved to the new entry as well if they are used.
This patch walks through all allocas, and check if they are still used but are not reachable from the new entry, if so, we move them to the new entry.

Differential Revision: https://reviews.llvm.org/D90977
2020-11-09 17:24:49 -08:00