Commit Graph

352163 Commits

Author SHA1 Message Date
Victor Huang 02141a17ae [PowerPC][Future] Remove redundant r2 save and restore for indirect call
Currently an indirect call produces the following sequence on PCRelative mode:

extern void function( );
extern void (*ptrfunc) ( );

void g() {
    ptrfunc=function;
}

void f() {
    (*ptrfunc) ( );
}

Producing

paddi 3, 0, .LC0@PCREL, 1
ld 3, 0(3)
std 2, 24(1)
ld 12, 0(3)
mtctr 12
bctrl
ld 2, 24(1)

Though the caller does not use or preserve r2, it is still saved and restored
across a function call. This patch is added to remove these redundant save and
restores for indirect calls.

Differential Revision: https://reviews.llvm.org/D77749
2020-04-22 12:05:51 -05:00
Benjamin Kramer 6bec6a9755 Update go bindings for 2dea3f1298 2020-04-22 19:02:59 +02:00
Benjamin Kramer 4b33c935db [Hexagon] Silence warning
llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp:296:11: warning: enumeration value 'ScalableVectorTyID' not handled in switch [-Wswitch]
  switch (Ty->getTypeID()) {
          ^
2020-04-22 18:57:08 +02:00
Denis Khalikov 1009177d49 [mlir][vulkan-runner] Add support for integer types.
Summary:
Add support for memrefs with element type as integer type
and simple test.

Differential Revision: https://reviews.llvm.org/D78560
2020-04-22 19:42:39 +03:00
Jonas Devlieghere e57361c055 [lldb/Host] Remove TaskPool and replace its uses with llvm::ThreadPool
Remove LLDB's TaskPool and replace its uses with LLVM's ThreadPool.

Differential revision: https://reviews.llvm.org/D78337
2020-04-22 09:17:49 -07:00
Johannes Doerfert 68a27587c2 [OpenMP][FIX] Do not use InaccessibleMemOrArgMemOnly for barrier and flush
This was reported as PR45635, committed first as
72a9e7c926, reverted by
188f5cde96, and now recommitted with the
test change.
2020-04-22 11:10:54 -05:00
Christopher Tetreault 2dea3f1298 [SVE] Add new VectorType subclasses
Summary:
Introduce new types for fixed width and scalable vectors.

Does not remove getNumElements yet so as to not break code during transition
period.

Reviewers: deadalnix, efriedma, sdesmalen, craig.topper, huntergr

Reviewed By: sdesmalen

Subscribers: jholewinski, arsenm, jvesely, nhaehnle, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, liufengdb, kerbowa, Joonsoo, grosul1, frgossen, lldb-commits, tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm, #lldb

Differential Revision: https://reviews.llvm.org/D77587
2020-04-22 08:59:01 -07:00
Mark Murray 3df8135286 [ARM][MC][Thumb] Recommit: Revert relocation for some pc-relative fixups.
Summary:
This commit recommits the reversion of https://reviews.llvm.org/D75039.

Concensus appears to be in favour of assembly-time resolution of
these ADR and LDR relocations, in line with GNU. The previous
backout broke many lld tests, now fixed by Peter Smith in
61bccda9d9.

Reviewers: psmith

Subscribers: kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78301
2020-04-22 16:54:26 +01:00
Victor Huang 43abef06f4 [PowerPC][Future] Initial support for PCRel addressing for jump tables.
Add initial support for PC Relative addressing to get jump table base
address instead of using TOC.

Differential Revision: https://reviews.llvm.org/D75931
2020-04-22 10:45:01 -05:00
Sander de Smalen 662cbaf647 [SveEmitter] Add IsOverloadNone flag and builtins for svpfalse and svcnt[bhwd]_pat
Add the IsOverloadNone flag to tell CGBuiltin that it does not have
an overloaded type. This is used for e.g. svpfalse which does
not take any arguments and always returns a svbool_t.

This patch also adds builtins for svcntb_pat, svcnth_pat, svcntw_pat
and svcntd_pat, as those don't require custom codegen.

Reviewers: SjoerdMeijer, efriedma, rovka

Reviewed By: efriedma

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77596
2020-04-22 16:42:08 +01:00
Mircea Trofin 1b6b05a250 [llvm][NFC][CallSite] Remove CallSite from a few trivial locations
Summary: Implementation details and internal (to module) APIs.

Reviewers: craig.topper, dblaikie

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78610
2020-04-22 08:39:21 -07:00
Johannes Doerfert 188f5cde96 Revert "[OpenMP][FIX] Do not use InaccessibleMemOrArgMemOnly for barrier and flush"
Forgot to include test changes :(

This reverts commit 72a9e7c926.
2020-04-22 10:36:54 -05:00
Francois Ferrand 3d61b1120e clang-format: Introduce stricter AlignOperands flag
Summary:
Even when BreakBeforeBinaryOperators is set, AlignOperands kept
aligning the beginning of the line, even when it could align the
actual operands (e.g. after an assignment).

With this patch, there is an option to actually align the operands, so
that the operator gets right-aligned with the equal sign or return
operator:

  int aaaaa = bbbbbb
            + cccccc;
  return aaaaaaa
      && bbbbbbb;

This not happen in parentheses, to avoid 'breaking' the indentation:

  if (aaaaa
      && bbbbb)
    return;

Reviewers: krasimir, djasper

Subscribers: cfe-commits, klimek

Differential Revision: https://reviews.llvm.org/D32478
2020-04-22 17:36:38 +02:00
Francois Ferrand 5daa25fd7a clang-format: support aligned nested conditionals formatting
When multiple ternary operators are chained, e.g. like an if/else-if/
else-if/.../else sequence, clang-format will keep aligning the colon
with the question mark, which increases the indent for each
conditionals:

  int a = condition1 ? result1
                     : condition2 ? result2
                                  : condition3 ? result3
                                               : result4;

This patch detects the situation (e.g. conditionals used in false branch
of another conditional), to avoid indenting in that case:

  int a = condition1   ? result1
          : condition2 ? result2
          : condition3 ? result3
                       : result4;

When BreakBeforeTernaryOperators is false, this will format like this:

  int a = condition1 ? result1 :
          condition2 ? result2 :
          conditino3 ? result3 :
                       result4;
2020-04-22 17:36:33 +02:00
Mikhail Maltsev d7ab9e7c9b [ARM] Release notes for the Custom Datapath Extension (CDE)
Summary:
This change mentions CDE assembly in the LLVM release notes and CDE
intrinsics in both Clang and LLVM release notes.

Reviewers: kristof.beyls, simon_tatham

Reviewed By: kristof.beyls

Subscribers: danielkiss, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78481
2020-04-22 16:34:19 +01:00
Dmitry Vyukov 5a2c31116f [TSAN] Add optional support for distinguishing volatiles
Add support to optionally emit different instrumentation for accesses to
volatile variables. While the default TSAN runtime likely will never
require this feature, other runtimes for different environments that
have subtly different memory models or assumptions may require
distinguishing volatiles.

One such environment are OS kernels, where volatile is still used in
various places for various reasons, and often declare volatile to be
"safe enough" even in multi-threaded contexts. One such example is the
Linux kernel, which implements various synchronization primitives using
volatile (READ_ONCE(), WRITE_ONCE()). Here the Kernel Concurrency
Sanitizer (KCSAN) [1], is a runtime that uses TSAN instrumentation but
otherwise implements a very different approach to race detection from
TSAN.

While in the Linux kernel it is generally discouraged to use volatiles
explicitly, the topic will likely come up again, and we will eventually
need to distinguish volatile accesses [2]. The other use-case is
ignoring data races on specially marked variables in the kernel, for
example bit-flags (here we may hide 'volatile' behind a different name
such as 'no_data_race').

[1] https://github.com/google/ktsan/wiki/KCSAN
[2] https://lkml.kernel.org/r/CANpmjNOfXNE-Zh3MNP=-gmnhvKbsfUfTtWkyg_=VqTxS4nnptQ@mail.gmail.com

Author: melver (Marco Elver)
Reviewed-in: https://reviews.llvm.org/D78554
2020-04-22 17:27:09 +02:00
Denis Khalikov ec16df7066 [mlir][vulkan-runner] Fix testsuite.
Summary: Fix testsuite after D78542.

Differential Revision: https://reviews.llvm.org/D78639
2020-04-22 18:24:15 +03:00
Johannes Doerfert 72a9e7c926 [OpenMP][FIX] Do not use InaccessibleMemOrArgMemOnly for barrier and flush
This was reported as PR45635.
2020-04-22 10:18:46 -05:00
Haojian Wu f33e86df3a Fix -Wunused-variable error. 2020-04-22 17:17:41 +02:00
Jan Kratochvil d482fe2add [nfc] [lldb] DWARF callbacks: DIERef -> DWARFDIE
Pavel Labath wrote in D73206:
The internal representation of DebugNames and Apple indexes is fixed by
the relevant (pseudo-)standards, so we can't really change it. The
question is how to efficiently (and cleanly) convert from the internal
representation to some common thing. The conversion from AppleIndex to
DIERef is trivial (which is not surprising as it was the first and the
overall design was optimized for that). With debug_names, the situation
gets more tricky. The internal representation of debug_names uses
CU-relative DIE offsets, but DIERef wants an absolute offset. That means
the index has to do more work to produce the common representation. And
it needs to do that for all results, even though a lot of the index
users are really interested only in a single entry. With the switch to
user_id_t, _all_ indexes would have to do some extra work to encode it,
only for their users to have to immediately decode it back. Having
a iterator/callback based api would allow us to minimize the impact of
that, as it would only need to happen for the entries that are really
used. And /I think/ we could make it interface returns DWARFDies
directly, and each index converts to that using the most direct approach
available.

Jan Kratochvil:
It also makes all the callers shorter as they no longer need to fetch
DWARFDIE from DIERef (and handling if not found by ReportInvalidDIERef)
but the callers are already served DWARFDIE which they need.
In some cases the DWARFDIE had to be fetched both by callee (DWARFIndex
implementation) and caller.

Differential Revision: https://reviews.llvm.org/D77970
2020-04-22 17:11:50 +02:00
Louis Dionne 347226d138 [CMake] Add a warning message to prepare the upcoming upgrade to CMake 3.13.4
As discussed in http://lists.llvm.org/pipermail/llvm-dev/2020-March/140349.html,
the minimum version of CMake required to build LLVM will be upgraded to
3.13.4 right after we create the release branch for LLVM 11.0.0.

As part of this effort, this commit adds a warning to give a heads up
to folks regarding the upcoming upgrade. This should allow users to
upgrade their CMake in advance so that the upgrade can sail right
through when the time comes.

Differential Revision: https://reviews.llvm.org/D77740
2020-04-22 11:07:43 -04:00
Roman Lebedev a70d2ab323
[NFC][InstCombine] Tests for negation of sign-/zero- extensions
* sext of non-positive can be negated.
* zext of non-negative can be negated.
2020-04-22 17:37:42 +03:00
Simon Pilgrim 54b3f91d20 [BPF] Remove unused forward declarations. NFC. 2020-04-22 15:07:18 +01:00
Simon Pilgrim fc044530f7 BranchFolding.h - remove unused raw_ostream forward declaration. NFC. 2020-04-22 15:07:18 +01:00
Simon Pilgrim 93a33bab60 RecordStreamer.h - cleanup includes and forward declarations. NFC.
Reduce MCSymbol.h include to forward declaration.
Remove unused GlobalValue foward declaration.
2020-04-22 15:07:18 +01:00
Simon Pilgrim 9202902ae6 RuntimeDyldImpl.h - remove unused Twine forward declaration. NFC. 2020-04-22 15:07:17 +01:00
Sander de Smalen 78aa260df7 [NFC] Fix unused result of dyn_cast<VectorType> in non-assert build 2020-04-22 14:57:28 +01:00
jasonliu bcca6ae3cd [llvm-objdump][XCOFF] Print more symbol info in relocation
Summary:
Print more symbol info in relocation printing when
--symbol-description is specified.

Differential Revision: https://reviews.llvm.org/D78499
2020-04-22 13:52:08 +00:00
John Brawn 8211cfb7c8 [ARM] Don't shrink STM if it would cause an unknown base register store
If a 16-bit thumb STM with writeback stores the base register but it isn't the
first register in the list, then an unknown value is stored. The load/store
optimizer knows this and generates a 32-bit STM without writeback instead, but
thumb2 size reduction converts it into a 16-bit STM. Fix this by having thumb2
size reduction notice such STMs and leave them as they are.

Differential Revision: https://reviews.llvm.org/D78493
2020-04-22 14:50:42 +01:00
Sander de Smalen 41d52662d5 [SveEmitter] Add support for _n form builtins
The ACLE has builtins that take a scalar value that is to be expanded
into a vector by the operation. While the ISA may have an instruction
that takes an immediate or a scalar to represent this, the LLVM IR
intrinsic may not, so Clang will have to splat the scalar value.

This patch also adds the _n forms for svabd, svadd, svdiv, svdivr,
svmax, svmin, svmul, svmulh, svub and svsubr.

Reviewers: SjoerdMeijer, efriedma, rovka

Reviewed By: SjoerdMeijer

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77594
2020-04-22 14:23:54 +01:00
Jay Foad 1f32e7367c [AMDGPU] Fix test failures caused by dbdffe3ee9. 2020-04-22 14:19:21 +01:00
David Green 892af45c86 [ARM] Distribute MVE post-increments
This adds some extra processing into the Pre-RA ARM load/store optimizer
to detect and merge MVE loads/stores and adds of the same base. This we
don't always turn into a post-inc during ISel, and due to the nature of
it being a graph we don't always know an order to use for the nodes, not
knowing which nodes to make post-inc and which to use the new post-inc
of. After ISel, we have an order that we can use to post-inc the
following instructions.

So this looks for a loads/store with a starting offset of 0, and an
add/sub from the same base, plus a number of other loads/stores. We then
do some checks and convert the zero offset load/store into a postinc
variant. Any loads/stores after it have the offset subtracted from their
immediates.  For example:
  LDR #4           LDR #4
  LDR #0           LDR_POSTINC #16
  LDR #8           LDR #-8
  LDR #12          LDR #-4
  ADD #16
It only handles MVE loads/stores at the moment. Normal loads/store will
be added in a followup patch, they just have some extra details to
ensure that we keep generating LDRD/LDM successfully.

Differential Revision: https://reviews.llvm.org/D77813
2020-04-22 14:16:51 +01:00
Pavel Iliin 4eca1c06a4 [AArch64][FIX] f16 indexed patterns encoding restrictions. 2020-04-22 14:11:28 +01:00
Simon Pilgrim c3730ad8fc [AsmPrinter] Remove unused forward declarations. NFC. 2020-04-22 14:01:52 +01:00
Simon Pilgrim 7c7b77a341 MetadataLoader.h - remove unused MDNode forward declaration. NFC. 2020-04-22 14:01:52 +01:00
Simon Pilgrim 6f2d64696d [AsmParser] Remove unused forward declarations. NFC. 2020-04-22 14:01:51 +01:00
Simon Pilgrim 09ba6f9e69 X86TargetMachine.h - remove unused X86RegisterBankInfo forward declaration. NFC. 2020-04-22 14:01:51 +01:00
Sanjay Patel 6f19f0fb9a [InstCombine] add tests for min/max FP intrinsics with FMF (PR45478); NFC
https://bugs.llvm.org/show_bug.cgi?id=45478
2020-04-22 08:43:40 -04:00
David Green 48ac4e6938 [ARM] MVE FMA loop tests. NFC 2020-04-22 13:27:40 +01:00
Sebastian Neubauer bffd45bab1 [NFC][AMDGPU] Fix cmake when LLVM is a subproject
CMAKE_SOURCE_DIR is not the right directory if llvm is included in
another cmake project. PROJECT_SOURCE_DIR is always the same and should
be used instead.
2020-04-22 14:25:44 +02:00
Louis Dionne 8c61114c53 [libc++/abi/unwind] Rename Lit features for no exceptions to 'no-exceptions'
Instead of having different names for the same Lit feature accross code
bases, use the same name everywhere. This NFC commit is in preparation
for a refactor where all three projects will be using the same Lit
feature detection logic, and hence it won't be convenient to use
different names for the feature.

Differential Revision: https://reviews.llvm.org/D78370
2020-04-22 08:25:27 -04:00
Andrzej Warzynski 72f565899d [SveEmitter] Implement builtins for gathers/scatters
This patch adds builtins for:
  * regular, first-faulting and non-temporal gather loads
  * regular and non-temporal scatter stores

Differential Revision: https://reviews.llvm.org/D77735
2020-04-22 13:21:39 +01:00
Roman Lebedev 67266d879c
[InstCombine] Negator: shufflevector is negatible
All these folds are correct as per alive-tv
2020-04-22 15:14:23 +03:00
Roman Lebedev 4d44ce7437
[NFC][InstCombine] Add shuffle negation tests 2020-04-22 15:14:23 +03:00
Jay Foad dbdffe3ee9 [AMDGPU] Add 192-bit register classes
Differential Revision: https://reviews.llvm.org/D78312
2020-04-22 13:10:37 +01:00
Jay Foad d625b4b081 [AMDGPU] Add missing AReg classes
Add 96-bit, 160-bit and 256-bit AReg classes to match VReg and SReg.
NFC as far as I know, but it may avoid weird legalization problems.

Differential Revision: https://reviews.llvm.org/D78348
2020-04-22 13:10:37 +01:00
David Zarzycki b2f06bd20b [libc++ testing] Fix unused variable warning turned error 2020-04-22 08:05:31 -04:00
Peter Smith 673612a035 [LLD][ELF][ARM] Replace adr, ldr with .inst .reloc in test [NFC]
After D78301 MC no longer emits a relocation for this case. Change to use
.inst and .reloc to synthesize the same instruction and relocation. One
more test case I missed.
2020-04-22 12:55:26 +01:00
James Henderson e9aac2c3ef [llvm-objdump] Look in all viable sections for call/branch targets
Prior to this patch, llvm-objdump would only look in the last section
(according to the section header table order) that matched an address
for a symbol when identifying the target symbol of a call or branch
operation. If there are multiple sections with the same address, due to
some of them being empty, it did not look in those, even if the symbol
couldn't be found in the first section looked in.

This patch causes llvm-objdump to look in all sections for possible
candidate symbols. If there are multiple possible symbols, it picks one
from a non-empty section, if possible (as that is more likely to be the
"real" symbol since functions can't really be in emptiy sections),
before falling back to those in empty sections. If all else fails, it
falls back to absolute symbols as it did before.

Differential Revision: https://reviews.llvm.org/D78549

Reviewed by: grimar, Higuoxing
2020-04-22 12:28:30 +01:00
Lucas Prates 727e6fb84a [NFC][llvm][X86] Adding missing -mtiple to X86 test.
The modified test was missing the specification of the intended triple
in its run line, assuming X86 is the default.
2020-04-22 11:55:57 +01:00