Commit Graph

276786 Commits

Author SHA1 Message Date
Billy Robert O'Neal III 020294811f Add missing test_macros.h inclusion.
llvm-svn: 318808
2017-11-21 22:16:57 +00:00
Krzysztof Parzyszek 705795b839 [Hexagon] Add HexagonSubtarget::getVectorLength()
llvm-svn: 318807
2017-11-21 22:13:16 +00:00
Michael Kruse 163cacb469 [CodeGen] Detect empty domain because of parameters context.
Isl does not allow generating isl_ast_expr from an isl_pw_aff that has an
empty domain (i.e. has no pieces). We already detected the case if the
isl_pw_aff comes with an empty domain.

isl_ast_build also considers the domain empty if it is disjoint with the
parameter context (e.g. parameters values that we exclude by runtime
versioning).

Intersect the access relation domain with the parameter context to
also detect such practically empty access domains. The effective
pointer used in the generated code is unimportand because it will never
be executed.

This fixes llvm.org/PR35362

llvm-svn: 318806
2017-11-21 22:11:10 +00:00
Peter Collingbourne 6c48462276 Object: Improve COFF irsymtab comdat representation.
Change the representation of COFF comdats so that a COFF linker
is able to accurately resolve comdats between IR and native object
files. Specifically, apply name mangling to comdat names consistently
with native object files, and do not export comdats with an internal
leader because they do not affect symbol resolution.

Differential Revision: https://reviews.llvm.org/D40278

llvm-svn: 318805
2017-11-21 22:06:20 +00:00
Billy Robert O'Neal III ba40b0566f Change (void) casts to TEST_IGNORE_NODISCARD, as requested by Eric. Reviewed as https://reviews.llvm.org/D40065
llvm-svn: 318804
2017-11-21 21:37:26 +00:00
Evandro Menezes 9dc54e25f0 [TableGen] Improve error reporting
When searching for a resource unit, use the reference location instead of
the definition location in case of an error.

Differential revision: https://reviews.llvm.org/D40263

llvm-svn: 318803
2017-11-21 21:33:52 +00:00
Kostya Kortchinsky 5a3fdbd829 [scudo] Make getNumberOfCPUs Fuchsia compliant v2
Summary:
This change allows Fuchsia to boot properly using the Scudo allocator.

A first version of this commit was reverted by rL317834 because it broke Android
builds for toolchains generated with older NDKs. This commit introduces a
fall back to solve that issue.

Reviewers: cryptoad, krytarowski, rnk, alekseyshl

Reviewed By: cryptoad, krytarowski, alekseyshl

Subscribers: llvm-commits, srhines, kubamracek, krytarowski

Differential Revision: https://reviews.llvm.org/D40121

llvm-svn: 318802
2017-11-21 21:14:00 +00:00
Krzysztof Parzyszek fc0a1812f5 [Hexagon] Make sure that RDF does not remove EH_LABELs
Since EH_LABELs (and other labels) no longer have "side-effects", they
should be checked for separately.

llvm-svn: 318801
2017-11-21 21:05:51 +00:00
Craig Topper ba150ef60a [X86] Allow vpclmulqdq instructions to be commuted during isel to allow load folding.
The commuting patterns for the AVX version actually still had priority over the new patterns.

llvm-svn: 318800
2017-11-21 21:05:21 +00:00
Craig Topper a890570b15 [X86] Add BITALG, VAES, VBMI2, VNNI, VPCLMULQDQ, and VPOPCNTDQ instructions to icelake CPU.
This is based on table 1-1 of the October 2017 revision of Intel® Architecture Instruction Set Extensions and Future Features Programming Reference

llvm-svn: 318799
2017-11-21 21:05:18 +00:00
Sam McCall cc713cf885 [clangd] avoid divide by literal zero to satisfy msvc
llvm-svn: 318798
2017-11-21 19:37:35 +00:00
Nirav Dave 61ffc9c0eb Avoid unecessary opsize byte in segment move to memory
Segment moves to memory are always 16-bit. Remove invalid 32 and 64
bit variants.

Recommiting with missing clang inline assembly test change.

Fixes PR34478.

Reviewers: rnk, craig.topper

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D39847

llvm-svn: 318797
2017-11-21 19:28:13 +00:00
Aaron Ballman 52a3ca9e29 The offsetof macro is intended to work with subobjects rather than simple identifiers designating a member, making the -Wextended-offsetof diagnostic obsolete as this construct is not an extension. Implements WG14 DR496.
llvm-svn: 318796
2017-11-21 19:25:38 +00:00
Michael Kruse 58166b13e0 Run polly-update-format. NFC.
polly-check-format has been failing since at least r318517,
due to more than one cause.

llvm-svn: 318795
2017-11-21 19:25:26 +00:00
Aaron Ballman 5f8980a995 Add an AST matcher for hasDefaultArgument() to match on parameter declarations that have a default value.
Patch by Julie Hockett.

llvm-svn: 318794
2017-11-21 19:22:34 +00:00
Sam McCall b67ce00e4d [clangd] use u8 strings in tests to avoid problems on windows
llvm-svn: 318793
2017-11-21 19:10:22 +00:00
Craig Topper 9b03f67f9a [X86] Sort bits in getHostCPUFeatures again.
llvm-svn: 318792
2017-11-21 18:50:41 +00:00
Sam McCall 40f191f724 [clangd] Add JSON tests with invalid unicode
llvm-svn: 318791
2017-11-21 18:40:43 +00:00
George Rokos b92dbb4b0a [Clang][OpenMP] New clang/libomptarget map interface: new function signatures, libomptarget-side
This is the libomptarget-side patch which changes the __tgt_* API function signatures in preparation for the new map interface.
Changes are: Device IDs 32bits --> 64bits, Flags 32bits --> 64bits

Differential revision: https://reviews.llvm.org/D40313

llvm-svn: 318790
2017-11-21 18:26:41 +00:00
George Rokos 63bc9d6f66 [Clang][OpenMP] New clang/libomptarget map interface: new function signatures, clang-side
This clang patch changes the __tgt_* API function signatures in preparation for the new map interface.
Changes are: Device IDs 32bits --> 64bits, Flags 32bits --> 64bits

Differential revision: https://reviews.llvm.org/D40281

llvm-svn: 318789
2017-11-21 18:25:12 +00:00
Chad Rosier fe97d73674 [AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as *having* side effects.
This partially reverts r298851.  The the underlying issue is that we don't
currently model the dependency between mrs (read system register) and
msr (write system register) instructions.

Something like the below should never be reordered:

 msr TPIDR_EL0, x0  ;; set thread pointer
 mrs x8, TPIDR_EL0  ;; read thread pointer

but was being reordered after r298851.  The functional part of the patch
that wasn't reverted needed to remain in place in order to not break
r299462.

PR35317

llvm-svn: 318788
2017-11-21 18:08:34 +00:00
Hans Wennborg 70e22d121d Fix r318786
llvm-svn: 318787
2017-11-21 18:00:01 +00:00
Nuno Lopes 5c122882ed removed unused private method decl. NFC
llvm-svn: 318786
2017-11-21 17:53:19 +00:00
Hans Wennborg 14e8a5a32d Add -finstrument-function-entry-bare flag
This is an instrumentation flag that's similar to
-finstrument-functions, but it only inserts calls on function entry, the
calls are inserted post-inlining, and they don't take any arugments.

This is intended for users who want to instrument function entry with
minimal overhead.

(-pg would be another alternative, but forces frame pointer emission and
affects link flags, so is probably best left alone to be used for
generating gcov data.)

Differential revision: https://reviews.llvm.org/D40276

llvm-svn: 318785
2017-11-21 17:30:34 +00:00
Hans Wennborg d97c0f7855 Rename test/Transforms/CountingFunctionInserter -> EntryExitInstrumenter
The pass was renamed in r318195.

llvm-svn: 318784
2017-11-21 17:22:19 +00:00
Hans Wennborg 37cbf28e79 EntryExitInstrumenter: support __cyg_profile_func_enter_bare
It works just like __cyg_profile_func_enter but takes no arguments.

llvm-svn: 318783
2017-11-21 17:22:19 +00:00
Sam McCall bcfec0d6d5 [clangd] Include the right header for std::isxdigit
llvm-svn: 318782
2017-11-21 17:18:30 +00:00
Alexey Bataev 7828b25251 [OPENMP] Initial support for asynchronous data update, NFC.
OpenMP 5.0 introduces asynchronous data update/dependecies clauses on
target data directives. Patch adds initial support for outer task
regions to use task-based codegen for future async target data
directives.

llvm-svn: 318781
2017-11-21 17:08:48 +00:00
Sam McCall d6836b8a67 [clangd] Satisfy GCC: 'changes meaning of Error'
llvm-svn: 318780
2017-11-21 17:02:24 +00:00
Jonas Hahnfeld cfd162d8e5 Fix test/OpenMP/nvptx_data_sharing.cpp
This was an oversight that stayed in the test from development.

llvm-svn: 318779
2017-11-21 16:49:11 +00:00
Sam McCall fb796d44f4 [clangd] Fix dumb && || bug from r318774
llvm-svn: 318778
2017-11-21 16:44:16 +00:00
Oliver Stannard 9cb89f6611 [ARM] Remove pre-UAL FLDM/FSTM aliases
These are pre-UAL syntax, and we don't support any other pre-UAL instructions,
with the exception of FLDMX/FSTMX, which don't have a UAL equivalent. Therefore
there's no reason to keep them or their AsmParser hacks around.

With the AsmParser hacks removed, the FLDMX and FSTMX instructions get the same
operand diagnostics as the UAL instructions.

Differential revision: https://reviews.llvm.org/D39196

llvm-svn: 318777
2017-11-21 16:20:25 +00:00
Aleksei Sidorin 2697f8e4b2 [ASTImporter] Support new AST nodes:
* UnresolvedUsingType
 * EmptyDecl
 * NamespaceAliasDecl
 * UsingDecl
 * UsingShadowDecl
 * UsingDirectiveDecl
 * UnresolvedUsingValueDecl
 * UnresolvedUsingTypenameDecl

Refactor error handling in ImportTemplateArgumentLoc() method.
Add a test for inline namespaces.

llvm-svn: 318776
2017-11-21 16:08:41 +00:00
Kostya Kortchinsky 2e96469465 [sanitizer] Define SANITIZER_USE_GETAUXVAL for Android
Summary:
Android for API level >= 21 has `getauxval`. Enable `SANITIZER_USE_GETAUXVAL`
when those requirements are met. Correct a typo in the header.

Reviewers: alekseyshl

Reviewed By: alekseyshl

Subscribers: srhines, llvm-commits, kubamracek

Differential Revision: https://reviews.llvm.org/D40260

llvm-svn: 318775
2017-11-21 16:08:07 +00:00
Sam McCall adbaebc242 [clangd] Add parsing and value inspection to JSONExpr.
Summary:
This will replace the places where we're using YAMLParser to parse JSON now:
  - the new marshalling code (T::parse()) should handle fewer cases and require
    fewer explicit casts
  - we'll early-reject invalid JSON that YAMLParser accepts
  - we'll be able to fix protocol-parsing bugs caused by the fact that YAML can
    only parse forward

I plan to do the conversion as soon as this lands, but I don't want it in one
patch as the protocol.cpp changes are conflict-prone.

Reviewers: ioeric

Subscribers: ilya-biryukov, cfe-commits

Differential Revision: https://reviews.llvm.org/D40182

llvm-svn: 318774
2017-11-21 16:00:53 +00:00
Gheorghe-Teodor Bercea eb89b1d46f [OpenMP] Add implicit data sharing support when offloading to NVIDIA GPUs using OpenMP device offloading
Summary:
This patch is part of the development effort to add support in the current OpenMP GPU offloading implementation for implicitly sharing variables between a target region executed by the team master thread and the worker threads within that team.

This patch is the first of three required for successfully performing the implicit sharing of master thread variables with the worker threads within a team. The remaining two patches are:
- Patch D38978 to the LLVM NVPTX backend which ensures the lowering of shared variables to an device memory which allows the sharing of references;
- Patch (coming soon) is a patch to libomptarget runtime library which ensures that a list of references to shared variables is properly maintained.

A simple code snippet which illustrates an implicit data sharing situation is as follows:

```
#pragma omp target
{
   // master thread only
   int v;
   #pragma omp parallel
   {
      // worker threads
      // use v
   }
}
```

Variable v is implicitly shared from the team master thread which executes the code in between the target and parallel directives. The worker threads must operate on the latest version of v, including any updates performed by the master.

The code generated in this patch relies on the LLVM NVPTX patch (mentioned above) which prevents v from being lowered in the thread local memory of the master thread thus making the reference to this variable un-shareable with the workers. This ensures that the code generated by this patch is correct.
Since the parallel region is outlined the passing of arguments to the outlined regions must preserve the original order of arguments. The runtime therefore maintains a list of references to shared variables thus ensuring their passing in the correct order. The passing of arguments to the outlined parallel function is performed in a separate function which the data sharing infrastructure constructs in this patch. The function is inlined when optimizations are enabled.

Reviewers: hfinkel, carlo.bertolli, arpith-jacob, Hahnfeld, ABataev, caomhin

Reviewed By: ABataev

Subscribers: cfe-commits, jholewinski

Differential Revision: https://reviews.llvm.org/D38976

llvm-svn: 318773
2017-11-21 15:54:54 +00:00
Alina Sbirlea ff8b8aea2e Add MemorySSA as loop dependency, disabled by default [NFC].
Summary:
First step in adding MemorySSA as dependency for loop pass manager.
Adding the dependency under a flag.

New pass manager: MSSA pointer in LoopStandardAnalysisResults can be null.
Legacy and new pass manager: Use cl::opt EnableMSSALoopDependency. Disabled by default.

Reviewers: sanjoy, davide, gberry

Subscribers: mehdi_amini, Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D40274

llvm-svn: 318772
2017-11-21 15:45:46 +00:00
Oliver Stannard 1e6d4b9e62 [ARM] Don't omit non-default predication code
This was causing the (invalid) predicated versions of the NEON VRINTX and
VRINTZ instructions to be accepted, with the condition code being ignored.

Also, there is no NEON VRINTR instruction, so that part of the check was not
necessary.

Differential revision: https://reviews.llvm.org/D39193

llvm-svn: 318771
2017-11-21 15:34:15 +00:00
Oliver Stannard 1e73e95f3c [Asm] Improve "too few operands" errors
- We can still emit this error if the actual instruction has two or more
  operands missing compared to the expected one.
- We should only emit this error once per instruction.

Differential revision: https://reviews.llvm.org/D36746

llvm-svn: 318770
2017-11-21 15:16:50 +00:00
Oliver Stannard 6e94331259 [Asm] Finish matching once end of formal and actual lists reached (NFC)
This is NFC, as the matcher would continue looping up to the maximum
number of operands with no effect, but this should improve performance a
bit, and makes the debug trace clearer.

Differential revision: https://reviews.llvm.org/D36744

llvm-svn: 318769
2017-11-21 15:12:05 +00:00
Sander de Smalen 4acd57eb51 Revert r318759 due to make check-all failure on Windows
llvm-svn: 318768
2017-11-21 15:07:43 +00:00
Jonas Hahnfeld 4609b25dde Add target triples to openmp-offload-gpu.c
This might fix the failure on Green Dragon.

llvm-svn: 318767
2017-11-21 15:06:28 +00:00
Oliver Stannard d6ca9879ba [ARM] Add diagnostics for SPR/DPR lists
Differential revision: https://reviews.llvm.org/D39195

llvm-svn: 318766
2017-11-21 15:06:01 +00:00
Erik Pilkington 1b7f8d5b04 [demangler] Document some features that the demangler doesn't yet support, NFC
llvm-svn: 318765
2017-11-21 15:04:08 +00:00
Alexey Bataev a054ea9848 [InstCombine] Test for PR35354: unable to vectorize loop with std::max
on floats, NFC.

llvm-svn: 318764
2017-11-21 14:49:13 +00:00
Jonas Hahnfeld 7c78cc5273 [OpenMP] Consistently use cubin extension for nvlink
This was previously done in some places, but for example not for
bundling so that single object compilation with -c failed. In
addition cubin was used for all file types during unbundling which
is incorrect for assembly files that are passed to ptxas.
Tighten up the tests so that we can't regress in that area.

Differential Revision: https://reviews.llvm.org/D40250

llvm-svn: 318763
2017-11-21 14:44:45 +00:00
Sam Kolton c27e3b6f03 [AMDGPU] SDWA: remove omod src operand for VOP2b instructions
Summary: VOP2b instructions (v_subbrev_u32, v_add_i32 ...) shouldn't support OMod operand in SDWA encoding

Reviewers: rampitec, dp

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D40172

llvm-svn: 318761
2017-11-21 14:11:59 +00:00
Alex Bradbury e2f664e1c6 [RISCV][NFC] Remove unnecessary {} around single statement if block
Almost too trivial to worry about, but it seems worth having consistency with
upcoming commits.

llvm-svn: 318760
2017-11-21 12:41:41 +00:00
Sander de Smalen f475eed48d [TableGen] AsmMatcher: Fix bug with reported diagnostic for operand.
Summary:
The generated diagnostic by the AsmMatcher isn't always applicable to the AsmOperand.

This is because the code will only update the diagnostic if it is more specific than the previous diagnostic. However, when having validated operands and 'moved on' to a next operand (for some instruction/alias for which all previous operands are valid), if the diagnostic is InvalidOperand, than that should be set as the diagnostic, not the more specific message about a previous operand for some other instruction/alias candidate.

Reviewers: craig.topper, olista01, rengolin, stoklund

Reviewed By: olista01

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D40011

llvm-svn: 318759
2017-11-21 12:26:06 +00:00
Simon Pilgrim e1490afa4c [X86][XOP] Add missing scheduler classes to XOP instructions
All match equivalent basic classes (WritePHAdd, WriteFAdd etc.) according to both the AMD 15h SOG and Agner's tables.

llvm-svn: 318758
2017-11-21 12:02:18 +00:00