5d30f7c91c
Fix a minor issue in x86 load / store folding table. movups does an unaligned load so it doesn't require 16-byte alignment.
...
llvm-svn: 94058
2010-01-21 00:55:14 +00:00
32fb9564bc
eliminate FnStubInfo, using MachineModuleInfoMachO instead.
...
this makes function stub emission determinstic.
llvm-svn: 94033
2010-01-20 21:36:48 +00:00
c5db599813
make findDebugLoc a class method
...
llvm-svn: 94032
2010-01-20 21:36:02 +00:00
2f7c279257
split function stub printing out to its own function,
...
no functionality change.
llvm-svn: 94030
2010-01-20 21:19:44 +00:00
1ff4794cbb
eliminate the GVStubs and HiddenGVStubs maps, and use
...
MachineModuleInfoMachO instead. This eliminates two sources
of nondeterministic output in the ppc backend, but function
stubs are still bad.
llvm-svn: 94029
2010-01-20 21:16:14 +00:00
0985160c54
When XDEBUG is enabled, check for SelectionDAG cycles at some key
...
points. This will help us find future problems like the one
described in PR6019.
llvm-svn: 94019
2010-01-20 20:13:31 +00:00
6a7939243f
reduce redundant are's.
...
llvm-svn: 94008
2010-01-20 17:53:51 +00:00
db42c8d23d
inline and radically simplify printDataDirective. It will eventually
...
go completely away.
llvm-svn: 93994
2010-01-20 07:33:29 +00:00
2b4364fe03
revert 93934, removing the MCAsmInfo endianness bit. I can't
...
stomache MCAsmInfo having this, and I found a better solution to
this layering issue.
llvm-svn: 93985
2010-01-20 06:34:14 +00:00
91970b4ea2
Move findDebugLoc somewhere more central. Fix
...
more cases where debug declarations affect
debug line info.
llvm-svn: 93953
2010-01-20 00:19:24 +00:00
6a4491b8c7
Wrap some comments to 80 columns.
...
llvm-svn: 93940
2010-01-19 22:56:26 +00:00
aa6655557b
Fix a case where debug_value was perturbing the
...
line number info.
llvm-svn: 93937
2010-01-19 22:50:05 +00:00
003b5c8472
give MCAsmInfo a 'has little endian' bit. This is unfortunate, but
...
I really want clients of the streamer to be able to say "emit this
64-bit integer" and have it get broken down right by the streamer.
I may change this in the future, we'll see how it works out.
llvm-svn: 93934
2010-01-19 22:42:28 +00:00
ecaf0dcbc6
eliminate AsmPrinter::EmitZeros: just use MCStreamer directly.
...
llvm-svn: 93918
2010-01-19 21:51:22 +00:00
936b0d3144
Promoted the getTok() method to MCAsmParser so that
...
the two token accessor functions are declared consistently.
Modified the clients of MCAsmParser to reflect this change.
llvm-svn: 93916
2010-01-19 21:44:56 +00:00
bdc17f6840
Remove predicates when changing an add into an unpredicable mov.
...
Since the mov is executed unconditionally, make sure that the add didn't have
any predicate.
llvm-svn: 93909
2010-01-19 21:08:28 +00:00
a83fd7d52c
Propagated the parser-side Lex function's declaration to
...
MCAsmParser, and changed the target-specific AsmParsers
to use it.
llvm-svn: 93900
2010-01-19 20:27:46 +00:00
e1afaf5c22
Fix a bug introduced on r92564 where the name "Node" was already
...
in use by Mips.
llvm-svn: 93897
2010-01-19 19:57:07 +00:00
c35681b298
Generalize mcasmstreamer data emission APIs to take an address space
...
identifier. There is no way to work around it.
llvm-svn: 93896
2010-01-19 19:46:13 +00:00
9c31b0c695
remove MAI::ZeroDirectiveSuffix, which is only used by MASM,
...
which we don't support anymore.
llvm-svn: 93886
2010-01-19 18:37:01 +00:00
04770f2aa1
For aligned load/store instructions, it's only required to know whether a
...
function can support dynamic stack realignment. That's a much easier question
to answer at instruction selection stage than whether the function actually
will have dynamic alignment prologue. This allows the removal of the
stack alignment heuristic pass, and improves code quality for cases where
the heuristic would result in dynamic alignment code being generated when
it was not strictly necessary.
llvm-svn: 93885
2010-01-19 18:31:11 +00:00
4f34432d09
On pic function calls some arguments were marked dead and
...
the instruction to load those args removed. This fix PR6071
llvm-svn: 93880
2010-01-19 17:00:43 +00:00
c9818a77cb
load f64 +0.0 in a cleaner way. This fix part of PR5445
...
llvm-svn: 93876
2010-01-19 12:53:04 +00:00
2f5c8e3495
Fix return registers for mips eabi
...
llvm-svn: 93875
2010-01-19 12:37:35 +00:00
cd2915e467
stop using the .lcomm pseudoop on darwin, instead, directly use the
...
.zerofill directive. Streamerize its generation.
llvm-svn: 93868
2010-01-19 06:25:51 +00:00
1083b5fc3f
Avoid including DebugInfo.h in AsmPrinter.h
...
llvm-svn: 93864
2010-01-19 06:09:04 +00:00
00fa4b67e6
zap the ARM version of PrintGlobalVariable, which I missed.
...
llvm-svn: 93863
2010-01-19 06:08:15 +00:00
c7a062d187
Now that we have everything nicely factored (e.g. asmprinter is not
...
doing global variable classification anymore) and hookized, sink almost
all target targets global variable emission code into AsmPrinter and out
of each target.
Some notes:
1. PIC16 does completely custom and crazy stuff, so it is not changed.
2. XCore has some custom handling for extra directives. I'll look at it next.
3. This switches linux/ppc to use .globl instead of .global. If .globl is
actually wrong, let me know and I'll fix it.
4. This makes linux/ppc get a lot of random cases right which were obviously
wrong before, it is probably now a bit healthier.
5. Blackfin will probably start getting .comm and other things that it didn't
before. If this is undesirable, it should explicitly opt out of these
things by clearing the relevant fields of MCAsmInfo.
This leads to a nice diffstat:
14 files changed, 127 insertions(+), 830 deletions(-)
llvm-svn: 93858
2010-01-19 05:38:33 +00:00
f75fe9e34c
use %object like other elf targets, gas accepts either.
...
llvm-svn: 93857
2010-01-19 05:25:38 +00:00
9d749a2fc4
simplify the mips target to print .size and .type for c strings
...
just like all other elf targets. Bruno, if this isn't right, please
let me know + why :)
llvm-svn: 93856
2010-01-19 05:23:59 +00:00
b1f2934fc7
hookize the cygwin ".linkonce" directive.
...
llvm-svn: 93855
2010-01-19 05:08:13 +00:00
826d77fb07
more cleanups. Emit the .local directive even on cygwin/mingw.
...
I'm not sure that this is correct, but it causes no test failures,
and just emitting a .comm without protecting its linkage somehow
is surely not right.
llvm-svn: 93854
2010-01-19 04:59:55 +00:00
f8a128a1a8
some cleanups
...
llvm-svn: 93853
2010-01-19 04:53:18 +00:00
dccbb28bca
add a bool for whether .lcomm takes an alignment instead of basing this on "isdarwin".
...
llvm-svn: 93852
2010-01-19 04:48:20 +00:00
6a160517a0
hoist handling of external globals and special globals up to common code.
...
This makes a similar code dead in all the other targets, I'll clean it up
in a bit.
This also moves handling of lcomm up before acquisition of a section,
since lcomm never needs a section.
llvm-svn: 93851
2010-01-19 04:39:15 +00:00
e9d28b19cf
move production of .reference directives for static ctor/dtor list on
...
darwin into common code.
llvm-svn: 93849
2010-01-19 04:34:02 +00:00
35474ca4c4
use BSSLocal classifier to identify 'lcomm' data instead of
...
duplicating the logic (differently) in lots of different targets.
llvm-svn: 93847
2010-01-19 04:21:20 +00:00
b253421711
make TLOF subclassify BSS based on linkage type into private, external
...
and everything else (weak).
llvm-svn: 93846
2010-01-19 04:15:51 +00:00
70f0c33ec8
now that elf weak bss symbols are handled correctly, simplify a bunch of code.
...
llvm-svn: 93845
2010-01-19 03:13:44 +00:00
a986aa33eb
fix a significant difference between llvm and gcc on ELF systems:
...
GCC would put weak zero initialized mutable data in the .bss section,
we would put it into a crasy '.gnu.linkonce.b.test,"aw",@nobits'
section. Fixing this will allow simplifications next up.
llvm-svn: 93844
2010-01-19 03:06:01 +00:00
5b585f8b1a
introduce a section kind for common linkage. Use this to slightly
...
simplify and commonize some of the asmprinter logic for globals.
This also avoids printing the MCSection for .zerofill, which broke
the llvm-gcc build.
llvm-svn: 93843
2010-01-19 02:48:26 +00:00
220c29465e
Even more explanation.
...
llvm-svn: 93841
2010-01-19 02:44:01 +00:00
aa1f4fd0ed
change an accessor to a predicate.
...
llvm-svn: 93839
2010-01-19 02:13:06 +00:00
1d371882b6
Cleanup handling of .zerofill on darwin:
...
1. TargetLoweringObjectFileMachO should decide if something
goes in zerofill instead of having every target do it.
2. TargetLoweringObjectFileMachO should assign said symbols to
the right MCSection, the asmprinters should just emit to the
right section.
3. Since all zerofill stuff goes through mcstreamer anymore,
MAI can have a bool "haszerofill" instead of having the textual
directive to emit.
llvm-svn: 93838
2010-01-19 02:09:44 +00:00
6c0fb92c03
Fix r93758. Use isel patterns instead of c++ selection code to select rbit and make sure we pick different instructions for ARM vs. Thumb2.
...
llvm-svn: 93829
2010-01-19 00:44:15 +00:00
a3db6ef9a2
Revert 93811 per request.
...
llvm-svn: 93818
2010-01-19 00:10:52 +00:00
0c90d43b70
Enable code to emit dbg.declare as DEBUG_VALUE
...
comments (fast isel, X86). This doesn't seem
to break any functionality, but will introduce
cases where -g affects the generated code. I'll
be fixing that.
llvm-svn: 93811
2010-01-18 23:34:55 +00:00
9ed49c5c8f
Add some potentially interesting transformations to README.
...
llvm-svn: 93797
2010-01-18 22:36:59 +00:00
c592725fbb
- Add getLSDAEncoding to the PowerPC backend.
...
- Greatly improve the comments to the getLSDAEncoding method.
llvm-svn: 93796
2010-01-18 22:36:35 +00:00
7eb6e0ffd6
Have FastISel handle llvm.trap().
...
llvm-svn: 93781
2010-01-18 22:11:29 +00:00
e7b52f2e87
Minor cleanup for jump table printing. Need a reference, not a pointer, for
...
printing via <<. Otherwise we just print the pointer value.
llvm-svn: 93777
2010-01-18 22:01:39 +00:00
27f000a9af
The most significant encoding bit of GPR:$src or GPR:$dst was over-specified in
...
the various MOV (register) instructions (16-bit Thumb), including tBRIND (the
indirect branch). Instead of '1', it should be specified as '?', because GPR
only specifies the register class, which includes both hi-and-lo registers.
llvm-svn: 93759
2010-01-18 20:15:56 +00:00
8546ec9c14
Patch by David Conrad:
...
"On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction
sequence it is now."
llvm-svn: 93758
2010-01-18 19:58:49 +00:00
748ceca695
Add FIXME comment.
...
llvm-svn: 93755
2010-01-18 19:47:53 +00:00
a73e471c62
- Add a comment to the callback indicating that it's *extremely* not a good
...
idea, but unfortunately necessary.
- Default to using 4-bytes for the LSDA pointer encoding to agree with the
encoded value in the CIE.
llvm-svn: 93753
2010-01-18 19:36:27 +00:00
7430a98619
Emit spaces after commas in Neon register lists. This is more consistent
...
with the rest of the assembly output, is easier to read, and matches the
expected output for gcc's Neon tests.
llvm-svn: 93703
2010-01-18 01:24:43 +00:00
1d8b954b43
switch x86 zerofill emission over to use MCStreamer.
...
llvm-svn: 93702
2010-01-18 01:21:08 +00:00
8c21ffdcc6
Change CurrentFnSym to be a non-const pointer since asmprinter mutates it
...
as it emits code. Switch .globl directives to use OutStreamer instead of
doing it textually (in x86)
llvm-svn: 93700
2010-01-18 00:59:24 +00:00
c8f7717808
remove the MAI argument to MCExpr::print and switch overthing to use << when printing them.
...
llvm-svn: 93699
2010-01-18 00:37:40 +00:00
fae53f0c61
unbreak x86 jump tables with my previous patch.
...
llvm-svn: 93698
2010-01-18 00:21:06 +00:00
8b5d55ed06
now that MCSymbol::print doesn't use it's MAI argument, we can
...
remove it and change all the code that prints MCSymbols to use
<< instead, which is much simpler and cleaner.
llvm-svn: 93695
2010-01-17 21:43:43 +00:00
8c2ab10bdd
stop the CBE from using Mangler::appendMangledName, which is a private function, it is mangling types, which don't matter how they are done.
...
llvm-svn: 93692
2010-01-17 19:32:29 +00:00
83e872e1c4
Get MCSymbol out of the mangling business, and move all the logic
...
to Mangler. Now MCSymbol just decides whether to slap quotes around
a symbol when printing it.
This also fixes some weirdness where two MCSymbols could be created
for the same symbol, if one needed to be mangled and got mangled to
the other one.
llvm-svn: 93690
2010-01-17 19:23:46 +00:00
c25475ec9d
factor this code better how that the string version of getNameWithPrefix
...
takes a twine.
llvm-svn: 93687
2010-01-17 18:52:16 +00:00
b4ffc894e6
now that mangler is in libtarget, it can use MCAsmInfo instead of clients
...
having to pass various fields from it in. Simplify.
llvm-svn: 93686
2010-01-17 18:22:35 +00:00
9349437c65
The Neon "vtst" instruction takes a suffix that is the element size alone --
...
adding an "i" to the suffix, indicating that the elements are integers, is
accepted but not part of the standard syntax. This helps us pass a few more
of the Neon tests from gcc.
llvm-svn: 93677
2010-01-17 06:35:17 +00:00
55d2ebda31
Fix an off-by-one error that caused the chain operand to be dropped from Neon
...
vector load-lane and store-lane instructions.
llvm-svn: 93673
2010-01-17 05:58:23 +00:00
520442b32c
Update CMake files for Mangler move.
...
llvm-svn: 93665
2010-01-16 22:23:09 +00:00
f62e3ee8c5
move the mangler into libtarget from vmcore.
...
llvm-svn: 93664
2010-01-16 21:57:06 +00:00
555ceabe64
rename GetPrivateGlobalValueSymbolStub -> GetSymbolWithGlobalValueBase,
...
and add an explicit ForcePrivate argument.
Switch FunctionEHFrameInfo to be MCSymbol based instead of string based.
llvm-svn: 93646
2010-01-16 18:37:32 +00:00
c0e17df3ce
Replace DebugLocTuple with DILocation.
...
llvm-svn: 93630
2010-01-16 06:09:35 +00:00
a44d8f806b
fix build failure.
...
llvm-svn: 93628
2010-01-16 03:38:27 +00:00
32c9512132
remove a couple of actively incorrect uses of getMangledName.
...
llvm-svn: 93627
2010-01-16 02:16:09 +00:00
3a3480fa53
this doesn't need the mangler.
...
llvm-svn: 93626
2010-01-16 02:15:38 +00:00
3d571ff970
more string -> sym, getMangledName is now gone from this file.
...
llvm-svn: 93624
2010-01-16 02:09:06 +00:00
1e26ec35d7
use symbols instead of strings, eliminating a bunch of getMangledName
...
calls. Add FIXMEs about a bunch of nondeterminism in stub output.
llvm-svn: 93621
2010-01-16 02:00:23 +00:00
e4e85a4e75
simplify some code.
...
llvm-svn: 93619
2010-01-16 01:45:47 +00:00
bf5cfa1a41
Retrying r91337:
...
The CIE says that the LSDA point in the FDE section is an "sdata4". That's fine,
but we need it to actually be 4-bytes in the FDE for some platforms. Allow
individual platforms to decide for themselves.
llvm-svn: 93616
2010-01-16 01:40:55 +00:00
94d91a5b30
eliminate uses of mangler and simplify code.
...
llvm-svn: 93615
2010-01-16 01:40:07 +00:00
53c659f3ab
get pic16 off CurrentFnName
...
llvm-svn: 93610
2010-01-16 01:21:04 +00:00
fedff0f67d
remove the string form of printVisibility.
...
llvm-svn: 93609
2010-01-16 01:17:26 +00:00
426f31f458
switch more stuff onto MCSymbols
...
llvm-svn: 93608
2010-01-16 01:12:01 +00:00
8a38fc33b0
eliminate uses of deprecated mangler apis
...
llvm-svn: 93605
2010-01-16 01:00:27 +00:00
e6b1bef33a
switch X86 target off CurFunctionName and MCIze more.
...
Note that the code wasn't calling DecorateCygMingName
when emitting the ".ascii -export" stuff at the end of
file for DLLExported functions. I don't know if it should
or not, but I'm preserving behavior.
llvm-svn: 93603
2010-01-16 00:51:39 +00:00
274c0c0db3
MCize tis, and make it keep CurrentFnSym up to date with CurrentFnName.
...
llvm-svn: 93598
2010-01-16 00:32:38 +00:00
c6d3d82798
revert the x86 part of my last patch, cygwin is mutating CurrentFnName!
...
llvm-svn: 93595
2010-01-16 00:24:20 +00:00
719e908e7c
MCize a bunch more stuff, eliminating a lot of uses of the mangler
...
and CurrentFnName.
llvm-svn: 93594
2010-01-16 00:21:18 +00:00
8b96af5665
remove two write-only sets.
...
llvm-svn: 93590
2010-01-15 23:56:03 +00:00
ae9b9eed18
supplement CurrentFnName with CurrentFnSym, which will eventually
...
replace it. Upgrade Alpha, Blackfin, and part of CellSPU to not
use mangler anymore. CellSPU needs more invasive surgery.
llvm-svn: 93589
2010-01-15 23:55:16 +00:00
7fec180909
add a version of AsmPrinter::printVisibility that takes an MCSymbol.
...
llvm-svn: 93587
2010-01-15 23:38:51 +00:00
6394a6e285
use MCSymbol instead of getMangledName() in all cases except one.
...
llvm-svn: 93582
2010-01-15 23:31:55 +00:00
cb7554a3ab
Adjust some comments per review.
...
llvm-svn: 93580
2010-01-15 23:29:29 +00:00
45400336ab
mc'ize a bunch of symbol stuff, eliminating std::strings.
...
llvm-svn: 93578
2010-01-15 23:26:49 +00:00
b0c0e6433f
Fix PR6019. A load has more than one use if it feeds a bitconvert that
...
has more than one use.
llvm-svn: 93576
2010-01-15 23:23:41 +00:00
91687f6e28
add a AsmPrinter::GetGlobalValueSymbol and GetExternalSymbolSymbol
...
helper method, use it to simplify some code.
llvm-svn: 93575
2010-01-15 23:18:17 +00:00
bda8193caf
Update CMake build.
...
llvm-svn: 93570
2010-01-15 22:59:11 +00:00
188fa96cf9
DEBUG_VALUE is now variable sized, as it has a
...
target-dependent memory address representation in it.
Restore X86 printing of DEBUG_VALUE; lowering is
done in X86RegisterInfo using the normal algorithm.
llvm-svn: 93565
2010-01-15 22:22:35 +00:00
d1a8a7819c
Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properly
...
handle physical registers R0-R7 when described as having a non-tGPR register
class.
llvm-svn: 93564
2010-01-15 22:21:03 +00:00
d2968c4c12
Fix a typo that Anton noticed.
...
llvm-svn: 93563
2010-01-15 22:18:15 +00:00
8444d7536c
Remove the InlineHint attribute. There are no current or planned
...
users.
llvm-svn: 93558
2010-01-15 21:36:30 +00:00
a6450df92a
zext / truncate is free on msp430. Inform codegen about this.
...
llvm-svn: 93556
2010-01-15 21:19:43 +00:00
ce52fd5f93
Add branch relaxation pass (shamelessly stolen from PPC).
...
llvm-svn: 93554
2010-01-15 21:19:05 +00:00
71471293a5
Provide instruction sizes & encoding. No opcodes yet (but not needed so far).
...
llvm-svn: 93553
2010-01-15 21:18:39 +00:00
93a7d026a8
Enable bit tests and setcc stuff.
...
llvm-svn: 93552
2010-01-15 21:18:18 +00:00
6826ce7e96
Add micro-optimization which allows us to fold imm into cmp. This allows us to save 1 word (sometimes) and reduce register pressure.
...
llvm-svn: 93551
2010-01-15 21:18:02 +00:00
e57b234b88
Add instruction formats & support stuff
...
llvm-svn: 93550
2010-01-15 21:17:13 +00:00
e17df0b7f0
fix a bug in range information for $42, eliminate an
...
unneeded argument from ParseExpression.
llvm-svn: 93536
2010-01-15 19:39:23 +00:00
015cfb1577
add range information for mem X86Operand's, now all
...
X86Operand's have range info.
llvm-svn: 93535
2010-01-15 19:33:43 +00:00
528d00b913
extend MCAsmParser::ParseExpression and ParseParenExpression
...
to return range information for subexpressions. Use this to
provide range info for several new X86Operands.
llvm-svn: 93534
2010-01-15 19:28:38 +00:00
86e6153382
give X86Operand a ctor and start passing SMLoc's into it.
...
llvm-svn: 93532
2010-01-15 19:06:59 +00:00
fb85dddba0
Revert 93499. After discussion with Chris we agreed
...
FrameIndexes should be lowered, but the same way as
everything else (target dependent) rather than in a
special hacked way. The lowering needs to be done
for eventual purposes of Dwarf generation.
llvm-svn: 93530
2010-01-15 18:58:14 +00:00
0c2538fee2
add range location info for registers, change
...
X86Operand::Create* implementations to avoid
copy ctor use.
llvm-svn: 93528
2010-01-15 18:51:29 +00:00
a2bbb7cbc6
clean up the memory management of the operands.
...
llvm-svn: 93526
2010-01-15 18:44:13 +00:00
cc2ad08a11
refactor ParseRegister to avoid using X86Operand as a temporary
...
datastructure when parsing a mem operand.
llvm-svn: 93521
2010-01-15 18:27:19 +00:00
0e7e55da1d
Lower FrameIndex operand of DEBUG_VALUE (specially) and
...
print it as a comment on X86.
llvm-svn: 93499
2010-01-15 01:54:55 +00:00
cefa7addc8
Fix cmp emission on msp430: we definitely should turn stuff like
...
"icmp lhs, rhs" into "cmp rhs, lhs". This should fix PR5979.
llvm-svn: 93496
2010-01-15 01:29:49 +00:00
029fbd984b
Name change for consistency. No functional change.
...
llvm-svn: 93480
2010-01-15 00:22:18 +00:00
d0860d6e02
EmitAtomicCmpSwap() custome inserter needs to delete the MI passed in. EmitAtomicBinary() already does this.
...
llvm-svn: 93479
2010-01-15 00:18:34 +00:00
3aa70b2c4f
Teach PPC how to replaceMachineCodeForFunction correctly. (Fixes
...
JITTest.FunctionIsRecompiledAndRelinked.)
llvm-svn: 93475
2010-01-14 23:15:26 +00:00
0f45f4f849
Added 16-bit Thumb Load/Store immediate instructions with encoding bits so that
...
the disassembler can properly decode Load/Store register/immediate instructions.
llvm-svn: 93471
2010-01-14 22:42:17 +00:00
f29c0b6880
Split the TargetAsmParser "ParseInstruction" interface in half:
...
the new ParseInstruction method just parses and returns a list of
target operands. A new MatchInstruction interface is used to
turn the operand list into an MCInst.
This requires new/deleting all the operands, but it also gives
targets the ability to use polymorphic operands if they want to.
llvm-svn: 93469
2010-01-14 22:21:20 +00:00
abf4ef0ee1
Remove pseudo-MI in custom inserter.
...
llvm-svn: 93467
2010-01-14 22:09:11 +00:00
77fd677111
prune #includes in TargetAsmParser.h
...
Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.
llvm-svn: 93457
2010-01-14 21:32:45 +00:00
ecc8eece7d
introduce MCParsedAsmOperand
...
llvm-svn: 93455
2010-01-14 21:21:40 +00:00
872501b6e0
introduce the MCParsedAsmOperand class.
...
llvm-svn: 93454
2010-01-14 21:20:55 +00:00
0ca14e4498
ARM "l" constraint for inline asm means R0-R7, also for Thumb2.
...
This is consistent with llvm-gcc's arm/constraints.md.
Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2
mode.
llvm-svn: 93436
2010-01-14 18:19:56 +00:00
bff090648b
Don't fold insufficiently aligned ldr/str into ldm/stm instructions.
...
An unaligned ldr causes a trap, and is then emulated by the kernel with
awesome performance. The darwin kernel does not emulate unaligned ldm/stm
Thumb2 instructions, so don't generate them.
This fixes the miscompilation of Multisource/Applications/JM/lencod for Thumb2.
Generating unaligned ldr/str pairs from a 16-bit aligned memcpy is probably
also a bad idea, but that is beyond the scope of this patch.
llvm-svn: 93393
2010-01-14 00:54:10 +00:00
3eb76c23dd
this is an SSE-specific issue.
...
llvm-svn: 93373
2010-01-13 23:29:11 +00:00
fb534d97b5
X86 if conversion + tail merging issues from PR6032.
...
llvm-svn: 93372
2010-01-13 23:28:40 +00:00
ccbeed2af4
fix ELF section mangling stuff for weak symbols to not use
...
obsolete Mangler interfaces.
llvm-svn: 93356
2010-01-13 21:29:21 +00:00
51d6cc4bdb
reduce duplicate mangling logic by using MCSymbol::printMangledName.
...
llvm-svn: 93351
2010-01-13 21:12:34 +00:00
b34888b6d0
Fixed a couple of places for Thumb MOV where encoding bits are underspecified.
...
llvm-svn: 93349
2010-01-13 21:00:26 +00:00
fcf91ee403
Fix pasto
...
llvm-svn: 93342
2010-01-13 19:54:39 +00:00
c5b7dcf552
stop the CBE from using deprecated Mangler stuff.
...
llvm-svn: 93341
2010-01-13 19:54:07 +00:00
643b817d92
Use the GV version of getNameWithPrefix in TargetLoweringObjectFileCOFF::
...
SelectSectionForGlobal, unbreaking weak globals with no-name.
llvm-svn: 93336
2010-01-13 19:19:17 +00:00
a9365352cf
just finish MCizing FnStubInfo which cleans it up and simplifies it.
...
llvm-svn: 93334
2010-01-13 19:13:16 +00:00
45faea454d
don't call getNameWithPrefix repeatedly and unnecesarily.
...
llvm-svn: 93333
2010-01-13 19:05:36 +00:00
9148f36e90
properly use MCSymbol to print the strings aquired from getNameWithPrefix.
...
llvm-svn: 93332
2010-01-13 19:00:57 +00:00
ede8ad45bc
upgrade and MC'ize a few uses of makeNameProper.
...
llvm-svn: 93310
2010-01-13 08:08:33 +00:00
4cd281dab1
MC'ize this a bit and upgrade APIs
...
llvm-svn: 93309
2010-01-13 08:04:24 +00:00
b0dc959e1d
add a fixme, ELF MCSection isn't quite right and weak unnamed globals are broken
...
on linux (even though they are pointless, they shouldn't ICE).
llvm-svn: 93308
2010-01-13 08:02:14 +00:00
ceb5a4e8f6
For now, avoid issuing extract_subreg to reuse lower 8-bit, it's not safe in 32-bit.
...
llvm-svn: 93307
2010-01-13 08:01:32 +00:00
f0a401fcf0
eliminate some uses of Mangler::makeNameProper.
...
llvm-svn: 93305
2010-01-13 07:56:59 +00:00
209aecad0c
change Mangler::makeNameProper to return its result in a SmallVector
...
instead of returning it in an std::string. Based on this change:
1. Change TargetLoweringObjectFileCOFF::getCOFFSection to take a StringRef
2. Change a bunch of targets to call makeNameProper with a smallstring,
making several of them *much* more efficient.
3. Rewrite Mangler::makeNameProper to not build names and then prepend
prefixes, not use temporary std::strings, and to avoid other crimes.
llvm-svn: 93298
2010-01-13 06:38:18 +00:00
a94837dc24
Remove the JustSP single-register regclass.
...
It was only being used by instructions with the t_addrmode_sp addressing mode,
and that is pattern matched in a way that guarantees SP is used. There is
never any register allocation done from this class.
llvm-svn: 93280
2010-01-13 00:43:06 +00:00
30bebff456
Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
...
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.
llvm-svn: 93278
2010-01-13 00:30:23 +00:00
08557ef5f4
Eliminate or_not_add and just use AddedComplexity so isel tries or_is_add patterns first.
...
llvm-svn: 93245
2010-01-12 18:31:19 +00:00
b7168c270e
Revert commit 93204, since it causes the assembler to barf
...
on x86-64 linux with messages like this:
Error: Incorrect register `%r14' used with `l' suffix
llvm-svn: 93242
2010-01-12 17:46:16 +00:00
0067d6bbbe
Fix typo.
...
llvm-svn: 93235
2010-01-12 08:30:46 +00:00
fd75e12954
Tweak commit 91745, which changed target data for both Mingw and Cygwin,
...
to not touch Cygwin: the change caused llvm-gcc build failures due to
long double getting the wrong size. Patch by Aaron Gray.
llvm-svn: 93234
2010-01-12 08:21:07 +00:00
c119580307
Reapply the MOV64r0 patch, with a fix: MOV64r0 clobbers EFLAGS.
...
llvm-svn: 93229
2010-01-12 04:42:54 +00:00
4216615f99
Add TargetInstrInfo::isCoalescableInstr. It returns true if the specified
...
instruction is copy like where the source and destination registers can
overlap. This is to be used by the coalescable to coalesce the source and
destination registers of instructions like X86::MOVSX64rr32. Apparently
some crazy people believe the coalescer is too simple.
llvm-svn: 93210
2010-01-12 00:09:37 +00:00
42b07e9600
Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen them after 93152 and 93191.
...
llvm-svn: 93204
2010-01-11 22:59:27 +00:00
99789a7a76
Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead.
...
llvm-svn: 93191
2010-01-11 22:03:29 +00:00
7bdf339602
Revert 93158. It's breaking quite a few x86_64 tests.
...
llvm-svn: 93185
2010-01-11 21:13:41 +00:00
c5f8184eec
Do not turn 8-bit OR to ADD since ADD8ri is not 3-addressfiable.
...
llvm-svn: 93182
2010-01-11 20:18:04 +00:00
c6fe3c3273
Reimplement getToken and SplitString as "StringRef helper functions"
...
- getToken is modeled after StringRef::split but it can split on multiple
separator chars and skips leading seperators.
- SplitString is a StringRef::split variant for more than 2 elements with the
same behaviour as getToken.
llvm-svn: 93161
2010-01-11 18:03:24 +00:00
e99a3c191e
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it
...
has an immediate with at least 32 bits of leading zeros, to avoid needing to
materialize that immediate in a register first.
FileCheckize, tidy, and extend a testcase to cover this case.
This fixes rdar://7527390.
llvm-svn: 93160
2010-01-11 17:58:34 +00:00
3a55686345
Re-instate MOV64r0 and MOV16r0, with adjustments to work with the
...
new AsmPrinter. This is perhaps less elegant than describing them
in terms of MOV32r0 and subreg operations, but it allows the
current register to rematerialize them.
llvm-svn: 93158
2010-01-11 17:37:57 +00:00
f6e8369a5b
Pattern top-level operators don't need to be restricted to a
...
single user. The _su forms are intended for non-top-level nodes.
llvm-svn: 93155
2010-01-11 17:21:05 +00:00
40ea3e5ce2
Reword this comment to reference a more fundamental issue.
...
llvm-svn: 93154
2010-01-11 17:14:46 +00:00
64d9f40557
Select an OR with immediate as an ADD if the input bits are known zero. This allow the instruction to be 3address-fied if needed.
...
llvm-svn: 93152
2010-01-11 17:03:47 +00:00
206351a1ff
Implement a feature (-vector-unaligned-mem) to allow targets to
...
ignore alignment requirements for SIMD memory operands. This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.
llvm-svn: 93151
2010-01-11 16:29:42 +00:00
25963c6113
"In order to ease automatic bindings generation, it would be helpful if boolean values were distinguishable from integers. The attached patch introduces "typedef int LLVMBool;", and uses LLVMBool instead of int throughout the C API, wherever a boolean value is called for."
...
Patch by James Y Knight!
llvm-svn: 93079
2010-01-09 22:27:07 +00:00
bb857e5d68
Fix http://llvm.org/PR5729 : x86-64 tail calls were putting their targets into
...
R11, and then asserting that the target was in R9. Since R9 isn't reserved for
the target anymore, and is used as an argument, this patch changes the
assertion.
llvm-svn: 93065
2010-01-09 18:56:43 +00:00
cc6d56bd3b
Fix a critical bug in 64-bit atomic operation lowering for 32-bit. The results of the cmpxchg8b instructions are being thrown away when it branches back to the top of the checking loop. This means the loop always compares against the old value and this can result in a dead lock.
...
llvm-svn: 93028
2010-01-08 23:41:50 +00:00
4bb448c41b
Fix comment.
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llvm-svn: 93020
2010-01-08 19:14:57 +00:00
ab6e6819b2
Minor change, change the order of two "let Inst{...}" stmts within multiclass
...
T2I_bin_ii12rs definition.
llvm-svn: 93006
2010-01-08 17:41:33 +00:00
7482ad7272
After further thought revert the patch to make fast-isel avoid
...
putting relocations into the constant pool - this isn't needed
for correctness and in the rare occasion it happens would pull
us out of fast isel for the block.
If fast-isel application startup time ever becomes an issue we
can add better support for these addresses instead of bailing.
llvm-svn: 92995
2010-01-08 08:24:49 +00:00
b92f263ceb
Fix what looks to me obvious instruction definition bugs.
...
1. CMPXCHG8B and CMPXCHG16B did not specify implicit physical register defs and uses.
2. LCMPXCHG8B is loading 64 bit memory, not 32 bit.
llvm-svn: 92985
2010-01-08 01:29:19 +00:00
e0297b9206
Remove extraneous include.
...
llvm-svn: 92972
2010-01-08 00:05:33 +00:00
9f569bdf38
If the data requires a relocation then don't attempt to
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add it to the constant pool for fast-isel. We already
don't add it for the normal case.
llvm-svn: 92934
2010-01-07 19:45:14 +00:00
36ef435eca
We need to put any kind of data with a relocation into a
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not-readonly segment on darwin.
llvm-svn: 92933
2010-01-07 19:44:05 +00:00
9e4e45a3b6
constant materialization could be improved.
...
llvm-svn: 92921
2010-01-07 17:53:10 +00:00
90dc43fcf5
Fix a minor regression from my dag combiner changes. One more place which needs to look pass truncates.
...
llvm-svn: 92885
2010-01-07 00:54:06 +00:00
b907a467e2
80 column violations
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llvm-svn: 92876
2010-01-06 23:54:42 +00:00
29a64c9575
Add Target hook to duplicate machine instructions.
...
Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.
llvm-svn: 92873
2010-01-06 23:47:07 +00:00
5fd6feb883
Addressing mode 6 (load/store) instructions can't encode an immediate offset
...
for stack references.
llvm-svn: 92871
2010-01-06 23:45:18 +00:00
166a4e6caa
Teach dag combine to fold the following transformation more aggressively:
...
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))
Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.
This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.
llvm-svn: 92849
2010-01-06 19:38:29 +00:00
c8493da5b1
Fix a README item: have functionattrs look through selects and
...
phi nodes when deciding which pointers point to local memory.
I actually checked long ago how useful this is, and it isn't
very: it hardly ever fires in the testsuite, but since Chris
wants it here it is!
llvm-svn: 92836
2010-01-06 15:37:47 +00:00
78376ad7e1
Partially address a README by having functionattrs consider calls to
...
memcpy, memset and other intrinsics that only access their arguments
to be readnone if the intrinsic's arguments all point to local memory.
This improves the testcase in the README to readonly, but it could in
theory be made readnone, however this would involve more sophisticated
analysis that looks through the memcpy.
llvm-svn: 92829
2010-01-06 08:45:52 +00:00
237b1c12be
Reenable debug info on PPC. Works well enough to
...
bootstrap.
llvm-svn: 92818
2010-01-06 02:21:00 +00:00
3257b4cc9b
Make sure debug info hook gets called when emitting
...
synonyms for PPC.
llvm-svn: 92817
2010-01-06 02:20:18 +00:00
567945636f
Undo r92785, it caused test failure.
...
llvm-svn: 92796
2010-01-05 22:37:28 +00:00
a9f39bdbb6
Add Rt2 to the asm format string for 32-bit Thumb load/store register dual
...
instructions. Thumb does not have the restriction that t2 = t+1.
llvm-svn: 92785
2010-01-05 21:51:46 +00:00
aee326860c
Don't specify CR sub-registers as implicit defs of BL instructions.
...
It is enough to give the super registers CR0, CR1, ..., and specifying the
sub-registers as well causes confusion in the liveness computations.
llvm-svn: 92778
2010-01-05 21:38:37 +00:00
d2564e3afb
Move remaining stuff to the isInteger predicate.
...
llvm-svn: 92771
2010-01-05 21:05:54 +00:00
a81a6dff0d
Convert a ton of simple integer type equality tests to the new predicate.
...
llvm-svn: 92760
2010-01-05 20:07:06 +00:00
4facc6116a
Code refactoring.
...
llvm-svn: 92694
2010-01-05 06:52:31 +00:00
24328b99ab
Change errs() to dbgs().
...
llvm-svn: 92655
2010-01-05 01:29:36 +00:00
d85fd0061d
Change errs() to dbgs().
...
llvm-svn: 92654
2010-01-05 01:29:34 +00:00
d589dafba6
Change errs() to dbgs().
...
llvm-svn: 92653
2010-01-05 01:29:29 +00:00
0688a242a5
Change errs() to dbgs().
...
llvm-svn: 92651
2010-01-05 01:29:23 +00:00
0041181684
Change errs() to dbgs().
...
llvm-svn: 92648
2010-01-05 01:29:13 +00:00
dbdb1b28b8
Change errs() to dbgs().
...
llvm-svn: 92647
2010-01-05 01:29:08 +00:00
a8000359a6
Change errs() to dbgs().
...
llvm-svn: 92644
2010-01-05 01:28:53 +00:00
ea6f91ff64
Change SelectCode's argument from SDValue to SDNode *, to make it more
...
clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
llvm-svn: 92564
2010-01-05 01:24:18 +00:00
be94f23992
Remove dead debug info intrinsics.
...
Intrinsic::dbg_stoppoint
Intrinsic::dbg_region_start
Intrinsic::dbg_region_end
Intrinsic::dbg_func_start
AutoUpgrade simply ignores these intrinsics now.
llvm-svn: 92557
2010-01-05 01:10:40 +00:00
43324d0b29
Remove the SDNPAssociative properties for the flags-producing
...
operators. Eli pointed out that it's not obvious what that
would mean.
llvm-svn: 92555
2010-01-05 00:44:20 +00:00
7844a99d60
Perform this folding as a target specific dag combine:
...
(or (x << c) | (y >> (64 - c))) ==> (shld64 x, y, c)
The isel patterns may not catch all the cases if general dag combine has reduced width of source operands.
llvm-svn: 92513
2010-01-04 21:22:48 +00:00
5d1987f9a0
Remove some README.txt entries which are now implemented.
...
llvm-svn: 92511
2010-01-04 20:55:05 +00:00
0f960aed68
A use by operand 1 or 2 of a SELECT is not a FLAGS use. This
...
lets the test-elimination work in more conditional-move cases.
llvm-svn: 92508
2010-01-04 20:52:50 +00:00
85d4fdfe37
Flags-producing add, and, or, etc. have the same profibility
...
rules as normal add, and, or, etc.
llvm-svn: 92507
2010-01-04 20:51:50 +00:00
71671131c3
Add SDNPCommutative and SDNPAssociative to several X86 target nodes.
...
This lets isel fold loads into them in more cases.
llvm-svn: 92506
2010-01-04 20:51:05 +00:00
d91a14dba5
Fix invalid chain folding for memory variant of sdiv / udiv
...
llvm-svn: 92472
2010-01-04 10:31:54 +00:00
2d91231d82
implement an instcombine xform needed by clang's codegen
...
on the example in PR4216. This doesn't trigger in the testsuite,
so I'd really appreciate someone scrutinizing the logic for
correctness.
llvm-svn: 92458
2010-01-04 06:03:59 +00:00
39f18e545e
Teach codegen to lower llvm.powi to an efficient (but not optimal)
...
multiply sequence when the power is a constant integer. Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.
This should also make many gfortran programs happier I'd imagine.
llvm-svn: 92388
2010-01-01 03:32:16 +00:00
71cf7c256f
update this. To take the next step, llvm.powi should be generalized to work
...
on integers as well and codegen should lower them to branch trees.
llvm-svn: 92382
2010-01-01 01:29:26 +00:00
6b37c9e6fc
Replace a few more SmallVectors with arrays.
...
llvm-svn: 92265
2009-12-29 16:57:26 +00:00
015215ca86
Extern declaration for unordered.f32 libcall was not being emitted. Fixed that.
...
llvm-svn: 92242
2009-12-29 03:24:34 +00:00
7ef1cac576
move debug info stuff out of line, allowing two #includes
...
to go away from IRBuilder.h
llvm-svn: 92230
2009-12-28 21:45:40 +00:00
8adc1e2263
Add missing include (for inline PATypeHolder::get).
...
llvm-svn: 92222
2009-12-28 12:27:56 +00:00
1ecffe13b2
Fixed llc crash for zext (i1 -> i8) loads.
...
llvm-svn: 92201
2009-12-28 04:53:24 +00:00
0b00a1b54e
Allow targets to specify the return type of libcalls that are generated for floating point comparisons, rather than hard-coding them as i32.
...
llvm-svn: 92199
2009-12-28 02:40:33 +00:00
5dda76ef11
Mark variable used by 'assert' as 'unused'.
...
llvm-svn: 92198
2009-12-28 02:07:00 +00:00
220f4dad9e
Remove dead variable.
...
llvm-svn: 92197
2009-12-28 02:05:36 +00:00
82e5904cbd
Remove dead variable.
...
llvm-svn: 92196
2009-12-28 02:04:53 +00:00
18f28cb9c0
Remove dead variable.
...
llvm-svn: 92195
2009-12-28 02:01:06 +00:00
44a47d61df
Remove dead variable.
...
llvm-svn: 92194
2009-12-28 02:00:30 +00:00
a91b8207cc
Remove dead variable.
...
llvm-svn: 92193
2009-12-28 01:57:39 +00:00
56631085ea
Remove dead variable.
...
llvm-svn: 92186
2009-12-28 01:42:12 +00:00
acde434d1a
Remove dead variable.
...
llvm-svn: 92185
2009-12-28 01:41:12 +00:00
3179a89067
Remove dead variable.
...
llvm-svn: 92184
2009-12-28 01:36:02 +00:00
6ff71a1953
Remove dead store. The initial value was never used, but always overridden.
...
llvm-svn: 92182
2009-12-28 01:31:11 +00:00
b8d960d615
Add an "ATTRIBUTE_UNUSED" macro (and use it). It's for variables which are
...
mainly used in debugging and/or assert situations. It should make the compiler
and the static analyzer stop nagging us about them.
llvm-svn: 92181
2009-12-28 01:20:29 +00:00
ac6216d84c
PR5886: Make sure IMUL32m is marked as setting EFLAGS, so scheduling doesn't
...
do illegal stuff around it. No testcase because the issue is very fragile.
llvm-svn: 92167
2009-12-26 20:08:30 +00:00
398932a619
Move kill flags when the same register occurs more than once in a sequence.
...
llvm-svn: 92058
2009-12-23 21:34:03 +00:00
0fa4fe0b9b
Handle undef operands properly.
...
llvm-svn: 92054
2009-12-23 21:28:42 +00:00
8921d4cd98
Make insert position available to MergeOpsUpdate.
...
Rearrange arguments.
No functional changes
llvm-svn: 92053
2009-12-23 21:28:37 +00:00
64870c5d93
Perform kill flag calculations in new method. No functional changes.
...
llvm-svn: 92052
2009-12-23 21:28:31 +00:00
655e4e6028
Move repeated code to a new method. No functional change.
...
llvm-svn: 92051
2009-12-23 21:28:23 +00:00
cd419eebce
Reapply 91904.
...
llvm-svn: 91996
2009-12-23 11:19:09 +00:00
a33c6f90ee
Added missing patterns for subtract instruction.
...
llvm-svn: 91995
2009-12-23 10:56:02 +00:00
f7b4f89588
Reverting back 91904.
...
llvm-svn: 91993
2009-12-23 09:46:01 +00:00
4e26c0e52b
really remove the instruction, don't just comment it out
...
llvm-svn: 91976
2009-12-23 01:46:40 +00:00
518b037620
completely eliminate the MOV16r0 'instruction'. The only
...
interesting part of this is the divrem changes, which are
already tested by CodeGen/X86/divrem.ll.
llvm-svn: 91975
2009-12-23 01:45:04 +00:00
417c8a43d6
More fixes for Visual C++. Replaced several very small
...
static inline functions with macros.
llvm-svn: 91973
2009-12-23 01:32:29 +00:00
698def0868
stop pattern matching 16-bit zero's of a register to MOV16r0,
...
instead use the appropriate subreggy thing. This generates identical
code on some large apps (thanks to Evan's cross class coalescing
stuff he did back in july). This means that MOV16r0 can go away
completely in the future soon.
llvm-svn: 91972
2009-12-23 01:30:26 +00:00
b05fbe1486
Add a SPR register class to the ARM target.
...
Certain Thumb instructions require only SP (e.g. tSTRspi).
llvm-svn: 91944
2009-12-22 23:54:44 +00:00
588785c781
Removed the "inline" keyword from the disassembler decoder,
...
because the Visual C++ build does not build .c files as C99
llvm-svn: 91935
2009-12-22 22:51:40 +00:00
36eab80875
Fixes to the X86 disassembler:
...
Made LEA memory operands emit only 4 MCInst operands.
Made the scale operand equal 1 for instructions that have no
SIB byte.
llvm-svn: 91919
2009-12-22 21:12:55 +00:00
6f579c12b1
Use proper move instructions. Make the verifier happy.
...
llvm-svn: 91914
2009-12-22 18:49:55 +00:00
71d7eaa87e
Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size.
...
llvm-svn: 91910
2009-12-22 17:47:23 +00:00
8b858396d4
Include based on the current path, since we already -I the X86 target's path. Fixes CMake build
...
llvm-svn: 91908
2009-12-22 17:25:11 +00:00
8c5f05fcee
While converting one of the operands to a memory operand, we need to check if it is Legal and does not result into a cyclic dep.
...
llvm-svn: 91904
2009-12-22 14:25:37 +00:00
919b7aab2e
Add more plumbing. This time in the LowerArguments and "get" functions which
...
return partial registers. This affected the back-end lowering code some.
Also patch up some places I missed before in the "get" functions.
llvm-svn: 91880
2009-12-22 02:10:19 +00:00
2f9443f422
Changed REG_* to MODRM_REG_* to avoid conflicts
...
with symbols in AuroraUX's global namespace.
llvm-svn: 91879
2009-12-22 02:07:42 +00:00
8b532de418
Fix some may-be-uninitialized var warnings.
...
llvm-svn: 91878
2009-12-22 01:41:37 +00:00
5c8f4cd396
Fixed library dependencies between the X86 disassembler and
...
X86 codegen that were causing circular symbol dependencies.
llvm-svn: 91871
2009-12-22 01:11:26 +00:00
6211d7ba4b
print pcrel immediates as signed values instead of unsigned so that we
...
get things like this out of the disassembler:
0x100000ecb: callq -96
instead of:
0x100000ecb: callq 4294967200
rdar://7491123
llvm-svn: 91864
2009-12-22 00:44:05 +00:00
3e9e87a9cb
Mark FPW as allocable when frame address is taken.
...
llvm-svn: 91841
2009-12-21 20:18:49 +00:00
db4d798619
Delete the instruction just before the function terminates for consistency sake.
...
llvm-svn: 91836
2009-12-21 19:53:39 +00:00
a91c0f48e6
Fix setting and default setting of code model for jit. Do this
...
by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.
Should fix PR 5773.
llvm-svn: 91824
2009-12-21 08:15:29 +00:00
dbe2aa91b9
A couple minor README updates.
...
llvm-svn: 91823
2009-12-21 08:03:16 +00:00
877075a41f
Remove unused variable (noticed by clang++).
...
llvm-svn: 91780
2009-12-19 18:58:49 +00:00
4750efc28a
#if 0 out X86 disassembler for now, it is breaking the build in multiple places.
...
llvm-svn: 91778
2009-12-19 17:11:53 +00:00
8ac077df57
Emit direction operand in binary insns that stores in memory.
...
llvm-svn: 91777
2009-12-19 13:52:01 +00:00
3ed6d6003c
rename dprintf to dbgpritnf, in order to fix build with glibc (which already defines dprintf in stdio.h
...
llvm-svn: 91775
2009-12-19 12:07:00 +00:00
4f469974b2
1. In indirect load/store insns , the name of fsr should be emitted as INDF.
...
2. include standard asmbly headers in generated asmbly.
llvm-svn: 91768
2009-12-19 08:26:25 +00:00
740ab38bb7
Fix a bunch of little errors that Clang complains about when its being pedantic
...
llvm-svn: 91764
2009-12-19 07:05:23 +00:00
c745a620a2
Use memset instead of bzero, its more portable.
...
llvm-svn: 91754
2009-12-19 03:31:50 +00:00
04cc307edd
Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
...
incarnations), integrated into the MC framework.
The disassembler is table-driven, using a custom TableGen backend to
generate hierarchical tables optimized for fast decode. The disassembler
consumes MemoryObjects and produces arrays of MCInsts, adhering to the
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).
The disassembler is documented in detail in
- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)
You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets. Please let me know if you encounter any problems
with it.
llvm-svn: 91749
2009-12-19 02:59:52 +00:00
148d87b0b0
Bump alignment requirements for windows targets to achieve compartibility with vcpp.
...
Based on patch by Michael Beck!
llvm-svn: 91745
2009-12-19 02:04:23 +00:00
022d18fa3f
Changes from review:
...
- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.
This isn't used yet, so there should be no functional changes.
llvm-svn: 91727
2009-12-18 23:32:53 +00:00
b73b4fd30e
Fix libstdc++ build on ARM linux and part of PR5770.
...
MI was not being used but it was also not being deleted, so it was kept in the garbage list. The memory itself was freed once the function code gen was done.
Once in a while the codegen of another function would create an instruction on the same address. Adding it to the garbage group would work once, but when another pointer was added it would cause an assert as "Cache" was about to be pushed to Ts.
For a patch that make us detect problems like this earlier, take a look at
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20091214/092758.html
With that patch we assert as soon and the new instruction is added to the garbage set.
llvm-svn: 91691
2009-12-18 16:59:39 +00:00
5b2df8dcb5
Fix wrong frame pointer save offset in the 64-bit PowerPC SVR4 ABI.
...
Patch contributed by Ken Werner of IBM!
llvm-svn: 91681
2009-12-18 13:00:34 +00:00
79fef9349c
Add support for calls through function pointers in the 64-bit PowerPC SVR4 ABI.
...
Patch contributed by Ken Werner of IBM!
llvm-svn: 91680
2009-12-18 13:00:15 +00:00
4cf30b72bf
On recent Intel u-arch's, folding loads into some unary SSE instructions can
...
be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.
movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0
instead of
cvtss2sd (%rdi), %xmm0
An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0
llvm-svn: 91672
2009-12-18 07:40:29 +00:00
4c155350f1
Fix typo.
...
llvm-svn: 91657
2009-12-18 02:12:53 +00:00
3dfd04e2b7
Re-apply 91623 now that I actually know what I was trying to do.
...
llvm-svn: 91655
2009-12-18 01:59:21 +00:00
3152b0471b
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
...
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
llvm-svn: 91649
2009-12-18 01:03:29 +00:00
eabfd8b155
Pass the error string directly to llvm_unreachable instead of the residual
...
(0 && "error"). Rough consensus seems to be that g++ *should* be diagnosing
this because the pointer makes it not an ICE in c++03. Everyone agrees that
the current standard is silly and null-pointer-ness should not be based on
ICE-ness. Excellent fight scene in Act II, denouement weak, two stars.
llvm-svn: 91644
2009-12-18 00:27:18 +00:00
04d8cb74f3
Instruction fixes, added instructions, and AsmString changes in the
...
X86 instruction tables.
Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.
This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.
* X86*.td
Removed tabs and fixed 80-line violations
* X86Instr64bit.td
(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
Added
(CALL, CMOV) Added qualifiers
(JMP) Added PC-relative jump instruction
(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
that it is 64-bit only (ambiguous since it has no
REX prefix)
(MOV) Added rr form going the other way, which is encoded
differently
(MOV) Changed immediates to offsets, which is more correct;
also fixed MOV64o64a to have to a 64-bit offset
(MOV) Fixed qualifiers
(MOV) Added debug-register and condition-register moves
(MOVZX) Added more forms
(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
(as with MOV) are encoded differently
(ROL) Made REX.W required
(BT) Uncommented mr form for disassembly only
(CVT__2__) Added several missing non-intrinsic forms
(LXADD, XCHG) Reordered operands to make more sense for
MRMSrcMem
(XCHG) Added register-to-register forms
(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
Added
* X86InstrFPStack.td
(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
FXRSTOR)
Added
(FCOM, FCOMP) Added qualifiers
(FSTENV, FSAVE, FSTSW) Fixed opcode names
(FNSTSW) Added implicit register operand
* X86InstrInfo.td
(opaque512mem) Added for FXSAVE/FXRSTOR
(offset8, offset16, offset32, offset64) Added for MOV
(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
VMWRITE, VMXOFF, VMXON) Added
(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
JGE, JLE, JG, JCXZ) Added 32-bit forms
(MOV) Changed some immediate forms to offset forms
(MOV) Added reversed reg-reg forms, which are encoded
differently
(MOV) Added debug-register and condition-register moves
(CMOV) Added qualifiers
(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
(BT) Uncommented memory-register forms for disassembler
(MOVSX, MOVZX) Added forms
(XCHG, LXADD) Made operand order make sense for MRMSrcMem
(XCHG) Added register-register forms
(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
change
* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier
llvm-svn: 91638
2009-12-18 00:01:26 +00:00
0de0ce11d8
Revert r91623 to unbreak the buildbots.
...
llvm-svn: 91632
2009-12-17 22:44:34 +00:00
e43b403c87
Remove an unused option.
...
llvm-svn: 91623
2009-12-17 21:23:58 +00:00
50272752fa
finish cleaning up StructLayoutMap.
...
llvm-svn: 91612
2009-12-17 20:00:21 +00:00
798493285c
In LowerEXTRACT_VECTOR_ELT, force an i32 value type for PEXTWR instead of
...
incrementing the simple value type of the 16-bit type, which would give the
wrong type if an intemediate MVT (such as i24) were introduced.
llvm-svn: 91602
2009-12-17 15:31:52 +00:00
7f30b64dce
Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings.
...
llvm-svn: 91571
2009-12-16 23:36:52 +00:00
30f2ac714b
Silence a clang warning about the deprecated (but perfectly reasonable in
...
context) increment-of-bool idiom.
llvm-svn: 91564
2009-12-16 20:31:50 +00:00
69461f50c1
Mark STREX* as earlyclobber for the success result register.
...
llvm-svn: 91555
2009-12-16 19:44:06 +00:00
466231ab92
Add encoding bits for some Thumb instructions. Plus explicitly set the top two
...
bytes of Inst to 0x0000 for the benefit of the Thumb decoder.
llvm-svn: 91496
2009-12-16 02:32:54 +00:00
1be6286028
Re-enable 91381 with fixes.
...
llvm-svn: 91489
2009-12-16 00:53:11 +00:00
826ca5630e
Every anonymous namespace is different. Caught by clang++.
...
llvm-svn: 91481
2009-12-16 00:15:28 +00:00
e0d8e14e11
Change indirect-globals to use a dedicated allocIndirectGV. This lets us
...
remove start/finishGVStub and the BufferState helper class from the
MachineCodeEmitter interface. It has the side-effect of not setting the
indirect global writable and then executable on ARM, but that shouldn't be
necessary.
llvm-svn: 91464
2009-12-15 22:42:46 +00:00
c28e629c2d
Added encoding bits for the Thumb ISA. Initial checkin.
...
llvm-svn: 91434
2009-12-15 17:24:14 +00:00
b3032962ef
Fix an encoding bug.
...
llvm-svn: 91417
2009-12-15 06:49:02 +00:00
792f0913ee
For fastcc on x86, let ECX be used as a return register after EAX and EDX
...
llvm-svn: 91410
2009-12-15 03:27:52 +00:00
fcb5453dc7
Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp.
...
llvm-svn: 91405
2009-12-15 03:07:11 +00:00
0e8b9e32d1
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
...
llvm-svn: 91381
2009-12-15 00:53:42 +00:00
ea8f6e31a0
nand atomic requires opposite operand ordering
...
llvm-svn: 91371
2009-12-15 00:12:35 +00:00
cecad35728
Fix integer cast code to handle vector types.
...
llvm-svn: 91362
2009-12-14 23:40:38 +00:00
bee6f16fed
Add encoding bits "let Inst{11-4} = 0b00000000;" to BR_JTr to disambiguate
...
between BR_JTr and STREXD.
llvm-svn: 91339
2009-12-14 21:51:34 +00:00
3974a80307
v6 sync insn copy/paste error
...
llvm-svn: 91333
2009-12-14 21:33:32 +00:00
3c4f04112a
Add ARMv6 memory and sync barrier instructions
...
llvm-svn: 91329
2009-12-14 21:24:16 +00:00
acba3b0ae2
Fixed encoding bits typo of ldrexd/strexd.
...
llvm-svn: 91327
2009-12-14 21:01:46 +00:00
57ccc19617
Thumb2 atomic operations
...
llvm-svn: 91321
2009-12-14 20:14:59 +00:00
726e452ccb
fix an obvious bug found by clang++ and collapse a redundant if.
...
Here's the diagnostic from clang:
/Volumes/Data/dgregor/Projects/llvm/lib/Target/CppBackend/CPPBackend.cpp:989:23: warning: 'gv' is always NULL in this context
printConstant(gv);
^
1 diagnostic generated.
llvm-svn: 91318
2009-12-14 19:34:32 +00:00
fed3d088ce
correct selection requirements for thumb2 vs. arm versions of the barrier intrinsics
...
llvm-svn: 91313
2009-12-14 19:24:11 +00:00
20ac87de13
add Thumb2 atomic and memory barrier instruction definitions
...
llvm-svn: 91310
2009-12-14 18:56:47 +00:00
3cdb555e0f
whitespace
...
llvm-svn: 91307
2009-12-14 18:36:32 +00:00
5e0d2a2df6
ARM memory barrier instructions are not predicable
...
llvm-svn: 91305
2009-12-14 18:31:20 +00:00
9d6410d040
add ldrexd/strexd instructions
...
llvm-svn: 91284
2009-12-14 17:02:55 +00:00
277381f69a
Whitespace changes, comment clarification. No functional changes.
...
llvm-svn: 91274
2009-12-14 06:51:19 +00:00
8f3c70e909
atomic binary operations up to 32-bits wide.
...
llvm-svn: 91260
2009-12-14 04:22:04 +00:00
45800ce646
Do not allow uninitialize access during debug printing
...
llvm-svn: 91232
2009-12-13 01:00:32 +00:00
96cf7f42b0
More info on this transformation.
...
llvm-svn: 91230
2009-12-12 23:23:43 +00:00
8eada9f580
Remove some stuff that's already implemented. Also, remove the note about
...
merging x >u 5 and x <s 20 because it's impossible to implement.
llvm-svn: 91228
2009-12-12 21:41:48 +00:00
26fdd7265b
Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.
...
llvm-svn: 91223
2009-12-12 20:03:14 +00:00
d8f320947f
Implement variable-width shifts.
...
No testcase yet - it seems we're exposing generic codegen bugs.
llvm-svn: 91221
2009-12-12 18:55:37 +00:00
3974c8de51
Add comment about potential partial register stall.
...
llvm-svn: 91220
2009-12-12 18:55:26 +00:00
6d6eaafa8c
Fix an obvious bug. No test case since LEA16r is not being used.
...
llvm-svn: 91219
2009-12-12 18:51:56 +00:00
8f9a3ac12c
Framework for atomic binary operations. The emitter for the pseudo instructions
...
just issues an error for the moment. The front end won't yet generate these
intrinsics for ARM, so this is behind the scenes until complete.
llvm-svn: 91200
2009-12-12 01:40:06 +00:00
e27e028cdd
Lower setcc branchless, if this is profitable.
...
Based on the patch by Brian Lucas!
llvm-svn: 91175
2009-12-11 23:01:29 +00:00
1d459e4937
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
...
llvm-svn: 91158
2009-12-11 21:31:27 +00:00
22a4ea8690
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
...
llvm-svn: 91150
2009-12-11 20:29:53 +00:00
fc51282cbe
Honour setHasCalls() set from isel.
...
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723
llvm-svn: 91144
2009-12-11 19:39:55 +00:00
098bd1bbea
Store Register Exclusive should leave the source register Inst{3-0} unspecified.
...
llvm-svn: 91143
2009-12-11 19:37:26 +00:00
afdddaed55
Update properties.
...
llvm-svn: 91140
2009-12-11 18:52:41 +00:00
766a73fb04
Add support to 3-addressify 16-bit instructions.
...
llvm-svn: 91104
2009-12-11 06:01:48 +00:00
5c4e99fca6
Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in progress.
...
llvm-svn: 91090
2009-12-11 01:42:04 +00:00
fed78ccfb5
Add instruction encoding for DMB/DSB
...
llvm-svn: 91053
2009-12-10 18:35:32 +00:00
53e8854443
Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics.
...
llvm-svn: 91003
2009-12-10 00:11:09 +00:00
493b882f80
Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
...
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
llvm-svn: 90984
2009-12-09 21:00:30 +00:00
d938faff4b
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
...
llvm-svn: 90925
2009-12-09 01:53:58 +00:00
f5938d5d27
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
...
llvm-svn: 90922
2009-12-09 01:36:00 +00:00
0c2544fd6b
- Support inline asm 'w' constraint for 128-bit vector types.
...
- Also support the 'q' NEON registers asm code.
llvm-svn: 90894
2009-12-08 23:06:22 +00:00
dd2b2f8cba
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!
...
llvm-svn: 90819
2009-12-08 01:03:04 +00:00
9528ccdd77
Don't enable the post-RA scheduler on x86 except at -O3. In its
...
current form, it is too expensive in compile time.
llvm-svn: 90781
2009-12-07 19:04:31 +00:00
24a6316aaa
Some pretty-printing
...
llvm-svn: 90742
2009-12-07 02:28:41 +00:00
ff4ab51400
Add lowering of returnaddr and frameaddr intrinsics. Shamelessly stolen from x86 :)
...
llvm-svn: 90740
2009-12-07 02:28:10 +00:00
b4be8ce537
Initial codegen support for MSP430 ISRs
...
llvm-svn: 90739
2009-12-07 02:27:53 +00:00
28d3c733aa
Add ability to select hw multiplier mode and select appropriate libcalls.
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llvm-svn: 90737
2009-12-07 02:27:08 +00:00
75dfed4fa5
Dynamic stack realignment use of sp register as source/dest register
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in "bic sp, sp, #15" leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4
llvm-svn: 90724
2009-12-06 22:39:50 +00:00
29d6390249
Calling InvalidateEntry during the refinement was breaking the bootstrap.
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llvm-svn: 90656
2009-12-05 07:59:04 +00:00
fa3f115ec4
Final cleanups:
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- Privatize a typedef.
- Call the InvalidateEntry when refining a type.
llvm-svn: 90655
2009-12-05 07:46:49 +00:00
4968774280
Inline methods which are called only once.
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llvm-svn: 90640
2009-12-05 01:46:01 +00:00
da95e13750
Refactor some code. No functionality change.
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llvm-svn: 90639
2009-12-05 01:43:33 +00:00
047a767d74
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
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MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
llvm-svn: 90634
2009-12-05 00:44:40 +00:00
86bafa29a3
Remove an unneeded include.
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llvm-svn: 90625
2009-12-04 23:55:07 +00:00
0508e435c3
Have hasLoad/StoreFrom/ToStackSlot return the relevant MachineMemOperand.
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llvm-svn: 90608
2009-12-04 22:38:46 +00:00
4ea0d2b8ee
Some code cleanup. No functionality change.
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llvm-svn: 90588
2009-12-04 21:03:02 +00:00
5f9f721e95
remove out of date FIXME.
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llvm-svn: 90490
2009-12-03 21:55:01 +00:00
f05330a5c8
expand note.
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llvm-svn: 90429
2009-12-03 07:43:46 +00:00
d1e4ee3c2b
add a note
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llvm-svn: 90428
2009-12-03 07:41:54 +00:00
c831fac043
fix a build problem with VC++, PR5664, patch by Alp Toker!
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llvm-svn: 90419
2009-12-03 06:58:32 +00:00
0bbd3077ce
Recognize canonical forms of vector shuffles where the same vector is used for
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both source operands. In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand. Radar 7434842.
llvm-svn: 90417
2009-12-03 06:40:55 +00:00
aba7d48764
Revert r90371. It was causing build failures.
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llvm-svn: 90383
2009-12-03 01:54:07 +00:00
693969eb35
Further improvements: refactoring code that does the same thing into one
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function, converting "dyn_cast" to "cast", asserting the correct things, and
other general cleanups.
llvm-svn: 90371
2009-12-03 01:15:46 +00:00
765ac33a1a
yay for case insensitive file systems (?)
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llvm-svn: 90370
2009-12-03 01:10:05 +00:00
73570673de
remove some dead std::ostream using code.
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llvm-svn: 90366
2009-12-03 00:55:04 +00:00
Evan Cheng